d913db70df
Merge pull request #2063 from sayantn/intrinsic-test
...
Redesign `intrinsic-test` to use simple comparison
2026-05-17 22:21:24 +00:00
deaa5091fd
Disable some tests in x86 due to CI failures
2026-05-14 09:54:33 +05:30
b13eb7790b
Fix _mm_sm3rnds2_epi32
2026-05-14 09:54:33 +05:30
0415e2fda7
Disable some assert_instr tests in big-endian
2026-05-14 09:54:33 +05:30
f09bf0bf51
gen-arm: toggle big_endian_inverse where required
2026-05-14 09:54:33 +05:30
10f4190ce5
Modify the CI scripts to work with the new design
2026-05-14 09:54:33 +05:30
a5179d0f8a
Make floats static, as rounding is not a real concern here anymore
2026-05-14 09:54:33 +05:30
0962db67bc
Use pointers for the C definitions to resolve ABI inconsistencies
2026-05-14 09:54:26 +05:30
ee0c01647d
Generate rust bindings and test code
2026-05-14 09:54:21 +05:30
35d77fbdd0
loongarch: Use intrinsics::simd for vpick{ev,od}
2026-05-13 22:50:25 +08:00
1458d8884f
Merge pull request #2114 from heiher/vabsd
...
loongarch: Use `intrinsics::simd` for vabsd
2026-05-12 14:18:06 +00:00
e91ca04c54
explain ignore aarch64 tests
2026-05-12 09:53:34 +02:00
3c7dee460c
Update/add comments for miri-ignored tests
2026-05-12 09:14:53 +02:00
a6c9e82329
zeroall/zeroupper *are* supported by Miri
2026-05-12 09:14:34 +02:00
c477e713b6
Remove code for compiling and comparing C and Rust files, made the C files wrappers
2026-05-12 06:56:09 +05:30
ffe6e2ad98
Implement vcmla_lane with ARM intrinsics
2026-05-11 21:30:40 +05:30
0e97ab333b
Correct small typo in gen-arm
2026-05-11 21:30:40 +05:30
98b0121a9d
loongarch: Use intrinsics::simd for vabsd
2026-05-11 20:31:22 +08:00
1330bfbb28
Merge pull request #2106 from sayantn/cvtf16s16
...
Use LLVM intrinsics for `f16` to `{i,u}16` intrinsics
2026-05-11 08:16:06 +00:00
46b8878c56
Add davidtwco and adamgemmell as maintainers
2026-05-10 18:56:44 +01:00
5b038a321b
Merge pull request #2111 from sayantn/remove-heuristic
...
Remove the `transmute` heuristic from stdarch-gen-arm
2026-05-10 11:11:53 +00:00
9de432f792
Merge pull request #2112 from sayantn/revert-passes
...
Revert "Change implementation of `vld1_dup`"
2026-05-10 11:07:56 +00:00
bee0bf631e
Merge pull request #2103 from heiher/vadda
...
loongarch: Use `intrinsics::simd` for vadda
2026-05-10 05:33:12 +00:00
611b20079c
Revert "Change implementation of vld1_dup"
...
This reverts commit 5f676a53f584e6304985345791525fa06bb9130e.
2026-05-10 07:25:39 +05:30
1d3d92207a
Remove the heuristic for big-endian reversal, reversing only if requested specifically
2026-05-10 05:13:31 +05:30
7012f652b4
gen-arm: split vreinterpret defn into multiple
...
This enables the `big_endian_inverse` transformation to apply to some
of these intrinsics only when appropriate.
2026-05-10 05:11:12 +05:30
256c08376a
Merge pull request #2108 from sayantn/cleanup-gen-arm
...
A lot of cleanup in stdarch-gen-arm
2026-05-09 08:38:01 +00:00
494200ba48
loongarch: Use intrinsics::simd for vadda
2026-05-09 15:45:57 +08:00
51877654ba
Merge pull request #2097 from heiher/vsadd-sub
...
loongarch: Use `intrinsics::simd` for vs{add,sub}
2026-05-09 06:23:59 +00:00
63385588de
Split vcopyq_lane{q}_p64 due to vsetq_lane_p64 requiring aes
2026-05-09 10:01:01 +05:30
95e2c0ff2c
Change implementation of v{us,su,}dot_lane
2026-05-09 09:41:26 +05:30
0d1fd7fa47
Change implementation of vld1_dup
2026-05-09 09:41:25 +05:30
cee8ece450
Change implementation of vmul_lane
2026-05-09 09:41:25 +05:30
3dd1690288
Change implementation of vr{add,sub}hn_high
2026-05-09 09:41:25 +05:30
d4bb7f4fdd
Change implementation of v{q}{r}shr{u}n_high_n
2026-05-09 09:41:25 +05:30
933aa5c3b5
Change implementation of vqrdml{a,s}h_lane
2026-05-09 09:41:24 +05:30
077f63f91e
Change implementation of vqmov{u}n_high
2026-05-09 09:41:24 +05:30
1404a1e5b0
Change implementation of vqdmull{_high}{_lane} and vqrdmulh_lane
2026-05-09 09:41:24 +05:30
63d8cef02f
Change implementation of v{add,sub}{l,w}_high
2026-05-09 09:41:24 +05:30
401582dd27
Change implementation of vmulx_lane
2026-05-09 09:41:24 +05:30
c02a41ccaa
Change implementation of vmull_{high,lane}
2026-05-09 09:41:24 +05:30
ccb273a3c5
Change implementation of vmov{n,l}_high
2026-05-09 09:41:23 +05:30
da1b2021f5
Change implementation of vml{a,s}{l}_lane
2026-05-09 09:41:23 +05:30
4871c490cb
Change implementation of vcvt{x}_f32_f64
2026-05-09 09:41:23 +05:30
8d56c77c04
Change implementation of vab{a,d}l_high
2026-05-09 09:41:23 +05:30
f603c7fb4b
Change implementation of vcopy{q}_lane{q}
2026-05-09 09:41:22 +05:30
229d480cdc
Change implementation of vext
2026-05-09 09:41:22 +05:30
7fb11ae763
Use latest clang versions from kernel.org
2026-05-08 17:35:34 +05:30
7050d69982
gen-arm: use LLVM intrinsics for f16 to {i,u}16
...
Instead of doing an `as {i,u}16` cast, we can use the same LLVM
intrinsics as when converting to `{i,u}{32,64}`, which is what Clang does
and ensures the intrinsic result matches.
2026-05-08 17:33:37 +05:30
a2e77970c2
replace uses of simd_extract with vget_lane
2026-05-08 16:11:44 +05:30
Amanieu d'Antras