mirror of
https://github.com/rust-lang/rust.git
synced 2026-05-31 21:47:15 +03:00
Change implementation of vqdmull{_high}{_lane} and vqrdmulh_lane
This commit is contained in:
sayantn
@@ -14837,11 +14837,9 @@ pub fn vqdmulhs_laneq_s32<const N: i32>(a: i32, b: int32x4_t) -> i32 {
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub fn vqdmull_high_lane_s16<const N: i32>(a: int16x8_t, b: int16x4_t) -> int32x4_t {
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static_assert_uimm_bits!(N, 2);
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unsafe {
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let a: int16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]);
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let b: int16x4_t = simd_shuffle!(b, b, [N as u32, N as u32, N as u32, N as u32]);
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vqdmull_s16(a, b)
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}
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let a = vget_high_s16(a);
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let b = vdup_lane_s16::<N>(b);
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vqdmull_s16(a, b)
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}
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#[doc = "Signed saturating doubling multiply long"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_high_laneq_s32)"]
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@@ -14852,11 +14850,9 @@ pub fn vqdmull_high_lane_s16<const N: i32>(a: int16x8_t, b: int16x4_t) -> int32x
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub fn vqdmull_high_laneq_s32<const N: i32>(a: int32x4_t, b: int32x4_t) -> int64x2_t {
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static_assert_uimm_bits!(N, 2);
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unsafe {
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let a: int32x2_t = simd_shuffle!(a, a, [2, 3]);
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let b: int32x2_t = simd_shuffle!(b, b, [N as u32, N as u32]);
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vqdmull_s32(a, b)
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}
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let a = vget_high_s32(a);
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let b = vdup_laneq_s32::<N>(b);
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vqdmull_s32(a, b)
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}
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#[doc = "Signed saturating doubling multiply long"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_high_lane_s32)"]
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@@ -14867,11 +14863,9 @@ pub fn vqdmull_high_laneq_s32<const N: i32>(a: int32x4_t, b: int32x4_t) -> int64
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub fn vqdmull_high_lane_s32<const N: i32>(a: int32x4_t, b: int32x2_t) -> int64x2_t {
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static_assert_uimm_bits!(N, 1);
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unsafe {
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let a: int32x2_t = simd_shuffle!(a, a, [2, 3]);
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let b: int32x2_t = simd_shuffle!(b, b, [N as u32, N as u32]);
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vqdmull_s32(a, b)
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}
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let a = vget_high_s32(a);
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let b = vdup_lane_s32::<N>(b);
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vqdmull_s32(a, b)
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}
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#[doc = "Signed saturating doubling multiply long"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_high_laneq_s16)"]
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@@ -14882,11 +14876,9 @@ pub fn vqdmull_high_lane_s32<const N: i32>(a: int32x4_t, b: int32x2_t) -> int64x
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub fn vqdmull_high_laneq_s16<const N: i32>(a: int16x8_t, b: int16x8_t) -> int32x4_t {
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static_assert_uimm_bits!(N, 3);
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unsafe {
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let a: int16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]);
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let b: int16x4_t = simd_shuffle!(b, b, [N as u32, N as u32, N as u32, N as u32]);
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vqdmull_s16(a, b)
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}
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let a = vget_high_s16(a);
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let b = vdup_laneq_s16::<N>(b);
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vqdmull_s16(a, b)
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}
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#[doc = "Signed saturating doubling multiply long"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_high_n_s16)"]
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@@ -14895,11 +14887,9 @@ pub fn vqdmull_high_laneq_s16<const N: i32>(a: int16x8_t, b: int16x8_t) -> int32
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#[cfg_attr(all(test, target_endian = "little"), assert_instr(sqdmull2))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub fn vqdmull_high_n_s16(a: int16x8_t, b: i16) -> int32x4_t {
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unsafe {
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let a: int16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]);
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let b: int16x4_t = vdup_n_s16(b);
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vqdmull_s16(a, b)
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}
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let a = vget_high_s16(a);
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let b = vdup_n_s16(b);
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vqdmull_s16(a, b)
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}
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#[doc = "Signed saturating doubling multiply long"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_high_n_s32)"]
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@@ -14908,11 +14898,9 @@ pub fn vqdmull_high_n_s16(a: int16x8_t, b: i16) -> int32x4_t {
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#[cfg_attr(all(test, target_endian = "little"), assert_instr(sqdmull2))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub fn vqdmull_high_n_s32(a: int32x4_t, b: i32) -> int64x2_t {
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unsafe {
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let a: int32x2_t = simd_shuffle!(a, a, [2, 3]);
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let b: int32x2_t = vdup_n_s32(b);
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vqdmull_s32(a, b)
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}
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let a = vget_high_s32(a);
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let b = vdup_n_s32(b);
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vqdmull_s32(a, b)
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}
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#[doc = "Signed saturating doubling multiply long"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_high_s16)"]
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@@ -14921,11 +14909,9 @@ pub fn vqdmull_high_n_s32(a: int32x4_t, b: i32) -> int64x2_t {
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#[cfg_attr(all(test, target_endian = "little"), assert_instr(sqdmull2))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub fn vqdmull_high_s16(a: int16x8_t, b: int16x8_t) -> int32x4_t {
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unsafe {
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let a: int16x4_t = simd_shuffle!(a, a, [4, 5, 6, 7]);
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let b: int16x4_t = simd_shuffle!(b, b, [4, 5, 6, 7]);
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vqdmull_s16(a, b)
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}
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let a = vget_high_s16(a);
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let b = vget_high_s16(b);
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vqdmull_s16(a, b)
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}
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#[doc = "Signed saturating doubling multiply long"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_high_s32)"]
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@@ -14934,11 +14920,9 @@ pub fn vqdmull_high_s16(a: int16x8_t, b: int16x8_t) -> int32x4_t {
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#[cfg_attr(all(test, target_endian = "little"), assert_instr(sqdmull2))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub fn vqdmull_high_s32(a: int32x4_t, b: int32x4_t) -> int64x2_t {
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unsafe {
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let a: int32x2_t = simd_shuffle!(a, a, [2, 3]);
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let b: int32x2_t = simd_shuffle!(b, b, [2, 3]);
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vqdmull_s32(a, b)
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}
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let a = vget_high_s32(a);
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let b = vget_high_s32(b);
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vqdmull_s32(a, b)
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}
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#[doc = "Vector saturating doubling long multiply by scalar"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_laneq_s16)"]
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@@ -14949,10 +14933,8 @@ pub fn vqdmull_high_s32(a: int32x4_t, b: int32x4_t) -> int64x2_t {
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub fn vqdmull_laneq_s16<const N: i32>(a: int16x4_t, b: int16x8_t) -> int32x4_t {
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static_assert_uimm_bits!(N, 3);
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unsafe {
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let b: int16x4_t = simd_shuffle!(b, b, [N as u32, N as u32, N as u32, N as u32]);
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vqdmull_s16(a, b)
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}
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let b = vdup_laneq_s16::<N>(b);
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vqdmull_s16(a, b)
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}
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#[doc = "Vector saturating doubling long multiply by scalar"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_laneq_s32)"]
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@@ -14963,10 +14945,8 @@ pub fn vqdmull_laneq_s16<const N: i32>(a: int16x4_t, b: int16x8_t) -> int32x4_t
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub fn vqdmull_laneq_s32<const N: i32>(a: int32x2_t, b: int32x4_t) -> int64x2_t {
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static_assert_uimm_bits!(N, 2);
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unsafe {
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let b: int32x2_t = simd_shuffle!(b, b, [N as u32, N as u32]);
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vqdmull_s32(a, b)
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}
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let b = vdup_laneq_s32::<N>(b);
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vqdmull_s32(a, b)
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}
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#[doc = "Signed saturating doubling multiply long"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmullh_lane_s16)"]
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@@ -35001,10 +35001,8 @@ pub fn vqdmulhq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
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)]
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pub fn vqdmull_lane_s16<const N: i32>(a: int16x4_t, b: int16x4_t) -> int32x4_t {
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static_assert_uimm_bits!(N, 2);
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unsafe {
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let b: int16x4_t = simd_shuffle!(b, b, [N as u32; 4]);
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vqdmull_s16(a, b)
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}
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let b = vdup_lane_s16::<N>(b);
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vqdmull_s16(a, b)
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}
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#[doc = "Vector saturating doubling long multiply by scalar"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_lane_s32)"]
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@@ -35027,10 +35025,8 @@ pub fn vqdmull_lane_s16<const N: i32>(a: int16x4_t, b: int16x4_t) -> int32x4_t {
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)]
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pub fn vqdmull_lane_s32<const N: i32>(a: int32x2_t, b: int32x2_t) -> int64x2_t {
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static_assert_uimm_bits!(N, 1);
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unsafe {
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let b: int32x2_t = simd_shuffle!(b, b, [N as u32; 2]);
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vqdmull_s32(a, b)
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}
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let b = vdup_lane_s32::<N>(b);
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vqdmull_s32(a, b)
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}
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#[doc = "Vector saturating doubling long multiply with scalar"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_n_s16)"]
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@@ -35588,11 +35584,8 @@ pub fn vqnegq_s32(a: int32x4_t) -> int32x4_t {
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)]
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pub fn vqrdmulh_lane_s16<const LANE: i32>(a: int16x4_t, b: int16x4_t) -> int16x4_t {
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static_assert_uimm_bits!(LANE, 2);
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unsafe {
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let b: int16x4_t =
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simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
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vqrdmulh_s16(a, b)
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}
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let b = vdup_lane_s16::<LANE>(b);
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vqrdmulh_s16(a, b)
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}
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#[doc = "Vector rounding saturating doubling multiply high by scalar"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrdmulh_lane_s32)"]
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@@ -35615,10 +35608,8 @@ pub fn vqrdmulh_lane_s16<const LANE: i32>(a: int16x4_t, b: int16x4_t) -> int16x4
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)]
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pub fn vqrdmulh_lane_s32<const LANE: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t {
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static_assert_uimm_bits!(LANE, 1);
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unsafe {
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let b: int32x2_t = simd_shuffle!(b, b, [LANE as u32, LANE as u32]);
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vqrdmulh_s32(a, b)
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}
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let b = vdup_lane_s32::<LANE>(b);
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vqrdmulh_s32(a, b)
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}
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#[doc = "Vector rounding saturating doubling multiply high by scalar"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrdmulh_laneq_s16)"]
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@@ -35641,11 +35632,8 @@ pub fn vqrdmulh_lane_s32<const LANE: i32>(a: int32x2_t, b: int32x2_t) -> int32x2
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)]
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pub fn vqrdmulh_laneq_s16<const LANE: i32>(a: int16x4_t, b: int16x8_t) -> int16x4_t {
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static_assert_uimm_bits!(LANE, 3);
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unsafe {
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let b: int16x4_t =
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simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
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vqrdmulh_s16(a, b)
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}
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let b = vdup_laneq_s16::<LANE>(b);
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vqrdmulh_s16(a, b)
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}
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#[doc = "Vector rounding saturating doubling multiply high by scalar"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrdmulh_laneq_s32)"]
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@@ -35668,10 +35656,8 @@ pub fn vqrdmulh_laneq_s16<const LANE: i32>(a: int16x4_t, b: int16x8_t) -> int16x
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)]
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pub fn vqrdmulh_laneq_s32<const LANE: i32>(a: int32x2_t, b: int32x4_t) -> int32x2_t {
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static_assert_uimm_bits!(LANE, 2);
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unsafe {
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let b: int32x2_t = simd_shuffle!(b, b, [LANE as u32, LANE as u32]);
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vqrdmulh_s32(a, b)
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}
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let b = vdup_laneq_s32::<LANE>(b);
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vqrdmulh_s32(a, b)
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}
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#[doc = "Vector rounding saturating doubling multiply high by scalar"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrdmulhq_lane_s16)"]
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@@ -35694,23 +35680,8 @@ pub fn vqrdmulh_laneq_s32<const LANE: i32>(a: int32x2_t, b: int32x4_t) -> int32x
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)]
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pub fn vqrdmulhq_lane_s16<const LANE: i32>(a: int16x8_t, b: int16x4_t) -> int16x8_t {
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static_assert_uimm_bits!(LANE, 2);
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unsafe {
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let b: int16x8_t = simd_shuffle!(
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b,
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b,
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[
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LANE as u32,
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LANE as u32,
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LANE as u32,
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LANE as u32,
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LANE as u32,
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LANE as u32,
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LANE as u32,
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LANE as u32
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]
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);
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vqrdmulhq_s16(a, b)
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}
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let b = vdupq_lane_s16::<LANE>(b);
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vqrdmulhq_s16(a, b)
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}
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#[doc = "Vector rounding saturating doubling multiply high by scalar"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrdmulhq_lane_s32)"]
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@@ -35733,11 +35704,8 @@ pub fn vqrdmulhq_lane_s16<const LANE: i32>(a: int16x8_t, b: int16x4_t) -> int16x
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)]
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pub fn vqrdmulhq_lane_s32<const LANE: i32>(a: int32x4_t, b: int32x2_t) -> int32x4_t {
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static_assert_uimm_bits!(LANE, 1);
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unsafe {
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let b: int32x4_t =
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simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
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vqrdmulhq_s32(a, b)
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}
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let b = vdupq_lane_s32::<LANE>(b);
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vqrdmulhq_s32(a, b)
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}
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#[doc = "Vector rounding saturating doubling multiply high by scalar"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrdmulhq_laneq_s16)"]
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@@ -35760,23 +35728,8 @@ pub fn vqrdmulhq_lane_s32<const LANE: i32>(a: int32x4_t, b: int32x2_t) -> int32x
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)]
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pub fn vqrdmulhq_laneq_s16<const LANE: i32>(a: int16x8_t, b: int16x8_t) -> int16x8_t {
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static_assert_uimm_bits!(LANE, 3);
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unsafe {
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let b: int16x8_t = simd_shuffle!(
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b,
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b,
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[
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LANE as u32,
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LANE as u32,
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LANE as u32,
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LANE as u32,
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LANE as u32,
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LANE as u32,
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LANE as u32,
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LANE as u32
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]
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);
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vqrdmulhq_s16(a, b)
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}
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let b = vdupq_laneq_s16::<LANE>(b);
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vqrdmulhq_s16(a, b)
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}
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#[doc = "Vector rounding saturating doubling multiply high by scalar"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrdmulhq_laneq_s32)"]
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@@ -35799,11 +35752,8 @@ pub fn vqrdmulhq_laneq_s16<const LANE: i32>(a: int16x8_t, b: int16x8_t) -> int16
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)]
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pub fn vqrdmulhq_laneq_s32<const LANE: i32>(a: int32x4_t, b: int32x4_t) -> int32x4_t {
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static_assert_uimm_bits!(LANE, 2);
|
||||
unsafe {
|
||||
let b: int32x4_t =
|
||||
simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]);
|
||||
vqrdmulhq_s32(a, b)
|
||||
}
|
||||
let b = vdupq_laneq_s32::<LANE>(b);
|
||||
vqrdmulhq_s32(a, b)
|
||||
}
|
||||
#[doc = "Vector saturating rounding doubling multiply high with scalar"]
|
||||
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqrdmulh_n_s16)"]
|
||||
|
||||
@@ -6963,11 +6963,11 @@ intrinsics:
|
||||
- *neon-stable
|
||||
safety: safe
|
||||
types:
|
||||
- [int16x8_t, int32x4_t, int16x4_t, '[4, 5, 6, 7]']
|
||||
- [int32x4_t, int64x2_t, int32x2_t, '[2, 3]']
|
||||
- [int16x8_t, int32x4_t]
|
||||
- [int32x4_t, int64x2_t]
|
||||
compose:
|
||||
- Let: [a, "{neon_type[2]}", {FnCall: [simd_shuffle!, [a, a, '{type[3]}']]}]
|
||||
- Let: [b, "{neon_type[2]}", {FnCall: [simd_shuffle!, [b, b, '{type[3]}']]}]
|
||||
- Let: [a, {FnCall: ['vget_high_{neon_type[0]}', [a]]}]
|
||||
- Let: [b, {FnCall: ['vget_high_{neon_type[0]}', [b]]}]
|
||||
- FnCall: ["vqdmull{neon_type[0].noq}", [a, b]]
|
||||
|
||||
- name: "vqdmull_high_n_{type[1]}"
|
||||
@@ -6979,11 +6979,11 @@ intrinsics:
|
||||
- *neon-stable
|
||||
safety: safe
|
||||
types:
|
||||
- [int16x8_t, "i16", int32x4_t, int16x4_t, '[4, 5, 6, 7]']
|
||||
- [int32x4_t, "i32", int64x2_t, int32x2_t, '[2, 3]']
|
||||
- [int16x8_t, "i16", int32x4_t]
|
||||
- [int32x4_t, "i32", int64x2_t]
|
||||
compose:
|
||||
- Let: [a, "{neon_type[3]}", {FnCall: [simd_shuffle!, [a, a, "{type[4]}"]]}]
|
||||
- Let: [b, "{neon_type[3]}", {FnCall: ["vdup_n{neon_type[0].noq}", [b]]}]
|
||||
- Let: [a, {FnCall: ['vget_high_{neon_type[0]}', [a]]}]
|
||||
- Let: [b, {FnCall: ["vdup_n{neon_type[0].noq}", [b]]}]
|
||||
- FnCall: ["vqdmull{neon_type[0].noq}", [a, b]]
|
||||
|
||||
- name: "vqdmull{type[3]}"
|
||||
@@ -7038,7 +7038,7 @@ intrinsics:
|
||||
- Let: [b, "{type[0]}", {FnCall: ['vget{neon_type[1].lane_nox}', [b], [N]]}]
|
||||
- FnCall: ["vqdmulls_s32", [a, b]]
|
||||
|
||||
- name: "vqdmull{type[6]}"
|
||||
- name: "vqdmull{type[3]}"
|
||||
doc: "Signed saturating doubling multiply long"
|
||||
arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}"]
|
||||
return_type: "{neon_type[2]}"
|
||||
@@ -7049,12 +7049,12 @@ intrinsics:
|
||||
static_defs: ['const N: i32']
|
||||
safety: safe
|
||||
types:
|
||||
- [int16x8_t, int16x4_t, int32x4_t, int16x4_t, '[4, 5, 6, 7]', '[N as u32, N as u32, N as u32, N as u32]', '_high_lane_s16']
|
||||
- [int32x4_t, int32x4_t, int64x2_t, int32x2_t, '[2, 3]', '[N as u32, N as u32]', '_high_laneq_s32']
|
||||
- [int16x8_t, int16x4_t, int32x4_t, '_high_lane_s16']
|
||||
- [int32x4_t, int32x4_t, int64x2_t, '_high_laneq_s32']
|
||||
compose:
|
||||
- FnCall: [static_assert_uimm_bits!, [N, '2']]
|
||||
- Let: [a, "{neon_type[3]}", {FnCall: [simd_shuffle!, [a, a, "{type[4]}"]]}]
|
||||
- Let: [b, "{neon_type[3]}", {FnCall: [simd_shuffle!, [b, b, "{type[5]}"]]}]
|
||||
- Let: [a, {FnCall: ['vget_high_{neon_type[0]}', [a]]}]
|
||||
- Let: [b, {FnCall: ['vdup_lane{neon_type[1].nox}', [b], [N]]}]
|
||||
- FnCall: ["vqdmull{neon_type[0].noq}", [a, b]]
|
||||
|
||||
- name: "vqdmull_high_lane_s32"
|
||||
@@ -7068,11 +7068,11 @@ intrinsics:
|
||||
static_defs: ['const N: i32']
|
||||
safety: safe
|
||||
types:
|
||||
- [int32x4_t, int32x2_t, int64x2_t, int32x2_t, '[2, 3]', '[N as u32, N as u32]']
|
||||
- [int32x4_t, int32x2_t, int64x2_t]
|
||||
compose:
|
||||
- FnCall: [static_assert_uimm_bits!, [N, '1']]
|
||||
- Let: [a, "{neon_type[3]}", {FnCall: [simd_shuffle!, [a, a, "{type[4]}"]]}]
|
||||
- Let: [b, "{neon_type[3]}", {FnCall: [simd_shuffle!, [b, b, "{type[5]}"]]}]
|
||||
- Let: [a, {FnCall: ['vget_high_{neon_type[0]}', [a]]}]
|
||||
- Let: [b, {FnCall: ['vdup_lane{neon_type[1].nox}', [b], [N]]}]
|
||||
- FnCall: ["vqdmull{neon_type[0].noq}", [a, b]]
|
||||
|
||||
- name: "vqdmull_high_laneq_s16"
|
||||
@@ -7086,11 +7086,11 @@ intrinsics:
|
||||
static_defs: ['const N: i32']
|
||||
safety: safe
|
||||
types:
|
||||
- [int16x8_t, int16x8_t, int32x4_t, int16x4_t, '[4, 5, 6, 7]', '[N as u32, N as u32, N as u32, N as u32]']
|
||||
- [int16x8_t, int16x8_t, int32x4_t]
|
||||
compose:
|
||||
- FnCall: [static_assert_uimm_bits!, [N, '3']]
|
||||
- Let: [a, "{neon_type[3]}", {FnCall: [simd_shuffle!, [a, a, "{type[4]}"]]}]
|
||||
- Let: [b, "{neon_type[3]}", {FnCall: [simd_shuffle!, [b, b, "{type[5]}"]]}]
|
||||
- Let: [a, {FnCall: ['vget_high_{neon_type[0]}', [a]]}]
|
||||
- Let: [b, {FnCall: ['vdup_lane{neon_type[1].nox}', [b], [N]]}]
|
||||
- FnCall: ["vqdmull{neon_type[0].noq}", [a, b]]
|
||||
|
||||
- name: "vqdmull_laneq_s16"
|
||||
@@ -7104,10 +7104,10 @@ intrinsics:
|
||||
static_defs: ['const N: i32']
|
||||
safety: safe
|
||||
types:
|
||||
- [int16x4_t, int16x8_t, int32x4_t, '[N as u32, N as u32, N as u32, N as u32]']
|
||||
- [int16x4_t, int16x8_t, int32x4_t]
|
||||
compose:
|
||||
- FnCall: [static_assert_uimm_bits!, [N, '3']]
|
||||
- Let: [b, "{neon_type[0]}", {FnCall: [simd_shuffle!, [b, b, "{type[3]}"]]}]
|
||||
- Let: [b, {FnCall: ['vdup_lane{neon_type[1].nox}', [b], [N]]}]
|
||||
- FnCall: [vqdmull_s16, [a, b]]
|
||||
|
||||
- name: "vqdmull_laneq_s32"
|
||||
@@ -7121,10 +7121,10 @@ intrinsics:
|
||||
static_defs: ['const N: i32']
|
||||
safety: safe
|
||||
types:
|
||||
- [int32x2_t, int32x4_t, int64x2_t, '[N as u32, N as u32]']
|
||||
- [int32x2_t, int32x4_t, int64x2_t]
|
||||
compose:
|
||||
- FnCall: [static_assert_uimm_bits!, [N, '2']]
|
||||
- Let: [b, "{neon_type[0]}", {FnCall: [simd_shuffle!, [b, b, "{type[3]}"]]}]
|
||||
- Let: [b, {FnCall: ['vdup_lane{neon_type[1].nox}', [b], [N]]}]
|
||||
- FnCall: [vqdmull_s32, [a, b]]
|
||||
|
||||
- name: "vqdmlal{type[4]}"
|
||||
|
||||
@@ -7590,7 +7590,7 @@ intrinsics:
|
||||
- [int16x4_t, int16x4_t, int32x4_t, '[N as u32; 4]']
|
||||
compose:
|
||||
- FnCall: [static_assert_uimm_bits!, [N, '2']]
|
||||
- Let: [b, "{neon_type[0]}", {FnCall: [simd_shuffle!, [b, b, "{type[3]}"]]}]
|
||||
- Let: [b, {FnCall: ['vdup{neon_type[0].lane_nox}', [b], [N]]}]
|
||||
- FnCall: [vqdmull_s16, [a, b]]
|
||||
|
||||
- name: "vqdmull_lane_s32"
|
||||
@@ -7607,10 +7607,10 @@ intrinsics:
|
||||
static_defs: ['const N: i32']
|
||||
safety: safe
|
||||
types:
|
||||
- [int32x2_t, int32x2_t, int64x2_t, '[N as u32; 2]']
|
||||
- [int32x2_t, int32x2_t, int64x2_t]
|
||||
compose:
|
||||
- FnCall: [static_assert_uimm_bits!, [N, '1']]
|
||||
- Let: [b, "{neon_type[0]}", {FnCall: [simd_shuffle!, [b, b, "{type[3]}"]]}]
|
||||
- Let: [b, {FnCall: ['vdup{neon_type[0].lane_nox}', [b], [N]]}]
|
||||
- FnCall: [vqdmull_s32, [a, b]]
|
||||
|
||||
- name: "vqdmlal{neon_type[1].noq}"
|
||||
@@ -11230,17 +11230,17 @@ intrinsics:
|
||||
static_defs: ['const LANE: i32']
|
||||
safety: safe
|
||||
types:
|
||||
- [_lane_s16, int16x4_t, int16x4_t, '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
|
||||
- [_laneq_s16, int16x4_t, int16x8_t, '3', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
|
||||
- [q_lane_s16, int16x8_t, int16x4_t, '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
|
||||
- [q_laneq_s16, int16x8_t, int16x8_t, '3', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
|
||||
- [_lane_s32, int32x2_t, int32x2_t, '1', '[LANE as u32, LANE as u32]']
|
||||
- [_laneq_s32, int32x2_t, int32x4_t, '2', '[LANE as u32, LANE as u32]']
|
||||
- [q_lane_s32, int32x4_t, int32x2_t, '1', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
|
||||
- [q_laneq_s32, int32x4_t, int32x4_t, '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
|
||||
- [_lane_s16, int16x4_t, int16x4_t, '2']
|
||||
- [_laneq_s16, int16x4_t, int16x8_t, '3']
|
||||
- [q_lane_s16, int16x8_t, int16x4_t, '2']
|
||||
- [q_laneq_s16, int16x8_t, int16x8_t, '3']
|
||||
- [_lane_s32, int32x2_t, int32x2_t, '1']
|
||||
- [_laneq_s32, int32x2_t, int32x4_t, '2']
|
||||
- [q_lane_s32, int32x4_t, int32x2_t, '1']
|
||||
- [q_laneq_s32, int32x4_t, int32x4_t, '2']
|
||||
compose:
|
||||
- FnCall: [static_assert_uimm_bits!, [LANE, "{type[3]}"]]
|
||||
- Let: [b, "{neon_type[1]}", {FnCall: [simd_shuffle!, [b, b, '{type[4]}']]}]
|
||||
- Let: [b, {FnCall: ['vdup{type[0]}', [b], [LANE]]}]
|
||||
- FnCall: ["vqrdmulh{neon_type[1].no}", [a, b]]
|
||||
|
||||
- name: "vqrdmulh{neon_type[0].N}"
|
||||
|
||||
Reference in New Issue
Block a user