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Change implementation of vmul_lane

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This commit is contained in:
sayantn
2026-05-09 06:10:10 +05:30
parent 3dd1690288
commit cee8ece450
4 changed files with 57 additions and 202 deletions
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library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs
+4 -4
View File
@@ -12591,7 +12591,7 @@ pub fn vmul_lane_f64<const LANE: i32>(a: float64x1_t, b: float64x1_t) -> float64
#[cfg(not(target_arch = "arm64ec"))]
pub fn vmul_laneq_f16<const LANE: i32>(a: float16x4_t, b: float16x8_t) -> float16x4_t {
static_assert_uimm_bits!(LANE, 3);
unsafe { simd_mul(a, simd_shuffle!(b, b, [LANE as u32; 4])) }
unsafe { simd_mul(a, vdup_laneq_f16::<LANE>(b)) }
}
#[doc = "Floating-point multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_laneq_f16)"]
@@ -12603,7 +12603,7 @@ pub fn vmul_laneq_f16<const LANE: i32>(a: float16x4_t, b: float16x8_t) -> float1
#[cfg(not(target_arch = "arm64ec"))]
pub fn vmulq_laneq_f16<const LANE: i32>(a: float16x8_t, b: float16x8_t) -> float16x8_t {
static_assert_uimm_bits!(LANE, 3);
unsafe { simd_mul(a, simd_shuffle!(b, b, [LANE as u32; 8])) }
unsafe { simd_mul(a, vdupq_laneq_f16::<LANE>(b)) }
}
#[doc = "Floating-point multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmul_laneq_f64)"]
@@ -12917,7 +12917,7 @@ pub fn vmull_p64(a: p64, b: p64) -> p128 {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vmulq_lane_f64<const LANE: i32>(a: float64x2_t, b: float64x1_t) -> float64x2_t {
static_assert!(LANE == 0);
unsafe { simd_mul(a, simd_shuffle!(b, b, [LANE as u32; 2])) }
unsafe { simd_mul(a, vdupq_lane_f64::<LANE>(b)) }
}
#[doc = "Floating-point multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_laneq_f64)"]
@@ -12928,7 +12928,7 @@ pub fn vmulq_lane_f64<const LANE: i32>(a: float64x2_t, b: float64x1_t) -> float6
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vmulq_laneq_f64<const LANE: i32>(a: float64x2_t, b: float64x2_t) -> float64x2_t {
static_assert_uimm_bits!(LANE, 1);
unsafe { simd_mul(a, simd_shuffle!(b, b, [LANE as u32; 2])) }
unsafe { simd_mul(a, vdupq_laneq_f64::<LANE>(b)) }
}
#[doc = "Floating-point multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmuls_lane_f32)"]
library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs
+22 -167
View File
@@ -29763,12 +29763,7 @@ pub fn vmulq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
#[cfg(not(target_arch = "arm64ec"))]
pub fn vmul_lane_f16<const LANE: i32>(a: float16x4_t, v: float16x4_t) -> float16x4_t {
static_assert_uimm_bits!(LANE, 2);
unsafe {
simd_mul(
a,
simd_shuffle!(v, v, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]),
)
}
unsafe { simd_mul(a, vdup_lane_f16::<LANE>(v)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_lane_f16)"]
@@ -29792,25 +29787,7 @@ pub fn vmul_lane_f16<const LANE: i32>(a: float16x4_t, v: float16x4_t) -> float16
#[cfg(not(target_arch = "arm64ec"))]
pub fn vmulq_lane_f16<const LANE: i32>(a: float16x8_t, v: float16x4_t) -> float16x8_t {
static_assert_uimm_bits!(LANE, 2);
unsafe {
simd_mul(
a,
simd_shuffle!(
v,
v,
[
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32
]
),
)
}
unsafe { simd_mul(a, vdupq_lane_f16::<LANE>(v)) }
}
#[doc = "Floating-point multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmul_lane_f32)"]
@@ -29833,7 +29810,7 @@ pub fn vmulq_lane_f16<const LANE: i32>(a: float16x8_t, v: float16x4_t) -> float1
)]
pub fn vmul_lane_f32<const LANE: i32>(a: float32x2_t, b: float32x2_t) -> float32x2_t {
static_assert_uimm_bits!(LANE, 1);
unsafe { simd_mul(a, simd_shuffle!(b, b, [LANE as u32, LANE as u32])) }
unsafe { simd_mul(a, vdup_lane_f32::<LANE>(b)) }
}
#[doc = "Floating-point multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmul_laneq_f32)"]
@@ -29856,7 +29833,7 @@ pub fn vmul_lane_f32<const LANE: i32>(a: float32x2_t, b: float32x2_t) -> float32
)]
pub fn vmul_laneq_f32<const LANE: i32>(a: float32x2_t, b: float32x4_t) -> float32x2_t {
static_assert_uimm_bits!(LANE, 2);
unsafe { simd_mul(a, simd_shuffle!(b, b, [LANE as u32, LANE as u32])) }
unsafe { simd_mul(a, vdup_laneq_f32::<LANE>(b)) }
}
#[doc = "Floating-point multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_lane_f32)"]
@@ -29879,12 +29856,7 @@ pub fn vmul_laneq_f32<const LANE: i32>(a: float32x2_t, b: float32x4_t) -> float3
)]
pub fn vmulq_lane_f32<const LANE: i32>(a: float32x4_t, b: float32x2_t) -> float32x4_t {
static_assert_uimm_bits!(LANE, 1);
unsafe {
simd_mul(
a,
simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]),
)
}
unsafe { simd_mul(a, vdupq_lane_f32::<LANE>(b)) }
}
#[doc = "Floating-point multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_laneq_f32)"]
@@ -29907,12 +29879,7 @@ pub fn vmulq_lane_f32<const LANE: i32>(a: float32x4_t, b: float32x2_t) -> float3
)]
pub fn vmulq_laneq_f32<const LANE: i32>(a: float32x4_t, b: float32x4_t) -> float32x4_t {
static_assert_uimm_bits!(LANE, 2);
unsafe {
simd_mul(
a,
simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]),
)
}
unsafe { simd_mul(a, vdupq_laneq_f32::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmul_lane_s16)"]
@@ -29935,12 +29902,7 @@ pub fn vmulq_laneq_f32<const LANE: i32>(a: float32x4_t, b: float32x4_t) -> float
)]
pub fn vmul_lane_s16<const LANE: i32>(a: int16x4_t, b: int16x4_t) -> int16x4_t {
static_assert_uimm_bits!(LANE, 2);
unsafe {
simd_mul(
a,
simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]),
)
}
unsafe { simd_mul(a, vdup_lane_s16::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_lane_s16)"]
@@ -29963,25 +29925,7 @@ pub fn vmul_lane_s16<const LANE: i32>(a: int16x4_t, b: int16x4_t) -> int16x4_t {
)]
pub fn vmulq_lane_s16<const LANE: i32>(a: int16x8_t, b: int16x4_t) -> int16x8_t {
static_assert_uimm_bits!(LANE, 2);
unsafe {
simd_mul(
a,
simd_shuffle!(
b,
b,
[
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32
]
),
)
}
unsafe { simd_mul(a, vdupq_lane_s16::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmul_lane_s32)"]
@@ -30004,7 +29948,7 @@ pub fn vmulq_lane_s16<const LANE: i32>(a: int16x8_t, b: int16x4_t) -> int16x8_t
)]
pub fn vmul_lane_s32<const LANE: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t {
static_assert_uimm_bits!(LANE, 1);
unsafe { simd_mul(a, simd_shuffle!(b, b, [LANE as u32, LANE as u32])) }
unsafe { simd_mul(a, vdup_lane_s32::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_lane_s32)"]
@@ -30027,12 +29971,7 @@ pub fn vmul_lane_s32<const LANE: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t {
)]
pub fn vmulq_lane_s32<const LANE: i32>(a: int32x4_t, b: int32x2_t) -> int32x4_t {
static_assert_uimm_bits!(LANE, 1);
unsafe {
simd_mul(
a,
simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]),
)
}
unsafe { simd_mul(a, vdupq_lane_s32::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmul_lane_u16)"]
@@ -30055,12 +29994,7 @@ pub fn vmulq_lane_s32<const LANE: i32>(a: int32x4_t, b: int32x2_t) -> int32x4_t
)]
pub fn vmul_lane_u16<const LANE: i32>(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
static_assert_uimm_bits!(LANE, 2);
unsafe {
simd_mul(
a,
simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]),
)
}
unsafe { simd_mul(a, vdup_lane_u16::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_lane_u16)"]
@@ -30083,25 +30017,7 @@ pub fn vmul_lane_u16<const LANE: i32>(a: uint16x4_t, b: uint16x4_t) -> uint16x4_
)]
pub fn vmulq_lane_u16<const LANE: i32>(a: uint16x8_t, b: uint16x4_t) -> uint16x8_t {
static_assert_uimm_bits!(LANE, 2);
unsafe {
simd_mul(
a,
simd_shuffle!(
b,
b,
[
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32
]
),
)
}
unsafe { simd_mul(a, vdupq_lane_u16::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmul_lane_u32)"]
@@ -30124,7 +30040,7 @@ pub fn vmulq_lane_u16<const LANE: i32>(a: uint16x8_t, b: uint16x4_t) -> uint16x8
)]
pub fn vmul_lane_u32<const LANE: i32>(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
static_assert_uimm_bits!(LANE, 1);
unsafe { simd_mul(a, simd_shuffle!(b, b, [LANE as u32, LANE as u32])) }
unsafe { simd_mul(a, vdup_lane_u32::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_lane_u32)"]
@@ -30147,12 +30063,7 @@ pub fn vmul_lane_u32<const LANE: i32>(a: uint32x2_t, b: uint32x2_t) -> uint32x2_
)]
pub fn vmulq_lane_u32<const LANE: i32>(a: uint32x4_t, b: uint32x2_t) -> uint32x4_t {
static_assert_uimm_bits!(LANE, 1);
unsafe {
simd_mul(
a,
simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]),
)
}
unsafe { simd_mul(a, vdupq_lane_u32::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmul_laneq_s16)"]
@@ -30175,12 +30086,7 @@ pub fn vmulq_lane_u32<const LANE: i32>(a: uint32x4_t, b: uint32x2_t) -> uint32x4
)]
pub fn vmul_laneq_s16<const LANE: i32>(a: int16x4_t, b: int16x8_t) -> int16x4_t {
static_assert_uimm_bits!(LANE, 3);
unsafe {
simd_mul(
a,
simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]),
)
}
unsafe { simd_mul(a, vdup_laneq_s16::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_laneq_s16)"]
@@ -30203,25 +30109,7 @@ pub fn vmul_laneq_s16<const LANE: i32>(a: int16x4_t, b: int16x8_t) -> int16x4_t
)]
pub fn vmulq_laneq_s16<const LANE: i32>(a: int16x8_t, b: int16x8_t) -> int16x8_t {
static_assert_uimm_bits!(LANE, 3);
unsafe {
simd_mul(
a,
simd_shuffle!(
b,
b,
[
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32
]
),
)
}
unsafe { simd_mul(a, vdupq_laneq_s16::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmul_laneq_s32)"]
@@ -30244,7 +30132,7 @@ pub fn vmulq_laneq_s16<const LANE: i32>(a: int16x8_t, b: int16x8_t) -> int16x8_t
)]
pub fn vmul_laneq_s32<const LANE: i32>(a: int32x2_t, b: int32x4_t) -> int32x2_t {
static_assert_uimm_bits!(LANE, 2);
unsafe { simd_mul(a, simd_shuffle!(b, b, [LANE as u32, LANE as u32])) }
unsafe { simd_mul(a, vdup_laneq_s32::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_laneq_s32)"]
@@ -30267,12 +30155,7 @@ pub fn vmul_laneq_s32<const LANE: i32>(a: int32x2_t, b: int32x4_t) -> int32x2_t
)]
pub fn vmulq_laneq_s32<const LANE: i32>(a: int32x4_t, b: int32x4_t) -> int32x4_t {
static_assert_uimm_bits!(LANE, 2);
unsafe {
simd_mul(
a,
simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]),
)
}
unsafe { simd_mul(a, vdupq_laneq_s32::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmul_laneq_u16)"]
@@ -30295,12 +30178,7 @@ pub fn vmulq_laneq_s32<const LANE: i32>(a: int32x4_t, b: int32x4_t) -> int32x4_t
)]
pub fn vmul_laneq_u16<const LANE: i32>(a: uint16x4_t, b: uint16x8_t) -> uint16x4_t {
static_assert_uimm_bits!(LANE, 3);
unsafe {
simd_mul(
a,
simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]),
)
}
unsafe { simd_mul(a, vdup_laneq_u16::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_laneq_u16)"]
@@ -30323,25 +30201,7 @@ pub fn vmul_laneq_u16<const LANE: i32>(a: uint16x4_t, b: uint16x8_t) -> uint16x4
)]
pub fn vmulq_laneq_u16<const LANE: i32>(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
static_assert_uimm_bits!(LANE, 3);
unsafe {
simd_mul(
a,
simd_shuffle!(
b,
b,
[
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32,
LANE as u32
]
),
)
}
unsafe { simd_mul(a, vdupq_laneq_u16::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmul_laneq_u32)"]
@@ -30364,7 +30224,7 @@ pub fn vmulq_laneq_u16<const LANE: i32>(a: uint16x8_t, b: uint16x8_t) -> uint16x
)]
pub fn vmul_laneq_u32<const LANE: i32>(a: uint32x2_t, b: uint32x4_t) -> uint32x2_t {
static_assert_uimm_bits!(LANE, 2);
unsafe { simd_mul(a, simd_shuffle!(b, b, [LANE as u32, LANE as u32])) }
unsafe { simd_mul(a, vdup_laneq_u32::<LANE>(b)) }
}
#[doc = "Multiply"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmulq_laneq_u32)"]
@@ -30387,12 +30247,7 @@ pub fn vmul_laneq_u32<const LANE: i32>(a: uint32x2_t, b: uint32x4_t) -> uint32x2
)]
pub fn vmulq_laneq_u32<const LANE: i32>(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
static_assert_uimm_bits!(LANE, 2);
unsafe {
simd_mul(
a,
simd_shuffle!(b, b, [LANE as u32, LANE as u32, LANE as u32, LANE as u32]),
)
}
unsafe { simd_mul(a, vdupq_laneq_u32::<LANE>(b)) }
}
#[doc = "Vector multiply by scalar"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmul_n_f16)"]
library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml
+5 -5
View File
@@ -11006,7 +11006,7 @@ intrinsics:
- FnCall:
- simd_mul
- - a
- FnCall: ["simd_shuffle!", [b, b, '[LANE as u32; 2]']]
- FnCall: [vdupq_lane_f64, [b], [LANE]]
- name: "vmuld_lane_f64"
doc: "Floating-point multiply"
@@ -11063,7 +11063,7 @@ intrinsics:
- FnCall:
- simd_mul
- - a
- FnCall: [simd_shuffle!, [b, b, '[LANE as u32; 2]']]
- FnCall: [vdupq_laneq_f64, [b], [LANE]]
# vmulq_laneq_f16
@@ -11080,14 +11080,14 @@ intrinsics:
static_defs: ['const LANE: i32']
safety: safe
types:
- [float16x4_t, float16x8_t, '_lane', "[LANE as u32; 4]"]
- [float16x8_t, float16x8_t, 'q_lane', "[LANE as u32; 8]"]
- [float16x4_t, float16x8_t, '_lane']
- [float16x8_t, float16x8_t, 'q_lane']
compose:
- FnCall: [static_assert_uimm_bits!, [LANE, '3']]
- FnCall:
- simd_mul
- - a
- FnCall: [simd_shuffle!, [b, b, "{type[3]}"]]
- FnCall: ['vdup{neon_type[0].laneq_nox}', [b], [LANE]]
- name: "vmul{type[1]}_{type[0]}"
library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml
+26 -26
View File
@@ -6300,20 +6300,20 @@ intrinsics:
static_defs: ["const LANE: i32"]
safety: safe
types:
- [int16x4_t, int16x4_t, '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [int16x8_t, int16x4_t, '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [int32x2_t, int32x2_t, '1', '[LANE as u32, LANE as u32]']
- [int32x4_t, int32x2_t, '1', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [uint16x4_t, uint16x4_t, '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [uint16x8_t, uint16x4_t, '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [uint32x2_t, uint32x2_t, '1', '[LANE as u32, LANE as u32]']
- [uint32x4_t, uint32x2_t, '1', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [int16x4_t, int16x4_t, '2']
- [int16x8_t, int16x4_t, '2']
- [int32x2_t, int32x2_t, '1']
- [int32x4_t, int32x2_t, '1']
- [uint16x4_t, uint16x4_t, '2']
- [uint16x8_t, uint16x4_t, '2']
- [uint32x2_t, uint32x2_t, '1']
- [uint32x4_t, uint32x2_t, '1']
compose:
- FnCall: ["static_assert_uimm_bits!", [LANE, "{type[2]}"]]
- FnCall:
- simd_mul
- - a
- FnCall: ["simd_shuffle!", [b, b, "{type[3]}"]]
- FnCall: ["vdup{neon_type[0].lane_nox}", [b], [LANE]]
- name: "vmul{neon_type[0].lane_nox}"
@@ -6332,14 +6332,14 @@ intrinsics:
static_defs: ["const LANE: i32"]
safety: safe
types:
- [float16x4_t, float16x4_t, '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [float16x8_t, float16x4_t, '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [float16x4_t, float16x4_t, '2']
- [float16x8_t, float16x4_t, '2']
compose:
- FnCall: ["static_assert_uimm_bits!", [LANE, "{type[2]}"]]
- FnCall:
- simd_mul
- - a
- FnCall: ["simd_shuffle!", [v, v, "{type[3]}"]]
- FnCall: ["vdup{neon_type[0].lane_nox}", [v], [LANE]]
- name: "vmul{neon_type[0].laneq_nox}"
@@ -6356,20 +6356,20 @@ intrinsics:
static_defs: ["const LANE: i32"]
safety: safe
types:
- [int16x4_t, int16x8_t, '3', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [int16x8_t, int16x8_t, '3', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [int32x2_t, int32x4_t, '2', '[LANE as u32, LANE as u32]']
- [int32x4_t, int32x4_t, '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [uint16x4_t, uint16x8_t, '3', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [uint16x8_t, uint16x8_t, '3', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [uint32x2_t, uint32x4_t, '2', '[LANE as u32, LANE as u32]']
- [uint32x4_t, uint32x4_t, '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [int16x4_t, int16x8_t, '3']
- [int16x8_t, int16x8_t, '3']
- [int32x2_t, int32x4_t, '2']
- [int32x4_t, int32x4_t, '2']
- [uint16x4_t, uint16x8_t, '3']
- [uint16x8_t, uint16x8_t, '3']
- [uint32x2_t, uint32x4_t, '2']
- [uint32x4_t, uint32x4_t, '2']
compose:
- FnCall: ["static_assert_uimm_bits!", [LANE, "{type[2]}"]]
- FnCall:
- simd_mul
- - a
- FnCall: ["simd_shuffle!", [b, b, "{type[3]}"]]
- FnCall: ["vdup{neon_type[0].laneq_nox}", [b], [LANE]]
- name: "vmull{neon_type[1].no}"
doc: Signed multiply long
@@ -11204,16 +11204,16 @@ intrinsics:
static_defs: ['const LANE: i32']
safety: safe
types:
- [float32x2_t, float32x2_t, '_lane_f32', '1', '[LANE as u32, LANE as u32]']
- [float32x2_t, float32x4_t, '_laneq_f32', '2', '[LANE as u32, LANE as u32]']
- [float32x4_t, float32x2_t, 'q_lane_f32', '1', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [float32x4_t, float32x4_t, 'q_laneq_f32', '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']
- [float32x2_t, float32x2_t, '_lane_f32', '1']
- [float32x2_t, float32x4_t, '_laneq_f32', '2']
- [float32x4_t, float32x2_t, 'q_lane_f32', '1']
- [float32x4_t, float32x4_t, 'q_laneq_f32', '2']
compose:
- FnCall: [static_assert_uimm_bits!, [LANE, '{type[3]}']]
- FnCall:
- simd_mul
- - a
- FnCall: [simd_shuffle!, [b, b, "{type[4]}"]]
- FnCall: ['vdup{type[2]}', [b], [LANE]]
- name: "vqrdmulh{type[0]}"
doc: "Vector rounding saturating doubling multiply high by scalar"