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Change implementation of vcvt{x}_f32_f64

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sayantn
2026-05-09 04:14:58 +05:30
parent 8d56c77c04
commit 4871c490cb
2 changed files with 7 additions and 20 deletions
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library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs
+3 -6
View File
@@ -5093,7 +5093,7 @@ pub fn vcvt_high_f32_f16(a: float16x8_t) -> float32x4_t {
#[cfg_attr(all(test, target_endian = "little"), assert_instr(fcvtn2))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vcvt_high_f32_f64(a: float32x2_t, b: float64x2_t) -> float32x4_t {
unsafe { simd_shuffle!(a, simd_cast(b), [0, 1, 2, 3]) }
vcombine_f32(a, vcvt_f32_f64(b))
}
#[doc = "Floating-point convert to higher precision long"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt_high_f64_f32)"]
@@ -5102,10 +5102,7 @@ pub fn vcvt_high_f32_f64(a: float32x2_t, b: float64x2_t) -> float32x4_t {
#[cfg_attr(all(test, target_endian = "little"), assert_instr(fcvtl2))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vcvt_high_f64_f32(a: float32x4_t) -> float64x2_t {
unsafe {
let b: float32x2_t = simd_shuffle!(a, a, [2, 3]);
simd_cast(b)
}
unsafe { simd_cast(vget_high_f32(a)) }
}
#[doc = "Fixed-point convert to floating-point"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvt_n_f64_s64)"]
@@ -7266,7 +7263,7 @@ pub fn vcvtx_f32_f64(a: float64x2_t) -> float32x2_t {
#[cfg_attr(all(test, target_endian = "little"), assert_instr(fcvtxn2))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vcvtx_high_f32_f64(a: float32x2_t, b: float64x2_t) -> float32x4_t {
unsafe { simd_shuffle!(a, vcvtx_f32_f64(b), [0, 1, 2, 3]) }
vcombine_f32(a, vcvtx_f32_f64(b))
}
#[doc = "Floating-point convert to lower precision narrow, rounding to odd"]
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcvtxd_f32_f64)"]
library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml
+4 -14
View File
@@ -1417,15 +1417,7 @@ intrinsics:
types:
- [float32x4_t, float64x2_t]
compose:
- Let:
- b
- float32x2_t
- FnCall:
- simd_shuffle!
- - a
- a
- '[2, 3]'
- FnCall: [simd_cast, [b]]
- FnCall: [simd_cast, [{FnCall: ['vget_high_{neon_type[0]}', [a]]}]]
- name: "vcvt_high_f16_f32"
doc: "Floating-point convert to lower precision"
@@ -1486,10 +1478,9 @@ intrinsics:
- [float32x2_t, float64x2_t, float32x4_t]
compose:
- FnCall:
- simd_shuffle!
- vcombine_f32
- - a
- FnCall: [simd_cast, [b]]
- '[0, 1, 2, 3]'
- FnCall: [vcvt_f32_f64, [b]]
- name: "vcvtx_f32_f64"
doc: "Floating-point convert to lower precision narrow, rounding to odd"
@@ -1538,10 +1529,9 @@ intrinsics:
- [float32x2_t, float64x2_t, float32x4_t]
compose:
- FnCall:
- simd_shuffle!
- vcombine_f32
- - a
- FnCall: [vcvtx_f32_f64, [b]]
- '[0, 1, 2, 3]'
- name: "vcvt{type[2]}"
doc: "Floating-point convert to fixed-point, rounding toward zero"