3077 Commits

Author SHA1 Message Date
bors 6f109d8a2d Auto merge of #155223 - teor2345:fndef-refactor, r=mati865
Refactor FnDecl and FnSig non-type fields into a new wrapper type





#### Why this Refactor?

This PR is part of an initial cleanup for the [arg splat experiment](https://github.com/rust-lang/rust/issues/153629), but it's a useful refactor by itself.

It refactors the non-type fields of `FnDecl`, `FnSig`, and `FnHeader` into a new packed wrapper types, based on this comment in the `splat` experiment PR:
https://github.com/rust-lang/rust/pull/153697#discussion_r3004637413

It also refactors some common `FnSig` creation settings into their own methods. I did this instead of creating a struct with defaults.

#### Relationship to `splat` Experiment

I don't think we can use functional struct updates (`..default()`) to create `FnDecl` and `FnSig`, because we need the bit-packing for the `splat` experiment.

Bit-packing will avoid breaking "type is small" assertions for commonly used types when `splat` is added.
This PR packs these types:
- ExternAbi: enum + `unwind` variants (38) -> 6 bits
- ImplicitSelfKind: enum variants (5) -> 3 bits
- lifetime_elision_allowed, safety, c_variadic: bool -> 1 bit

#### Minor Changes

Fixes some typos, and applies rustfmt to clippy files that got skipped somehow.
2026-04-18 23:46:37 +00:00
teor 88adf7772d Fix typos near the refactor 2026-04-16 07:08:07 +10:00
Amanieu d'Antras 9e4d2a7ca8 Merge pull request #2071 from davidtwco/sve-intrinsics
initial SVE intrinsics
2026-04-15 12:47:10 +00:00
Folkert de Vries bbc45547f3 Merge pull request #2079 from eduardosm/mips-tests
Fix MIPS tests
2026-04-15 10:04:09 +00:00
Eduardo Sánchez Muñoz 69aad1af38 Fix MIPS tests
Tests failed to build due to use of legacy const generics syntax, out-of-bounds immediates and incorrect name of const generics in `assert_instr`
2026-04-14 19:55:48 +02:00
David Wood b0d91aa86c core_arch: disable ld/st tests on msvc
There seemed to be non-deterministic failures on MSVC that looked like
corruption of the FFR in CI. Until this can be investigated, to avoid any
spurious failures, these tests are disabled.
2026-04-14 04:05:10 +00:00
David Wood b181867738 gen-arm: assert_instr on msvc for [su]mull[tb]
`dumpbin.exe` produces `44a1c000`/`44e1c000`/`44a1c400`/`44e1c400` for
`[su]mull[tb]` instead of the instruction name - so skip `assert_instr`
for these intrinsics on MSVC targets.
2026-04-14 02:59:59 +00:00
David Wood e6c0129553 stdarch-test: [us]shll[tb] have no aliases
SVE's `[us]shll[tb]` intructions have no aliases unlike Neon's
`[us]hll{2}` so this logic needs adjusted to not accidentally rewrite
the instruction.
2026-04-14 01:47:11 +00:00
David Wood acb48ca2ca gen-arm: disable assert_instr for pfalse
The implementation for this has the same behaviour as a `pfalse` but
doesn't currently emit one until an intrinsic is added to emit a
`zeroinitializer` for this.
2026-04-14 01:47:06 +00:00
David Wood 88b4908583 assert-instr: support type generics
SVE intrinsics have both type and const generics and so the
`assert_instr` macro needs to be able to generate test cases with the
type generics instantiated with the types provided in the attribute.

Co-authored-by: Jamie Cunliffe <Jamie.Cunliffe@arm.com>
Co-authored-by: Luca Vizzarro <Luca.Vizzarro@arm.com>
Co-authored-by: Adam Gemmell <adam.gemmell@arm.com>
Co-authored-by: Jacob Bramley <jacob.bramley@arm.com>
2026-04-14 00:54:55 +00:00
David Wood c21d4e99ea intrinsic-test: update parsing for SVE intrinsics
With SVE intrinsics in the `arm_intrinsics.json`, the parsing needs to be
updated to know to expect any new fields.
2026-04-14 00:54:55 +00:00
David Wood b6b2ce3d44 core_arch: no SVE on arm64ec
arm64ec doesn't support SVE.
2026-04-14 00:54:55 +00:00
David Wood a370aa3251 stdarch-verify: support sve
Co-authored-by: Adam Gemmell <Adam.Gemmell@arm.com>
Co-authored-by: Jamie Cunliffe <Jamie.Cunliffe@arm.com>
Co-authored-by: Jacob Bramley <jacob.bramley@arm.com>
Co-authored-by: Luca Vizzarro <Luca.Vizzarro@arm.com>
2026-04-14 00:54:55 +00:00
David Wood 6a6e8446b9 intrinsics_data: add sve intrinsics
Co-authored-by: Adam Gemmell <Adam.Gemmell@arm.com>
Co-authored-by: Jamie Cunliffe <Jamie.Cunliffe@arm.com>
Co-authored-by: Jacob Bramley <jacob.bramley@arm.com>
Co-authored-by: Luca Vizzarro <Luca.Vizzarro@arm.com>
2026-04-14 00:54:55 +00:00
David Wood a753cf4d77 core_arch: generated sve intrinsics
Following from previous commit, this commit only contains generated code
from the SVE intrinsic specifications

Co-authored-by: Jamie Cunliffe <Jamie.Cunliffe@arm.com>
Co-authored-by: Luca Vizzarro <Luca.Vizzarro@arm.com>
Co-authored-by: Adam Gemmell <adam.gemmell@arm.com>
Co-authored-by: Jacob Bramley <jacob.bramley@arm.com>
2026-04-13 05:19:16 +00:00
David Wood ca5032f50f gen-arm: add sve intrinsic definitions
Thousands of lines of SVE intrinsic definitions..

Co-authored-by: Jamie Cunliffe <Jamie.Cunliffe@arm.com>
Co-authored-by: Luca Vizzarro <Luca.Vizzarro@arm.com>
Co-authored-by: Adam Gemmell <adam.gemmell@arm.com>
Co-authored-by: Jacob Bramley <jacob.bramley@arm.com>
2026-04-13 05:19:16 +00:00
David Wood a7d4530a98 gen-arm: correct renamed from_exposed_addr link
`core::ptr::from_exposed_addr` was renamed to
`core::ptr::with_exposed_provenance` and so this link needs updated.
2026-04-13 05:19:16 +00:00
David Wood 78ccc92770 gen-arm: use sve_into instead of into
`Into::into` can't be used here because the implementations can't have
the required target feature, so `SveInto` needs to be introduced and
written by the generator
2026-04-13 05:19:16 +00:00
David Wood 826ab8ba0e core_arch: sve types
Add the SVE types (without any of the generated intrinsics) and empty
modules where the generated intrinsics will be. Enables the
`adt_const_params` crate feature that the generated intrinsics will use.

Co-authored-by: Jamie Cunliffe <Jamie.Cunliffe@arm.com>
Co-authored-by: Luca Vizzarro <Luca.Vizzarro@arm.com>
Co-authored-by: Adam Gemmell <adam.gemmell@arm.com>
Co-authored-by: Jacob Bramley <jacob.bramley@arm.com>
2026-04-13 05:19:16 +00:00
David Wood 2120148275 core_arch: add static_assert_range
This is a convenience macro used by the generated SVE intrinsics.

Co-authored-by: Jamie Cunliffe <Jamie.Cunliffe@arm.com>
Co-authored-by: Luca Vizzarro <Luca.Vizzarro@arm.com>
Co-authored-by: Adam Gemmell <adam.gemmell@arm.com>
Co-authored-by: Jacob Bramley <jacob.bramley@arm.com>
2026-04-13 05:19:16 +00:00
David Wood c884079143 gen-arm: auto-llvm-sign-conversion not for into
Matching the current behaviour for arguments, `auto_llvm_sign_conversion`
should only be required for `as_unsigned` conversions, not `into`
conversions.
2026-04-13 05:19:16 +00:00
David Wood 55b65ff1ee gen-arm: s/simd_reinterpret/transmute_unchecked
`simd_reinterpret` was expected to be used when it was added as
`transmute_unchecked` requires `Sized`, but scalable vectors are now
`Sized` so `transmute_unchecked` can be used and `simd_reinterpret` was
not added in rust-lang/rust#143924.
2026-04-13 05:19:16 +00:00
David Wood 8077797d75 gen-arm: remove SvUndef
The `SvUndef` expression is no longer necessary as a
`core::intrinsics::scalable::sve_undef` intrinsic has been introduced
to produce an undefined SVE vector, used by `svundef*` intrinsics. Other
intrinsics that used `SvUndef` now use the `svundef*` intrinsics.
2026-04-13 05:19:16 +00:00
David Wood 2637e0806b gen-arm: add generate_load_store_tests
Instead of generating load/store tests based on the input filename -
which no longer works given the expected input file structure of
`stdarch-gen-arm` - add a simple global context option that SVE specs can
set.
2026-04-13 05:19:16 +00:00
David Wood 9f43e2a99f stdarch-verify: re-add runtime test check
This was accidentally removed in 713444d.
2026-04-13 05:19:16 +00:00
Folkert de Vries 15c1e3479c Merge pull request #2080 from sayantn/sde-update
Update SDE to v10.8.0
2026-04-12 19:08:17 +00:00
sayantn 139f9648dd Update SDE to v10.8.0 2026-04-13 00:17:25 +05:30
Sayantan Chakraborty 0086450677 Merge pull request #2075 from heiher/loong64-tests-avoid-const-folding
loongarch: Avoid constant folding in tests to ensure SIMD coverage
2026-04-12 17:50:00 +00:00
WANG Rui c43636ea4b loongarch: Avoid constant folding in tests to ensure SIMD coverage
Use `black_box` on SIMD intrinsic inputs to prevent the compiler from
constant folding SIMD operations, ensuring the corresponding SIMD
instructions are actually emitted and covered by tests.
2026-04-11 23:10:36 +08:00
Sayantan Chakraborty 7bd98dd3c1 Merge pull request #2073 from folkertdev/more-miri-tests
Test `vld4` with miri
2026-04-11 12:51:16 +00:00
Folkert de Vries cc1e6d8f51 Merge pull request #2076 from eduardosm/Simd-new
Remove `simd_ty!` and `simd_m_ty!` macros
2026-04-10 21:18:21 +00:00
Eduardo Sánchez Muñoz 4103f7ddce Do not use a macro to define Simd::new 2026-04-10 20:42:25 +02:00
Eduardo Sánchez Muñoz 8d85d1def7 Do not use SimdM::new and remove simd_m_ty! 2026-04-10 20:12:46 +02:00
Brian Cain f8879e326f hexagon: Preserve original Q6 naming case for HVX intrinsics 2026-04-08 09:54:47 -07:00
Folkert de Vries 5a44da6067 make vld4q portable 2026-04-08 13:53:59 +02:00
WANG Rui 548d790dd8 loongarch: Remove unnecessary transmute calls
This commit removes unnecessary `transmute` calls to resolve clippy
warnings.
2026-04-07 11:41:06 +08:00
Folkert de Vries 8e2069e76c run some aarch64 tests with miri on CI 2026-04-06 19:39:21 +02:00
Folkert de Vries 4b52401221 run test_vld3q tests with miri on CI 2026-04-06 19:39:20 +02:00
Folkert de Vries cb0d495dae support roundtrip of vst3q 2026-04-06 19:39:20 +02:00
Folkert de Vries 8f3850c74c check that store/load rountrip initializes all bytes 2026-04-06 19:39:20 +02:00
Folkert de Vries 598640b101 disable hexagon tests for now 2026-04-06 19:13:42 +02:00
Jakub Beránek 1276db5745 Fix rustc-pull CI workflow 2026-04-01 11:23:04 +02:00
The rustc-josh-sync Cronjob Bot 79e3df625d Merge ref 'e4fdb554ad2c' from rust-lang/rust
Pull recent changes from https://github.com/rust-lang/rust via Josh.

Upstream ref: rust-lang/rust@e4fdb554ad
Filtered ref: rust-lang/stdarch@ae05da8bd6
Upstream diff: https://github.com/rust-lang/rust/compare/eda4fc7733ee89e484d7120cafbd80dcb2fce66e...e4fdb554ad2c0270473181438e338c42b5b30b0c

This merge was created using https://github.com/rust-lang/josh-sync.
2026-03-31 15:50:44 +00:00
The rustc-josh-sync Cronjob Bot 8e815f9ae1 Prepare for merging from rust-lang/rust
This updates the rust-version file to e4fdb554ad.
2026-03-31 15:48:28 +00:00
Guillaume Gomez 67ab3ac423 Rollup merge of #154043 - RalfJung:simd-min-max, r=Amanieu,calebzulawski,antoyo
simd_fmin/fmax: make semantics and name consistent with scalar intrinsics

This is the SIMD version of https://github.com/rust-lang/rust/pull/153343: change the documented semantics of the SIMD float min/max intrinsics to that of the scalar intrinsics, and also make the name consistent. The overall semantic change this amounts to is that we restrict the non-determinism: the old semantics effectively mean "when one input is an SNaN, the result non-deterministically is a NaN or the other input"; the new semantics say that in this case the other input must be returned. For all other cases, old and new semantics are equivalent. This means all users of these intrinsics that were correct with the old semantics are still correct: the overall set of possible behaviors has become smaller, no new possible behaviors are being added.

In terms of providers of this API:
- Miri, GCC, and cranelift already implement the new semantics, so no changes are needed.
- LLVM is adjusted to use `minimumnum nsz` instead of `minnum`, thus giving us the new semantics.

In terms of consumers of this API:
- Portable SIMD almost certainly wants to match the scalar behavior, so this is strictly a bugfix here.
- Stdarch mostly stopped using the intrinsic, except on nvptx, where arguably the new semantics are closer to what we actually want than the old semantics (https://github.com/rust-lang/stdarch/issues/2056).

Q: Should there be an `f` in the intrinsic name to indicate that it is for floats? E.g., `simd_fminimum_number_nsz`?

Also see https://github.com/rust-lang/rust/issues/153395.
2026-03-29 00:06:50 +01:00
Amanieu d'Antras f8369e3d47 Merge pull request #2065 from heiher/loong-inline-always
Mark the LoongArch intrinsics as inline(always)
2026-03-26 11:09:23 +00:00
Sayantan Chakraborty 1eafc19acd Merge pull request #2041 from ArunTamil21/add-alias-tests
Add missing runtime tests for SSE alias intrinsics
2026-03-25 18:19:10 +00:00
ArunTamil21 30573344b0 Mark alias test wrappers as const fn where supported and clean up skip list 2026-03-24 12:23:05 +00:00
Jonathan Brouwer 699e1b395e Rollup merge of #153931 - cyrgani:old-consts, r=Mark-Simulacrum
remove usages of to-be-deprecated numeric constants

Split out from rust-lang/rust#146882.
2026-03-23 12:14:55 +01:00
ArunTamil21 2c76cb3479 Use const fn and remove unsafe from alias test wrappers 2026-03-22 19:50:07 +00:00