Merge pull request #2073 from folkertdev/more-miri-tests

Test `vld4` with miri

library/stdarch/aarch64-miri-tests.txt

@@ -1,3 +1,4 @@
-test_vld3q
+test_vld3
+test_vld4
 neon::load_tests
 neon::store_tests

library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs

@@ -12521,14 +12521,7 @@ pub unsafe fn vld4q_dup_u64(a: *const u64) -> uint64x2x4_t {
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 #[cfg_attr(test, assert_instr(ld4))]
 pub unsafe fn vld4q_f64(a: *const f64) -> float64x2x4_t {
-    unsafe extern "unadjusted" {
-        #[cfg_attr(
-            any(target_arch = "aarch64", target_arch = "arm64ec"),
-            link_name = "llvm.aarch64.neon.ld4.v2f64.p0"
-        )]
-        fn _vld4q_f64(ptr: *const float64x2_t) -> float64x2x4_t;
-    }
-    _vld4q_f64(a as _)
+    crate::core_arch::macros::deinterleaving_load!(f64, 2, 4, a)
 }
 #[doc = "Load multiple 4-element structures to four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_s64)"]
@@ -12539,14 +12532,7 @@ pub unsafe fn vld4q_f64(a: *const f64) -> float64x2x4_t {
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 #[cfg_attr(test, assert_instr(ld4))]
 pub unsafe fn vld4q_s64(a: *const i64) -> int64x2x4_t {
-    unsafe extern "unadjusted" {
-        #[cfg_attr(
-            any(target_arch = "aarch64", target_arch = "arm64ec"),
-            link_name = "llvm.aarch64.neon.ld4.v2i64.p0"
-        )]
-        fn _vld4q_s64(ptr: *const int64x2_t) -> int64x2x4_t;
-    }
-    _vld4q_s64(a as _)
+    crate::core_arch::macros::deinterleaving_load!(i64, 2, 4, a)
 }
 #[doc = "Load multiple 4-element structures to four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld4q_lane_f64)"]

library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml

@@ -4167,17 +4167,11 @@ intrinsics:
     safety:
       unsafe: [neon]
     types:
-      - ['*const f64', float64x2x4_t, f64, '*const float64x2_t']
-      - ['*const i64', int64x2x4_t, i64, '*const int64x2_t']
+      - ['*const f64', float64x2x4_t, f64, "2"]
+      - ['*const i64', int64x2x4_t, i64, "2"]
     compose:
-      - LLVMLink:
-          name: 'vld4{neon_type[1].nox}'
-          arguments:
-            - 'ptr: {type[3]}'
-          links:
-            - link: 'llvm.aarch64.neon.ld4.v{neon_type[1].lane}{type[2]}.p0'
-              arch: aarch64,arm64ec
-      - FnCall: ['_vld4{neon_type[1].nox}', ['a as _']]
+      - FnCall: ["crate::core_arch::macros::deinterleaving_load!", [{ Type: "{type[2]}" }, "{type[3]}", "4", a], [], true]
+
 
   - name: "vld4{neon_type[1].nox}"
     doc: Load multiple 4-element structures to four registers