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https://github.com/rust-lang/rust.git
synced 2026-04-27 18:57:42 +03:00
support roundtrip of vst3q
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@@ -12127,14 +12127,7 @@ pub unsafe fn vld3q_dup_u64(a: *const u64) -> uint64x2x3_t {
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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#[cfg_attr(test, assert_instr(ld3))]
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pub unsafe fn vld3q_f64(a: *const f64) -> float64x2x3_t {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.ld3.v2f64.p0"
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)]
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fn _vld3q_f64(ptr: *const float64x2_t) -> float64x2x3_t;
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}
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_vld3q_f64(a as _)
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crate::core_arch::macros::deinterleaving_load!(f64, 2, 3, a)
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}
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#[doc = "Load multiple 3-element structures to three registers"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_s64)"]
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@@ -12145,14 +12138,7 @@ pub unsafe fn vld3q_f64(a: *const f64) -> float64x2x3_t {
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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#[cfg_attr(test, assert_instr(ld3))]
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pub unsafe fn vld3q_s64(a: *const i64) -> int64x2x3_t {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.ld3.v2i64.p0"
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)]
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fn _vld3q_s64(ptr: *const int64x2_t) -> int64x2x3_t;
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}
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_vld3q_s64(a as _)
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crate::core_arch::macros::deinterleaving_load!(i64, 2, 3, a)
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}
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#[doc = "Load multiple 3-element structures to three registers"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld3q_lane_f64)"]
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@@ -67158,14 +67158,7 @@ pub unsafe fn vst3q_s32(a: *mut i32, b: int32x4x3_t) {
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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#[cfg_attr(test, assert_instr(st3))]
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pub unsafe fn vst3_f32(a: *mut f32, b: float32x2x3_t) {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.st3.v2f32.p0"
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)]
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fn _vst3_f32(a: float32x2_t, b: float32x2_t, c: float32x2_t, ptr: *mut i8);
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}
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_vst3_f32(b.0, b.1, b.2, a as _)
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crate::core_arch::macros::interleaving_store!(f32, 2, 3, a, b)
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}
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#[doc = "Store multiple 3-element structures from three registers"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_f32)"]
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@@ -67177,14 +67170,7 @@ pub unsafe fn vst3_f32(a: *mut f32, b: float32x2x3_t) {
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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#[cfg_attr(test, assert_instr(st3))]
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pub unsafe fn vst3q_f32(a: *mut f32, b: float32x4x3_t) {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.st3.v4f32.p0"
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)]
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fn _vst3q_f32(a: float32x4_t, b: float32x4_t, c: float32x4_t, ptr: *mut i8);
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}
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_vst3q_f32(b.0, b.1, b.2, a as _)
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crate::core_arch::macros::interleaving_store!(f32, 4, 3, a, b)
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}
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#[doc = "Store multiple 3-element structures from three registers"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_s8)"]
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@@ -67196,14 +67182,7 @@ pub unsafe fn vst3q_f32(a: *mut f32, b: float32x4x3_t) {
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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#[cfg_attr(test, assert_instr(st3))]
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pub unsafe fn vst3_s8(a: *mut i8, b: int8x8x3_t) {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.st3.v8i8.p0"
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)]
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fn _vst3_s8(a: int8x8_t, b: int8x8_t, c: int8x8_t, ptr: *mut i8);
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}
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_vst3_s8(b.0, b.1, b.2, a as _)
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crate::core_arch::macros::interleaving_store!(i8, 8, 3, a, b)
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}
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#[doc = "Store multiple 3-element structures from three registers"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_s8)"]
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@@ -67215,14 +67194,7 @@ pub unsafe fn vst3_s8(a: *mut i8, b: int8x8x3_t) {
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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#[cfg_attr(test, assert_instr(st3))]
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pub unsafe fn vst3q_s8(a: *mut i8, b: int8x16x3_t) {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.st3.v16i8.p0"
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)]
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fn _vst3q_s8(a: int8x16_t, b: int8x16_t, c: int8x16_t, ptr: *mut i8);
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}
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_vst3q_s8(b.0, b.1, b.2, a as _)
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crate::core_arch::macros::interleaving_store!(i8, 16, 3, a, b)
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}
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#[doc = "Store multiple 3-element structures from three registers"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_s16)"]
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@@ -67234,14 +67206,7 @@ pub unsafe fn vst3q_s8(a: *mut i8, b: int8x16x3_t) {
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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#[cfg_attr(test, assert_instr(st3))]
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pub unsafe fn vst3_s16(a: *mut i16, b: int16x4x3_t) {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.st3.v4i16.p0"
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)]
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fn _vst3_s16(a: int16x4_t, b: int16x4_t, c: int16x4_t, ptr: *mut i8);
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}
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_vst3_s16(b.0, b.1, b.2, a as _)
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crate::core_arch::macros::interleaving_store!(i16, 4, 3, a, b)
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}
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#[doc = "Store multiple 3-element structures from three registers"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_s16)"]
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@@ -67253,14 +67218,7 @@ pub unsafe fn vst3_s16(a: *mut i16, b: int16x4x3_t) {
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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#[cfg_attr(test, assert_instr(st3))]
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pub unsafe fn vst3q_s16(a: *mut i16, b: int16x8x3_t) {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.st3.v8i16.p0"
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)]
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fn _vst3q_s16(a: int16x8_t, b: int16x8_t, c: int16x8_t, ptr: *mut i8);
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}
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_vst3q_s16(b.0, b.1, b.2, a as _)
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crate::core_arch::macros::interleaving_store!(i16, 8, 3, a, b)
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}
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#[doc = "Store multiple 3-element structures from three registers"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_s32)"]
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@@ -67272,14 +67230,7 @@ pub unsafe fn vst3q_s16(a: *mut i16, b: int16x8x3_t) {
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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#[cfg_attr(test, assert_instr(st3))]
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pub unsafe fn vst3_s32(a: *mut i32, b: int32x2x3_t) {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.st3.v2i32.p0"
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)]
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fn _vst3_s32(a: int32x2_t, b: int32x2_t, c: int32x2_t, ptr: *mut i8);
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}
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_vst3_s32(b.0, b.1, b.2, a as _)
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crate::core_arch::macros::interleaving_store!(i32, 2, 3, a, b)
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}
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#[doc = "Store multiple 3-element structures from three registers"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3q_s32)"]
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@@ -67291,14 +67242,7 @@ pub unsafe fn vst3_s32(a: *mut i32, b: int32x2x3_t) {
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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#[cfg_attr(test, assert_instr(st3))]
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pub unsafe fn vst3q_s32(a: *mut i32, b: int32x4x3_t) {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.st3.v4i32.p0"
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)]
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fn _vst3q_s32(a: int32x4_t, b: int32x4_t, c: int32x4_t, ptr: *mut i8);
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}
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_vst3q_s32(b.0, b.1, b.2, a as _)
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crate::core_arch::macros::interleaving_store!(i32, 4, 3, a, b)
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}
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#[doc = "Store multiple 3-element structures from three registers"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vst3_lane_f16)"]
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@@ -4031,17 +4031,10 @@ intrinsics:
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unsafe: [neon]
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assert_instr: [ld3]
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types:
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- ['*const i64', int64x2x3_t, '*const int64x2_t', i64]
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- ['*const f64', float64x2x3_t, '*const float64x2_t', f64]
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- ['*const i64', int64x2x3_t, i64, "2"]
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- ['*const f64', float64x2x3_t, f64, "2"]
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compose:
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- LLVMLink:
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name: 'vld3{neon_type[1].nox}'
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arguments:
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- 'ptr: {type[2]}'
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links:
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- link: 'llvm.aarch64.neon.ld3.v{neon_type[1].lane}{type[3]}.p0'
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arch: aarch64,arm64ec
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- FnCall: ['_vld3{neon_type[1].nox}', ['a as _']]
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- FnCall: ["crate::core_arch::macros::deinterleaving_load!", [{ Type: "{type[2]}" }, "{type[3]}", "3", a], [], true]
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- name: "vld3{neon_type[1].nox}"
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doc: Load multiple 3-element structures to three registers
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@@ -5642,27 +5642,16 @@ intrinsics:
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safety:
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unsafe: [neon]
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types:
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- [i8, int8x8x3_t, int8x8_t]
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- [i16, int16x4x3_t, int16x4_t]
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- [i32, int32x2x3_t, int32x2_t]
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- [i8, int8x16x3_t, int8x16_t]
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- [i16, int16x8x3_t, int16x8_t]
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- [i32, int32x4x3_t, int32x4_t]
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- [f32, float32x2x3_t, float32x2_t]
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- [f32, float32x4x3_t, float32x4_t]
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- [i8, int8x8x3_t, "8"]
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- [i16, int16x4x3_t, "4"]
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- [i32, int32x2x3_t, "2"]
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- [i8, int8x16x3_t, "16"]
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- [i16, int16x8x3_t, "8"]
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- [i32, int32x4x3_t, "4"]
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- [f32, float32x2x3_t, "2"]
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- [f32, float32x4x3_t, "4"]
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compose:
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- LLVMLink:
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name: 'vst3.{neon_type[1]}'
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arguments:
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- 'a: {type[2]}'
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- 'b: {type[2]}'
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- 'c: {type[2]}'
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- 'ptr: *mut i8'
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links:
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- link: 'llvm.aarch64.neon.st3.v{neon_type[1].lane}{type[0]}.p0'
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arch: aarch64,arm64ec
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- FnCall: ['_vst3{neon_type[1].nox}', ['b.0', 'b.1', 'b.2', 'a as _']]
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- FnCall: ["crate::core_arch::macros::interleaving_store!", [{ Type: "{type[0]}" }, "{type[2]}", "3", a, b], [], true]
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- name: "vst3{neon_type[1].nox}"
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doc: "Store multiple 3-element structures from three registers"
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