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Author SHA1 Message Date
bors e22c616e4e Auto merge of #155083 - adwinwhite:introduce-unnormalized, r=lcnr
Introduce `Unnormalized` wrapper




This is the first step of the [eager normalization](https://rust-lang.zulipchat.com/#narrow/channel/364551-t-types.2Ftrait-system-refactor/topic/Eager.20normalization.2C.20ahoy.21/with/582996293) series.

This PR introduce an `Unnormalized` wrapper and make most normalization routines consume it. The purpose is to make normalization explicit. 
This PR contains no behavior change.

API changes are in the first two commit. 
There're some normalization routines left untouched:
- `normalize` in the type checker of borrowck: better do it together with `field.ty()` returning `Unnormalized`.
- `normalize_with_depth`: only used inside the old solver. Can be done later.
- `query_normalize`: rarely used.
- misc local normalization helpers.

The compiler errors are mostly fixed via `ast-grep`, with exceptions handled manually.
2026-04-19 19:18:17 +00:00
Adwin White 6279106e72 fix all errors 2026-04-20 00:18:28 +08:00
Folkert de Vries fa740c7255 refactor llvm va_arg intrinsic validation logic 2026-04-19 12:54:43 +02:00
bors 6f109d8a2d Auto merge of #155223 - teor2345:fndef-refactor, r=mati865
Refactor FnDecl and FnSig non-type fields into a new wrapper type





#### Why this Refactor?

This PR is part of an initial cleanup for the [arg splat experiment](https://github.com/rust-lang/rust/issues/153629), but it's a useful refactor by itself.

It refactors the non-type fields of `FnDecl`, `FnSig`, and `FnHeader` into a new packed wrapper types, based on this comment in the `splat` experiment PR:
https://github.com/rust-lang/rust/pull/153697#discussion_r3004637413

It also refactors some common `FnSig` creation settings into their own methods. I did this instead of creating a struct with defaults.

#### Relationship to `splat` Experiment

I don't think we can use functional struct updates (`..default()`) to create `FnDecl` and `FnSig`, because we need the bit-packing for the `splat` experiment.

Bit-packing will avoid breaking "type is small" assertions for commonly used types when `splat` is added.
This PR packs these types:
- ExternAbi: enum + `unwind` variants (38) -> 6 bits
- ImplicitSelfKind: enum variants (5) -> 3 bits
- lifetime_elision_allowed, safety, c_variadic: bool -> 1 bit

#### Minor Changes

Fixes some typos, and applies rustfmt to clippy files that got skipped somehow.
2026-04-18 23:46:37 +00:00
bors 27dbdb57a2 Auto merge of #155416 - Zalathar:rollup-D1EWnrR, r=Zalathar
Rollup of 19 pull requests

Successful merges:

 - rust-lang/rust#141633 (Suggest to bind `self.x` to `x` when field `x` may be in format string)
 - rust-lang/rust#152980 (c-variadic: fix implementation on `avr`)
 - rust-lang/rust#154491 (Extend `core::char`'s documentation of casing issues (and fix a rustdoc bug))
 - rust-lang/rust#155318 (Use mutable pointers for Unix path buffers)
 - rust-lang/rust#155335 (Bump bootstrap to 1.96 beta)
 - rust-lang/rust#155354 (Remove AttributeSafety from BUILTIN_ATTRIBUTES)
 - rust-lang/rust#154970 (rustdoc: preserve `doc(cfg)` on locally re-exported type aliases)
 - rust-lang/rust#155095 (changed the information provided by (mut x) to mut x (Fix 155030))
 - rust-lang/rust#155305 (Make `convert_while_ascii` unsafe)
 - rust-lang/rust#155358 (ImproperCTypes: Move erasing_region_normalisation into helper function)
 - rust-lang/rust#155377 (tests/debuginfo/basic-stepping.rs: Remove FIXME related to ZSTs)
 - rust-lang/rust#155383 (Rearrange `rustc_ast_pretty`)
 - rust-lang/rust#155384 (triagebot: notify on diagnostic attribute changes)
 - rust-lang/rust#155386 (Use `box_new` diagnostic item for Box::new suggestions)
 - rust-lang/rust#155391 (Small refactor of `QueryJob::latch` method)
 - rust-lang/rust#155395 (Tweak how the "copy path" rustdoc button works to allow some accessibility tool to work with rustdoc)
 - rust-lang/rust#155396 (`as_ref_unchecked` docs link fix)
 - rust-lang/rust#155411 (compiletest: Remove the `//@ should-ice` directive)
 - rust-lang/rust#155413 (fix: typo in `std::fs::hard_link` documentation)
2026-04-17 07:35:43 +00:00
Dominik Schwaiger da2bbfbbec add llvm writable attribute conditionally 2026-04-16 12:29:39 +00:00
Folkert de Vries b8ba4002f5 c-variadic: handle c_int being i16 and c_double being f32 on avr 2026-04-16 11:48:02 +02:00
teor dafb6bb801 Refactor FnDecl and FnSig flags into packed structs 2026-04-16 07:08:08 +10:00
Jacob Pratt 803a7227fb Rollup merge of #155005 - folkertdev:simd-element-type-llvm, r=nnethercote
preserve SIMD element type information

Preserve the SIMD element type and provide it to LLVM for better optimization.

This is relevant for AArch64 types like `int16x4x2_t`, see also https://github.com/llvm/llvm-project/issues/181514. Such types are defined like so:

```rust
#[repr(simd)]
struct int16x4_t([i16; 4]);

#[repr(C)]
struct int16x4x2_t(pub int16x4_t, pub int16x4_t);
```

Previously this would be translated to the opaque `[2 x <8 x i8>]`, with this PR it is instead `[2 x <4 x i16>]`. That change is not relevant for the ABI, but using the correct type prevents bitcasts that can (indeed, do) confuse the LLVM pattern matcher.

This change will make it possible to implement the deinterleaving loads on AArch64 in a portable way (without neon-specific intrinsics), which means that e.g. Miri or the cranelift backend can run them without additional support.

discussion at [#t-compiler > loss of vector element type information](https://rust-lang.zulipchat.com/#narrow/channel/131828-t-compiler/topic/loss.20of.20vector.20element.20type.20information/with/584483611)
2026-04-14 00:37:24 -04:00
bors 17584a1819 Auto merge of #155253 - JonathanBrouwer:rollup-lERdTAB, r=JonathanBrouwer
Rollup of 19 pull requests

Successful merges:

 - rust-lang/rust#155162 (relnotes for 1.95)
 - rust-lang/rust#140763 (Change codegen of LLVM intrinsics to be name-based, and add llvm linkage support for `bf16(xN)` and `i1xN`)
 - rust-lang/rust#153604 (Fix thread::available_parallelism on WASI targets with threads)
 - rust-lang/rust#154193 (Implement EII for statics)
 - rust-lang/rust#154389 (Add more robust handling of nested query cycles)
 - rust-lang/rust#154435 (resolve: Some import resolution cleanups)
 - rust-lang/rust#155236 (Normalize individual predicate of `InstantiatedPredicates` inside `predicates_for_generics`)
 - rust-lang/rust#155243 (cg_ssa: transmute between scalable vectors)
 - rust-lang/rust#153941 (tests/debuginfo/basic-stepping.rs: Explain why all lines are not steppable)
 - rust-lang/rust#154587 (Add --verbose-run-make-subprocess-output flag to suppress verbose run-make output for passing tests)
 - rust-lang/rust#154624 (Make `DerefPure` dyn-incompatible)
 - rust-lang/rust#154929 (Add `const Default` impls for `LazyCell` and `LazyLock`)
 - rust-lang/rust#154944 (Small refactor of `arena_cache` query values)
 - rust-lang/rust#155055 (UI automation)
 - rust-lang/rust#155062 (Move tests from `tests/ui/issues/` to appropriate directories)
 - rust-lang/rust#155131 (Stabilize feature `uint_bit_width`)
 - rust-lang/rust#155147 (Stabilize feature `int_lowest_highest_one`)
 - rust-lang/rust#155174 (Improve emission of `UnknownDiagnosticAttribute` lint)
 - rust-lang/rust#155194 (Fix manpage version replacement and use verbose version)
2026-04-13 18:32:47 +00:00
Jonathan Brouwer d2fa85cd4d Rollup merge of #154193 - JonathanBrouwer:external-static, r=jdonszelmann
Implement EII for statics

This PR implements EII for statics. I've tried to mirror the implementation for functions in a few places, this causes some duplicate code but I'm also not really sure whether there's a clean way to merge the implementations.

This does not implement defaults for static EIIs yet, I will do that in a followup PR
2026-04-13 20:19:56 +02:00
Jonathan Brouwer 2f607ee662 Rollup merge of #153997 - nnethercote:closure-consistency, r=petrochenkov
Use closures more consistently in `dep_graph.rs`.

This file has several methods that take a `FnOnce() -> R` closure:
- `DepGraph::with_ignore`
- `DepGraph::with_query_deserialization`
- `DepGraph::with_anon_task`
- `DepGraphData::with_anon_task_inner`

It also has two methods that take a faux closure via an `A` argument and a `fn(TyCtxt<'tcx>, A) -> R` argument:
- DepGraph::with_task
- DepGraphData::with_task

The rationale is that the faux closure exercises tight control over what state they have access to. This seems silly when (a) they are passed a `TyCtxt`, and (b) when similar nearby functions take real closures. And they are more awkward to use, e.g. requiring multiple arguments to be gathered into a tuple. This commit changes the faux closures to real closures.

r? @Zalathar
2026-04-13 14:02:35 +02:00
Folkert de Vries 6f428df8df preseve SIMD element type information
and provide it to LLVM for better optimization
2026-04-13 13:26:50 +02:00
David Wood 62ffc89914 cg_llvm: scalable vectors with simd_select
Building on the previous change, support scalable vectors with
`simd_select`. Previous patches already landed the necessary changes in
the implementation of this intrinsic, but didn't allow scalable vector
arguments to be passed in.
2026-04-13 01:57:55 +00:00
David Wood ca6a85155b cg_llvm: replace sve_cast with simd_cast
Previously `sve_cast`'s implementation was abstracted to power both
`sve_cast` and `simd_cast` which supported scalable and non-scalable
vectors respectively. In anticipation of having to do this for another
`simd_*` intrinsic, `sve_cast` is removed and `simd_cast` is changed to
accept both scalable and non-scalable intrinsics, an approach that will
scale better to the other intrinsics.
2026-04-13 01:57:55 +00:00
sayantn 11f350da38 Add autocast for bf16 and bf16xN 2026-04-12 23:33:27 +05:30
sayantn 5aa800af80 Add autocast for i1 vectors 2026-04-12 23:33:27 +05:30
sayantn 3d89a5be50 Add autocasts for structs 2026-04-12 23:33:27 +05:30
sayantn a5372be2a1 Add target arch verification for LLVM intrinsics 2026-04-12 23:33:27 +05:30
sayantn c21f4ee437 Check for AutoUpgraded intrinsics, and lint on uses of deprecated intrinsics 2026-04-12 23:33:15 +05:30
sayantn aa1a5f8a93 Codegen non-overloaded LLVM intrinsics using their name 2026-04-12 19:00:17 +05:30
Jonathan Brouwer c7e194f215 Fix codegen for add_static_aliases 2026-04-11 10:17:44 +02:00
Jacob Pratt 5a6abf3425 Rollup merge of #154677 - Darksonn:hwasan-tagged-globals, r=davidtwco
hwaddress: automatically add `-Ctarget-feature=+tagged-globals`

Note that since HWAddressSanitizer is/should be a target modifier, we do not have to worry about whether this LLVM target feature changes the ABI.

Fixes: rust-lang/rust#148185
2026-04-09 23:59:59 -04:00
Jonathan Brouwer 3fb712c80a Rollup merge of #154719 - androm3da:hexagon-inline-asm-register-classes, r=JohnTitor
Hexagon inline asm: add reg_pair, vreg, vreg_pair, and qreg register classes

Add three new register classes for the Hexagon inline assembly backend:

* `reg_pair`: GPR double registers (r1:0 through r27:26)
* `vreg`: HVX vector registers (v0-v31)
* `qreg`: HVX predicate registers (q0-q3), clobber-only for now
2026-04-08 23:04:34 +02:00
Jonathan Brouwer 66a00ba2ef Rollup merge of #153995 - Flakebi:gpu-use-convergent, r=nnethercote
Use convergent attribute to funcs for GPU targets

On targets with convergent operations, we need to add the convergent attribute to all functions that run convergent operations. Following clang, we can conservatively apply the attribute to all functions when compiling for such a target and rely on LLVM optimizing away the attribute in cases where it is not necessary.

This affects the amdgpu and nvptx targets.

cc @kjetilkjeka, @kulst for nvptx
cc @ZuseZ4

r? @nnethercote, as you already reviewed this in the other PR

Split out from rust-lang/rust#149637, the part here should be uncontroversial.
2026-04-08 14:21:57 +02:00
Brian Cain aa9da4b859 Hexagon inline asm: add reg_pair, vreg, vreg_pair, and qreg register classes
Add new Hexagon inline asm register classes:
- reg_pair: GPR double registers (r1:0 through r27:26) for i64/f64 types
- vreg: HVX vector registers (v0-v31) for mode-dependent vector types
- vreg_pair: HVX vector pair registers (v1:0 through v31:30) for vector pairs
- qreg: HVX predicate registers (q0-q3), clobber-only

Key implementation details:
- GPR pairs use LLVM's 'd' register naming (d0-d13) for constraints
- HVX vector pairs use LLVM's 'w' register naming (w0-w15) for constraints
- Register overlap tracking for GPR pair<->single and HVX pair<->single conflicts
- HVX vector types are mode-dependent (64B vs 128B HVX length)

Note: vreg_quad (HVX vector quads) is not supported as LLVM's Hexagon
backend does not support vector quad types in inline asm constraints.
2026-04-07 09:27:32 -07:00
Nicholas Nethercote 3ff4201fd1 Move rustc_middle::mir::mono to rustc_middle::mono
Because the things in this module aren't MIR and don't use anything
from `rustc_middle::mir`. Also, modules that use `mono` often don't use
anything else from `rustc_middle::mir`.
2026-04-07 08:33:54 +10:00
Jonathan Brouwer 5f8b82805e Rollup merge of #153440 - bjorn3:lto_refactors13, r=TaKO8Ki
Various LTO cleanups

* Move some special casing of thin local LTO into a single location.
* Move lto_import_only_modules handling for fat LTO earlier. There is no reason to keep it separate until right before pass the LTO modules to the codegen backend. For thin LTO this introduces `ThinLtoInput` to correctly handle incr comp caching.
* Remove the `Linker` type from cg_llvm. It previously helped deduplicate code for `-Zcombine-cgus`, but that flag no longer exists.

Part of https://github.com/rust-lang/compiler-team/issues/908
2026-04-06 08:27:49 +02:00
David Wood 957320cdb1 cg_llvm: sve_cast intrinsic
Abstract over the existing `simd_cast` intrinsic to implement a new
`sve_cast` intrinsic - this is better than allowing scalable vectors to
be used with all of the generic `simd_*` intrinsics.
2026-04-03 10:37:42 +00:00
David Wood a24ee0329e cg_llvm/debuginfo: scalable vectors
Generate debuginfo for scalable vectors, following the structure that
Clang generates for scalable vectors.
2026-04-03 10:37:42 +00:00
David Wood 4fbcb031de cg_llvm: sve_tuple_{create,get,set} intrinsics
Clang changed to representing tuples of scalable vectors as
structs rather than as wide vectors (that is, scalable vector types
where the `N` part of the `<vscale x N x ty>` type was multiplied by
the number of vectors). rustc mirrored this in the initial implementation
of scalable vectors.

Earlier versions of our patches used the wide vector representation and
our intrinsic patches used the legacy
`llvm.aarch64.sve.tuple.{create,get,set}{2,3,4}` intrinsics for creating
these tuples/getting/setting the vectors, which were only supported
due to LLVM's `AutoUpgrade` pass converting these intrinsics into
`llvm.vector.insert`. `AutoUpgrade` only supports these legacy intrinsics
with the wide vector representation.

With the current struct representation, Clang has special handling in
codegen for generating `insertvalue`/`extractvalue` instructions for
these operations, which must be replicated by rustc's codegen for our
intrinsics to use. This patch implements new intrinsics in
`core::intrinsics::scalable` (mirroring the structure of
`core::intrinsics::simd`) which rustc lowers to the appropriate
`insertvalue`/`extractvalue` instructions.
2026-04-03 10:27:30 +00:00
David Wood a2f7f3c1eb ty_utils: lower tuples to ScalableVector repr
Instead of just using regular struct lowering for these types, which
results in an incorrect ABI (e.g. returning indirectly), use
`BackendRepr::ScalableVector` which will lower to the correct type and
be passed in registers.

This also enables some simplifications for generating alloca of scalable
vectors and greater re-use of `scalable_vector_parts`.

A LLVM codegen test demonstrating the changed IR this generates is
included in the next commit alongside some intrinsics that make these
tuples usable.
2026-04-03 10:27:30 +00:00
Jonathan Brouwer b11b685a3f Rollup merge of #153960 - Zoxc:fatal-layout-of-cycles, r=TaKO8Ki
Make `layout_of` cycles fatal errors

This makes `layout_of` cycles fatal errors.

This is a step towards removing query cycle recovery.
2026-04-02 22:13:49 +02:00
Wesley Wiser c9d3a00cd1 Revert "Fix: On wasm targets, call panic_in_cleanup if panic occurs in cleanup"
This reverts commit acbfd79acf.
2026-04-01 21:29:42 -05:00
bjorn3 f08aa80088 Inline Linker type 2026-04-01 14:14:23 +00:00
bjorn3 ed16e62542 Introduce ThinLtoInput 2026-04-01 14:14:23 +00:00
bjorn3 e70561b8ac Move some thin local LTO handling to start_executing_work
By not pushing any crates to each_linked_rlib_for_lto when no
cross-crate LTO is used, we can avoid special cases elsewhere.
2026-04-01 14:14:23 +00:00
Alice Ryhl 6fc3880b04 hwaddress: automatically add -Ctarget-feature=tagged-globals 2026-04-01 12:38:55 +00:00
Yukang 9445be9bf5 Rollup merge of #152935 - folkertdev:c-variadic-disallow, r=tgross35
c-variadic: error when we can't guarantee that the backend does the right thing

tracking issue: https://github.com/rust-lang/rust/issues/44930
r? workingjubilee

as discussed in [#t-lang > stabilizing &#96;c_variadic&#96;](https://rust-lang.zulipchat.com/#narrow/channel/213817-t-lang/topic/stabilizing.20.60c_variadic.60/with/574691397), display an error when we can't guarantee that the codegen backend (only LLVM is supported at the moment) does the right thing.
2026-04-01 10:43:55 +08:00
Folkert de Vries 1d0dcfab18 c-variadic: error when we can't guarantee that the backend does the right thing
specifically this emits an error when

- a custom target is used
- `RiscV32 if self.llvm_abiname == "ilp32e"` this abi is used for 32-bit
  embedded targets, and clang/llvm document that the ABI may change in
  the future.
2026-03-31 23:35:25 +02:00
Nicholas Nethercote deb901c896 Use closures more consistently in dep_graph.rs.
This file has several methods that take a `FnOnce() -> R` closure:
- `DepGraph::with_ignore`
- `DepGraph::with_query_deserialization`
- `DepGraph::with_anon_task`
- `DepGraphData::with_anon_task_inner`

It also has two methods that take a faux closure via an `A` argument and
a `fn(TyCtxt<'tcx>, A) -> R` argument:
- DepGraph::with_task
- DepGraphData::with_task

The rationale is that the faux closure exercises tight control over what
state they have access to. This seems silly when (a) they are passed a
`TyCtxt`, and (b) when similar nearby functions take real closures. And
they are more awkward to use, e.g. requiring multiple arguments to be
gathered into a tuple. This commit changes the faux closures to real
closures.
2026-03-31 20:21:05 +11:00
Eddy (Eduard) Stefes f39fa9e4c0 add rustc option -Zpacked-stack
this enables packed-stack just as -mpacked-stack in clang and gcc.
packed-stack is needed on s390x for kernel development.

Co-authored-by: Ralf Jung <post@ralfj.de>
2026-03-31 09:06:31 +02:00
Guillaume Gomez 67ab3ac423 Rollup merge of #154043 - RalfJung:simd-min-max, r=Amanieu,calebzulawski,antoyo
simd_fmin/fmax: make semantics and name consistent with scalar intrinsics

This is the SIMD version of https://github.com/rust-lang/rust/pull/153343: change the documented semantics of the SIMD float min/max intrinsics to that of the scalar intrinsics, and also make the name consistent. The overall semantic change this amounts to is that we restrict the non-determinism: the old semantics effectively mean "when one input is an SNaN, the result non-deterministically is a NaN or the other input"; the new semantics say that in this case the other input must be returned. For all other cases, old and new semantics are equivalent. This means all users of these intrinsics that were correct with the old semantics are still correct: the overall set of possible behaviors has become smaller, no new possible behaviors are being added.

In terms of providers of this API:
- Miri, GCC, and cranelift already implement the new semantics, so no changes are needed.
- LLVM is adjusted to use `minimumnum nsz` instead of `minnum`, thus giving us the new semantics.

In terms of consumers of this API:
- Portable SIMD almost certainly wants to match the scalar behavior, so this is strictly a bugfix here.
- Stdarch mostly stopped using the intrinsic, except on nvptx, where arguably the new semantics are closer to what we actually want than the old semantics (https://github.com/rust-lang/stdarch/issues/2056).

Q: Should there be an `f` in the intrinsic name to indicate that it is for floats? E.g., `simd_fminimum_number_nsz`?

Also see https://github.com/rust-lang/rust/issues/153395.
2026-03-29 00:06:50 +01:00
Guillaume Gomez e6f17e4bbb Rollup merge of #153834 - N1ark:generic-float-intrinsics, r=tgross35,RalfJung
Merge `fabsf16/32/64/128` into `fabs::<F>`

Following [a small conversation on Zulip](https://rust-lang.zulipchat.com/#narrow/channel/131828-t-compiler/topic/Float.20intrinsics/with/521501401) (and because I'd be interested in starting to contribute on Rust), I thought I'd give a try at merging the float intrinsics :)

This PR just merges `fabsf16`, `fabsf32`, `fabsf64`, `fabsf128`, as it felt like an easy first target.

Notes:
- I'm opening the PR for one intrinsic as it's probably easier if the shift is done one intrinsic at a time, but let me know if you'd rather I do several at a time to reduce the number of PRs.
- Currently this PR increases LOCs, despite being an attempt at simplifying the intrinsics/compilers. I believe this increase is a one time thing as I had to define new functions and move some things around, and hopefully future PRs/commits will reduce overall LoCs
- `fabsf32` and `fabsf64` are `#[rustc_intrinsic_const_stable_indirect]`, while `fabsf16` and `fabsf128` aren't; because `f32`/`f64` expect the function to be const, the generic version must be made indirectly stable too. We'd need to check with T-lang this change is ok; the only other intrinsics where there is such a mismatch is `minnum`, `maxnum` and `copysign`.
- I haven't touched libm because I'm not familiar with how it works; any guidance would be welcome!
2026-03-29 00:06:50 +01:00
Jakub Beránek 8b44562bc8 Revert "Rollup merge of #154200 - resrever:enable-dwarf-call-sites, r=dingxiangfei2009"
This reverts commit 2f1603077b, reversing
changes made to 6e3c17424d.
2026-03-27 20:08:24 +01:00
Jonathan Brouwer 2f1603077b Rollup merge of #154200 - resrever:enable-dwarf-call-sites, r=dingxiangfei2009
debuginfo: emit DW_TAG_call_site entries

Set `FlagAllCallsDescribed` on function definition DIEs so LLVM emits DW_TAG_call_site entries, letting debuggers and analysis tools track tail calls.
2026-03-25 19:52:50 +01:00
Jonathan Brouwer 0cd8de3843 Rollup merge of #153049 - Darksonn:kasan-sw-tags, r=fmease
Add `-Zsanitize=kernel-hwaddress`

The Linux kernel has a config option called `CONFIG_KASAN_SW_TAGS`  that enables `-fsanitize=kernel-hwaddress`. This is not supported by Rust.

One slightly awkward detail is that `#[sanitize(address = "off")]` applies to both `-Zsanitize=address` and `-Zsanitize=kernel-address`. Probably it was done this way because both are the same LLVM pass. I replicated this logic here for hwaddress, but it might be undesirable.

Note that `#[sanitize(kernel_hwaddress = "off")]` could be supported as an annotation on statics, but since it's also missing for `#[sanitize(hwaddress = "off")]`, I did not add it.

MCP: https://github.com/rust-lang/compiler-team/issues/975
Tracking issue: https://github.com/rust-lang/rust/issues/154171

cc @rcvalle @maurer @ojeda
2026-03-25 19:52:49 +01:00
John Kåre Alsaker 043bd76768 Make layout_of cycles fatal errors 2026-03-24 18:25:21 +01:00
bors eb9d3caf05 Auto merge of #154253 - JonathanBrouwer:rollup-LLZUsz2, r=JonathanBrouwer
Rollup of 13 pull requests

Successful merges:

 - rust-lang/rust#154241 (`rust-analyzer` subtree update)
 - rust-lang/rust#153686 (`std`: include `dlmalloc` for all non-wasi Wasm targets)
 - rust-lang/rust#154105 (bootstrap: Pass `--features=rustc` to rustc_transmute)
 - rust-lang/rust#153069 ([BPF] add target feature allows-misaligned-mem-access)
 - rust-lang/rust#154085 (Parenthesize or-patterns in prefix pattern positions in pretty printer)
 - rust-lang/rust#154191 (refactor RangeFromIter overflow-checks impl)
 - rust-lang/rust#154207 (Refactor query loading)
 - rust-lang/rust#153540 (drop derive helpers during attribute parsing)
 - rust-lang/rust#154140 (Document consteval behavior of ub_checks, overflow_checks, is_val_statically_known.)
 - rust-lang/rust#154161 (On E0277 tweak help when single type impls traits)
 - rust-lang/rust#154218 (interpret/validity: remove unreachable error kind)
 - rust-lang/rust#154225 (diagnostics: avoid ICE in confusable_method_name for associated functions)
 - rust-lang/rust#154228 (Improve inline assembly error messages)
2026-03-23 15:46:13 +00:00
Jonathan Brouwer a87d694af2 Rollup merge of #150630 - Mark-Simulacrum:rephrase-compression-warn, r=JonathanBrouwer
Unknown -> Unsupported compression algorithm

Both zstd and zlib are *known* compression algorithms, they just may not be supported by the backend. We shouldn't mislead users into e.g. thinking they made a typo.

cc https://github.com/rust-lang/rust/issues/120953
2026-03-23 12:14:55 +01:00