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fix - aarch64_be tests

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This commit is contained in:
James Barford-Evans
2025-04-22 08:17:25 +01:00
committed by Amanieu d'Antras
parent f8782f778b
commit ef92b59242
9 changed files with 19 additions and 10 deletions
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library/stdarch/ci/docker/aarch64_be-unknown-linux-gnu/Dockerfile
+4 -1
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@@ -26,5 +26,8 @@ ENV AARCH64_BE_LIBC="${AARCH64_BE_TOOLCHAIN}/aarch64_be-none-linux-gnu/libc"
ENV CARGO_TARGET_AARCH64_BE_UNKNOWN_LINUX_GNU_LINKER="${AARCH64_BE_TOOLCHAIN}/bin/aarch64_be-none-linux-gnu-gcc"
ENV CARGO_TARGET_AARCH64_BE_UNKNOWN_LINUX_GNU_RUNNER="qemu-aarch64_be -cpu max -L ${AARCH64_BE_LIBC}"
ENV OBJDUMP="${AARCH64_BE_TOOLCHAIN}/bin/bin/aarch64-none-linux-gnu-objdump"
ENV OBJDUMP="${AARCH64_BE_TOOLCHAIN}/bin/aarch64_be-none-linux-gnu-objdump"
ENV STDARCH_TEST_SKIP_FEATURE=tme
# The table instructions, while correct, generate some rev64 instructions which
# increases the number of instructions generated
ENV STDARCH_ASSERT_INSTR_LIMIT=32
library/stdarch/ci/run-docker.sh
+1
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@@ -36,6 +36,7 @@ run() {
--env NOSTD \
--env NORUN \
--env RUSTFLAGS \
--env CARGO_UNSTABLE_BUILD_STD \
--volume "${HOME}/.cargo":/cargo \
--volume "$(rustc --print sysroot)":/rust:ro \
--volume "$(pwd)":/checkout:ro \
library/stdarch/ci/run.sh
+1 -1
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@@ -187,7 +187,7 @@ case "${TARGET}" in
--cppcompiler "${TEST_CXX_COMPILER}" \
--skip "${TEST_SKIP_INTRINSICS}" \
--target "${TARGET}" \
--linker "${CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_LINKER}" \
--linker "${CARGO_TARGET_AARCH64_BE_UNKNOWN_LINUX_GNU_LINKER}" \
--cxx-toolchain-dir "${AARCH64_BE_TOOLCHAIN}"
;;
*)
library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs
+6 -6
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@@ -24470,7 +24470,7 @@ pub fn vrsrad_n_u64<const N: i32>(a: u64, b: u64) -> u64 {
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_s16)"]
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(rsubhn2))]
#[cfg_attr(test, assert_instr(rsubhn))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vrsubhn_high_s16(a: int8x8_t, b: int16x8_t, c: int16x8_t) -> int8x16_t {
let x: int8x8_t = vrsubhn_s16(b, c);
@@ -24480,7 +24480,7 @@ pub fn vrsubhn_high_s16(a: int8x8_t, b: int16x8_t, c: int16x8_t) -> int8x16_t {
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_s32)"]
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(rsubhn2))]
#[cfg_attr(test, assert_instr(rsubhn))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vrsubhn_high_s32(a: int16x4_t, b: int32x4_t, c: int32x4_t) -> int16x8_t {
let x: int16x4_t = vrsubhn_s32(b, c);
@@ -24490,7 +24490,7 @@ pub fn vrsubhn_high_s32(a: int16x4_t, b: int32x4_t, c: int32x4_t) -> int16x8_t {
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_s64)"]
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(rsubhn2))]
#[cfg_attr(test, assert_instr(rsubhn))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vrsubhn_high_s64(a: int32x2_t, b: int64x2_t, c: int64x2_t) -> int32x4_t {
let x: int32x2_t = vrsubhn_s64(b, c);
@@ -24500,7 +24500,7 @@ pub fn vrsubhn_high_s64(a: int32x2_t, b: int64x2_t, c: int64x2_t) -> int32x4_t {
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_u16)"]
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(rsubhn2))]
#[cfg_attr(test, assert_instr(rsubhn))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vrsubhn_high_u16(a: uint8x8_t, b: uint16x8_t, c: uint16x8_t) -> uint8x16_t {
let x: uint8x8_t = vrsubhn_u16(b, c);
@@ -24510,7 +24510,7 @@ pub fn vrsubhn_high_u16(a: uint8x8_t, b: uint16x8_t, c: uint16x8_t) -> uint8x16_
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_u32)"]
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(rsubhn2))]
#[cfg_attr(test, assert_instr(rsubhn))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vrsubhn_high_u32(a: uint16x4_t, b: uint32x4_t, c: uint32x4_t) -> uint16x8_t {
let x: uint16x4_t = vrsubhn_u32(b, c);
@@ -24520,7 +24520,7 @@ pub fn vrsubhn_high_u32(a: uint16x4_t, b: uint32x4_t, c: uint32x4_t) -> uint16x8
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vrsubhn_high_u64)"]
#[inline]
#[target_feature(enable = "neon")]
#[cfg_attr(test, assert_instr(rsubhn2))]
#[cfg_attr(test, assert_instr(rsubhn))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub fn vrsubhn_high_u64(a: uint32x2_t, b: uint64x2_t, c: uint64x2_t) -> uint32x4_t {
let x: uint32x2_t = vrsubhn_u64(b, c);
library/stdarch/crates/core_arch/src/arm_shared/neon/table_lookup_tests.rs
+2
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@@ -19,6 +19,7 @@ macro_rules! test_vtbl {
- table[$table_t:ident]: [$($table_v:expr),*] |
$(- ctrl[$ctrl_t:ident]: [$($ctrl_v:expr),*] => [$($exp_v:expr),*])|*
) => {
#[cfg(target_endian = "little")]
#[simd_test(enable = "neon")]
unsafe fn $test_name() {
// create table as array, and transmute it to
@@ -168,6 +169,7 @@ macro_rules! test_vtbx {
- ext[$ext_t:ident]: [$($ext_v:expr),*] |
$(- ctrl[$ctrl_t:ident]: [$($ctrl_v:expr),*] => [$($exp_v:expr),*])|*
) => {
#[cfg(target_endian = "little")]
#[simd_test(enable = "neon")]
unsafe fn $test_name() {
// create table as array, and transmute it to
library/stdarch/crates/simd-test-macro/src/lib.rs
+1 -1
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@@ -58,7 +58,7 @@ pub fn simd_test(
{
"i686" | "x86_64" | "i586" => "is_x86_feature_detected",
"arm" | "armv7" => "is_arm_feature_detected",
"aarch64" | "arm64ec" => "is_aarch64_feature_detected",
"aarch64" | "arm64ec" | "aarch64_be" => "is_aarch64_feature_detected",
maybe_riscv if maybe_riscv.starts_with("riscv") => "is_riscv_feature_detected",
"powerpc" | "powerpcle" => "is_powerpc_feature_detected",
"powerpc64" | "powerpc64le" => "is_powerpc64_feature_detected",
library/stdarch/crates/std_detect/src/detect/os/linux/aarch64.rs
+1
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@@ -399,6 +399,7 @@ fn cache(self, is_exynos9810: bool) -> cache::Initializer {
}
}
#[cfg(target_endian = "little")]
#[cfg(test)]
mod tests {
use super::*;
library/stdarch/crates/std_detect/src/detect/os/linux/auxvec.rs
+2
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@@ -290,6 +290,7 @@ fn linux_macos_vb() {
assert_eq!(v.hwcap2, 0);
}
} else if #[cfg(target_arch = "aarch64")] {
#[cfg(target_endian = "little")]
#[test]
fn linux_artificial_aarch64() {
let file = concat!(env!("CARGO_MANIFEST_DIR"), "/src/detect/test_data/linux-artificial-aarch64.auxv");
@@ -298,6 +299,7 @@ fn linux_artificial_aarch64() {
assert_eq!(v.hwcap, 0x0123456789abcdef);
assert_eq!(v.hwcap2, 0x02468ace13579bdf);
}
#[cfg(target_endian = "little")]
#[test]
fn linux_no_hwcap2_aarch64() {
let file = concat!(env!("CARGO_MANIFEST_DIR"), "/src/detect/test_data/linux-no-hwcap2-aarch64.auxv");
library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml
+1 -1
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@@ -8906,7 +8906,7 @@ intrinsics:
arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {neon_type[1]}"]
return_type: "{neon_type[3]}"
attr:
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [rsubhn2]]}]]
- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [rsubhn]]}]]
- FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]
safety: safe
types: