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This commit is contained in:
Eric Huss
2025-02-09 10:19:55 -08:00
parent 699a872630
commit d9ec0157da
45 changed files with 228 additions and 803 deletions
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library/stdarch/crates/assert-instr-macro/src/lib.rs
+1 -1
View File
@@ -202,7 +202,7 @@ struct Invoc {
impl syn::parse::Parse for Invoc {
fn parse(input: syn::parse::ParseStream<'_>) -> syn::Result<Self> {
use syn::{ext::IdentExt, Token};
use syn::{Token, ext::IdentExt};
let mut instr = String::new();
while !input.is_empty() {
library/stdarch/crates/core_arch/src/aarch64/neon/mod.rs
+33 -225
View File
@@ -300,7 +300,7 @@ fn vqtbx3q(
#[link_name = "llvm.aarch64.neon.tbl4.v8i8"]
fn vqtbl4(a0: int8x16_t, a1: int8x16_t, a2: int8x16_t, a3: int8x16_t, b: uint8x8_t)
-> int8x8_t;
-> int8x8_t;
#[link_name = "llvm.aarch64.neon.tbl4.v16i8"]
fn vqtbl4q(
a0: int8x16_t,
@@ -4448,26 +4448,14 @@ unsafe fn test_vcopy_laneq_f64() {
unsafe fn test_vceq_u64() {
test_cmp_u64(
|i, j| vceq_u64(i, j),
|a: u64, b: u64| -> u64 {
if a == b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: u64, b: u64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceqq_u64() {
testq_cmp_u64(
|i, j| vceqq_u64(i, j),
|a: u64, b: u64| -> u64 {
if a == b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: u64, b: u64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4475,26 +4463,14 @@ unsafe fn test_vceqq_u64() {
unsafe fn test_vceq_s64() {
test_cmp_s64(
|i, j| vceq_s64(i, j),
|a: i64, b: i64| -> u64 {
if a == b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: i64, b: i64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceqq_s64() {
testq_cmp_s64(
|i, j| vceqq_s64(i, j),
|a: i64, b: i64| -> u64 {
if a == b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: i64, b: i64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4502,26 +4478,14 @@ unsafe fn test_vceqq_s64() {
unsafe fn test_vceq_p64() {
test_cmp_p64(
|i, j| vceq_p64(i, j),
|a: u64, b: u64| -> u64 {
if a == b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: u64, b: u64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceqq_p64() {
testq_cmp_p64(
|i, j| vceqq_p64(i, j),
|a: u64, b: u64| -> u64 {
if a == b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: u64, b: u64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4529,26 +4493,14 @@ unsafe fn test_vceqq_p64() {
unsafe fn test_vceq_f64() {
test_cmp_f64(
|i, j| vceq_f64(i, j),
|a: f64, b: f64| -> u64 {
if a == b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: f64, b: f64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceqq_f64() {
testq_cmp_f64(
|i, j| vceqq_f64(i, j),
|a: f64, b: f64| -> u64 {
if a == b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: f64, b: f64| -> u64 { if a == b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4556,26 +4508,14 @@ unsafe fn test_vceqq_f64() {
unsafe fn test_vcgt_s64() {
test_cmp_s64(
|i, j| vcgt_s64(i, j),
|a: i64, b: i64| -> u64 {
if a > b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: i64, b: i64| -> u64 { if a > b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgtq_s64() {
testq_cmp_s64(
|i, j| vcgtq_s64(i, j),
|a: i64, b: i64| -> u64 {
if a > b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: i64, b: i64| -> u64 { if a > b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4583,26 +4523,14 @@ unsafe fn test_vcgtq_s64() {
unsafe fn test_vcgt_u64() {
test_cmp_u64(
|i, j| vcgt_u64(i, j),
|a: u64, b: u64| -> u64 {
if a > b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: u64, b: u64| -> u64 { if a > b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgtq_u64() {
testq_cmp_u64(
|i, j| vcgtq_u64(i, j),
|a: u64, b: u64| -> u64 {
if a > b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: u64, b: u64| -> u64 { if a > b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4610,26 +4538,14 @@ unsafe fn test_vcgtq_u64() {
unsafe fn test_vcgt_f64() {
test_cmp_f64(
|i, j| vcgt_f64(i, j),
|a: f64, b: f64| -> u64 {
if a > b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: f64, b: f64| -> u64 { if a > b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgtq_f64() {
testq_cmp_f64(
|i, j| vcgtq_f64(i, j),
|a: f64, b: f64| -> u64 {
if a > b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: f64, b: f64| -> u64 { if a > b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4637,26 +4553,14 @@ unsafe fn test_vcgtq_f64() {
unsafe fn test_vclt_s64() {
test_cmp_s64(
|i, j| vclt_s64(i, j),
|a: i64, b: i64| -> u64 {
if a < b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: i64, b: i64| -> u64 { if a < b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcltq_s64() {
testq_cmp_s64(
|i, j| vcltq_s64(i, j),
|a: i64, b: i64| -> u64 {
if a < b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: i64, b: i64| -> u64 { if a < b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4664,26 +4568,14 @@ unsafe fn test_vcltq_s64() {
unsafe fn test_vclt_u64() {
test_cmp_u64(
|i, j| vclt_u64(i, j),
|a: u64, b: u64| -> u64 {
if a < b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: u64, b: u64| -> u64 { if a < b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcltq_u64() {
testq_cmp_u64(
|i, j| vcltq_u64(i, j),
|a: u64, b: u64| -> u64 {
if a < b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: u64, b: u64| -> u64 { if a < b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4691,26 +4583,14 @@ unsafe fn test_vcltq_u64() {
unsafe fn test_vltq_f64() {
test_cmp_f64(
|i, j| vclt_f64(i, j),
|a: f64, b: f64| -> u64 {
if a < b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: f64, b: f64| -> u64 { if a < b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcltq_f64() {
testq_cmp_f64(
|i, j| vcltq_f64(i, j),
|a: f64, b: f64| -> u64 {
if a < b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: f64, b: f64| -> u64 { if a < b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4718,26 +4598,14 @@ unsafe fn test_vcltq_f64() {
unsafe fn test_vcle_s64() {
test_cmp_s64(
|i, j| vcle_s64(i, j),
|a: i64, b: i64| -> u64 {
if a <= b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: i64, b: i64| -> u64 { if a <= b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcleq_s64() {
testq_cmp_s64(
|i, j| vcleq_s64(i, j),
|a: i64, b: i64| -> u64 {
if a <= b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: i64, b: i64| -> u64 { if a <= b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4745,26 +4613,14 @@ unsafe fn test_vcleq_s64() {
unsafe fn test_vcle_u64() {
test_cmp_u64(
|i, j| vcle_u64(i, j),
|a: u64, b: u64| -> u64 {
if a <= b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: u64, b: u64| -> u64 { if a <= b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcleq_u64() {
testq_cmp_u64(
|i, j| vcleq_u64(i, j),
|a: u64, b: u64| -> u64 {
if a <= b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: u64, b: u64| -> u64 { if a <= b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4772,26 +4628,14 @@ unsafe fn test_vcleq_u64() {
unsafe fn test_vleq_f64() {
test_cmp_f64(
|i, j| vcle_f64(i, j),
|a: f64, b: f64| -> u64 {
if a <= b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: f64, b: f64| -> u64 { if a <= b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcleq_f64() {
testq_cmp_f64(
|i, j| vcleq_f64(i, j),
|a: f64, b: f64| -> u64 {
if a <= b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: f64, b: f64| -> u64 { if a <= b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4799,26 +4643,14 @@ unsafe fn test_vcleq_f64() {
unsafe fn test_vcge_s64() {
test_cmp_s64(
|i, j| vcge_s64(i, j),
|a: i64, b: i64| -> u64 {
if a >= b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: i64, b: i64| -> u64 { if a >= b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgeq_s64() {
testq_cmp_s64(
|i, j| vcgeq_s64(i, j),
|a: i64, b: i64| -> u64 {
if a >= b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: i64, b: i64| -> u64 { if a >= b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4826,26 +4658,14 @@ unsafe fn test_vcgeq_s64() {
unsafe fn test_vcge_u64() {
test_cmp_u64(
|i, j| vcge_u64(i, j),
|a: u64, b: u64| -> u64 {
if a >= b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: u64, b: u64| -> u64 { if a >= b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgeq_u64() {
testq_cmp_u64(
|i, j| vcgeq_u64(i, j),
|a: u64, b: u64| -> u64 {
if a >= b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: u64, b: u64| -> u64 { if a >= b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
@@ -4853,26 +4673,14 @@ unsafe fn test_vcgeq_u64() {
unsafe fn test_vgeq_f64() {
test_cmp_f64(
|i, j| vcge_f64(i, j),
|a: f64, b: f64| -> u64 {
if a >= b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: f64, b: f64| -> u64 { if a >= b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgeq_f64() {
testq_cmp_f64(
|i, j| vcgeq_f64(i, j),
|a: f64, b: f64| -> u64 {
if a >= b {
0xFFFFFFFFFFFFFFFF
} else {
0
}
},
|a: f64, b: f64| -> u64 { if a >= b { 0xFFFFFFFFFFFFFFFF } else { 0 } },
);
}
library/stdarch/crates/core_arch/src/arm/dsp.rs
+1 -1
View File
@@ -244,7 +244,7 @@ pub unsafe fn __smlawt(a: i32, b: i32, c: i32) -> i32 {
mod tests {
use crate::core_arch::{
arm::*,
simd::{i16x2, i8x4, u8x4},
simd::{i8x4, i16x2, u8x4},
};
use std::mem::transmute;
use stdarch_test::simd_test;
library/stdarch/crates/core_arch/src/arm/simd32.rs
+1 -1
View File
@@ -500,7 +500,7 @@ pub unsafe fn __usada8(a: int8x4_t, b: int8x4_t, c: u32) -> u32 {
#[cfg(test)]
mod tests {
use crate::core_arch::simd::{i16x2, i8x4, u8x4};
use crate::core_arch::simd::{i8x4, i16x2, u8x4};
use std::mem::transmute;
use stdarch_test::simd_test;
library/stdarch/crates/core_arch/src/arm_shared/crypto.rs
+4 -2
View File
@@ -1,4 +1,4 @@
use crate::core_arch::arm_shared::{uint32x4_t, uint8x16_t};
use crate::core_arch::arm_shared::{uint8x16_t, uint32x4_t};
#[allow(improper_ctypes)]
unsafe extern "unadjusted" {
@@ -418,7 +418,9 @@ unsafe fn test_vaesimcq_u8() {
let r: u8x16 = mem::transmute(vaesimcq_u8(data));
assert_eq!(
r,
u8x16::new(43, 60, 33, 50, 103, 80, 125, 70, 43, 60, 33, 50, 103, 80, 125, 70)
u8x16::new(
43, 60, 33, 50, 103, 80, 125, 70, 43, 60, 33, 50, 103, 80, 125, 70
)
);
}
library/stdarch/crates/core_arch/src/arm_shared/neon/mod.rs
+70 -490
View File
@@ -13818,78 +13818,42 @@ unsafe fn test_veorq_u64() {
unsafe fn test_vceq_s8() {
test_cmp_s8(
|i, j| vceq_s8(i, j),
|a: i8, b: i8| -> u8 {
if a == b {
0xFF
} else {
0
}
},
|a: i8, b: i8| -> u8 { if a == b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceqq_s8() {
testq_cmp_s8(
|i, j| vceqq_s8(i, j),
|a: i8, b: i8| -> u8 {
if a == b {
0xFF
} else {
0
}
},
|a: i8, b: i8| -> u8 { if a == b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceq_s16() {
test_cmp_s16(
|i, j| vceq_s16(i, j),
|a: i16, b: i16| -> u16 {
if a == b {
0xFFFF
} else {
0
}
},
|a: i16, b: i16| -> u16 { if a == b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceqq_s16() {
testq_cmp_s16(
|i, j| vceqq_s16(i, j),
|a: i16, b: i16| -> u16 {
if a == b {
0xFFFF
} else {
0
}
},
|a: i16, b: i16| -> u16 { if a == b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceq_s32() {
test_cmp_s32(
|i, j| vceq_s32(i, j),
|a: i32, b: i32| -> u32 {
if a == b {
0xFFFFFFFF
} else {
0
}
},
|a: i32, b: i32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceqq_s32() {
testq_cmp_s32(
|i, j| vceqq_s32(i, j),
|a: i32, b: i32| -> u32 {
if a == b {
0xFFFFFFFF
} else {
0
}
},
|a: i32, b: i32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -13897,78 +13861,42 @@ unsafe fn test_vceqq_s32() {
unsafe fn test_vceq_u8() {
test_cmp_u8(
|i, j| vceq_u8(i, j),
|a: u8, b: u8| -> u8 {
if a == b {
0xFF
} else {
0
}
},
|a: u8, b: u8| -> u8 { if a == b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceqq_u8() {
testq_cmp_u8(
|i, j| vceqq_u8(i, j),
|a: u8, b: u8| -> u8 {
if a == b {
0xFF
} else {
0
}
},
|a: u8, b: u8| -> u8 { if a == b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceq_u16() {
test_cmp_u16(
|i, j| vceq_u16(i, j),
|a: u16, b: u16| -> u16 {
if a == b {
0xFFFF
} else {
0
}
},
|a: u16, b: u16| -> u16 { if a == b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceqq_u16() {
testq_cmp_u16(
|i, j| vceqq_u16(i, j),
|a: u16, b: u16| -> u16 {
if a == b {
0xFFFF
} else {
0
}
},
|a: u16, b: u16| -> u16 { if a == b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceq_u32() {
test_cmp_u32(
|i, j| vceq_u32(i, j),
|a: u32, b: u32| -> u32 {
if a == b {
0xFFFFFFFF
} else {
0
}
},
|a: u32, b: u32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceqq_u32() {
testq_cmp_u32(
|i, j| vceqq_u32(i, j),
|a: u32, b: u32| -> u32 {
if a == b {
0xFFFFFFFF
} else {
0
}
},
|a: u32, b: u32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -13976,26 +13904,14 @@ unsafe fn test_vceqq_u32() {
unsafe fn test_vceq_f32() {
test_cmp_f32(
|i, j| vcge_f32(i, j),
|a: f32, b: f32| -> u32 {
if a == b {
0xFFFFFFFF
} else {
0
}
},
|a: f32, b: f32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vceqq_f32() {
testq_cmp_f32(
|i, j| vcgeq_f32(i, j),
|a: f32, b: f32| -> u32 {
if a == b {
0xFFFFFFFF
} else {
0
}
},
|a: f32, b: f32| -> u32 { if a == b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -14003,78 +13919,42 @@ unsafe fn test_vceqq_f32() {
unsafe fn test_vcgt_s8() {
test_cmp_s8(
|i, j| vcgt_s8(i, j),
|a: i8, b: i8| -> u8 {
if a > b {
0xFF
} else {
0
}
},
|a: i8, b: i8| -> u8 { if a > b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgtq_s8() {
testq_cmp_s8(
|i, j| vcgtq_s8(i, j),
|a: i8, b: i8| -> u8 {
if a > b {
0xFF
} else {
0
}
},
|a: i8, b: i8| -> u8 { if a > b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgt_s16() {
test_cmp_s16(
|i, j| vcgt_s16(i, j),
|a: i16, b: i16| -> u16 {
if a > b {
0xFFFF
} else {
0
}
},
|a: i16, b: i16| -> u16 { if a > b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgtq_s16() {
testq_cmp_s16(
|i, j| vcgtq_s16(i, j),
|a: i16, b: i16| -> u16 {
if a > b {
0xFFFF
} else {
0
}
},
|a: i16, b: i16| -> u16 { if a > b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgt_s32() {
test_cmp_s32(
|i, j| vcgt_s32(i, j),
|a: i32, b: i32| -> u32 {
if a > b {
0xFFFFFFFF
} else {
0
}
},
|a: i32, b: i32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgtq_s32() {
testq_cmp_s32(
|i, j| vcgtq_s32(i, j),
|a: i32, b: i32| -> u32 {
if a > b {
0xFFFFFFFF
} else {
0
}
},
|a: i32, b: i32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -14082,78 +13962,42 @@ unsafe fn test_vcgtq_s32() {
unsafe fn test_vcgt_u8() {
test_cmp_u8(
|i, j| vcgt_u8(i, j),
|a: u8, b: u8| -> u8 {
if a > b {
0xFF
} else {
0
}
},
|a: u8, b: u8| -> u8 { if a > b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgtq_u8() {
testq_cmp_u8(
|i, j| vcgtq_u8(i, j),
|a: u8, b: u8| -> u8 {
if a > b {
0xFF
} else {
0
}
},
|a: u8, b: u8| -> u8 { if a > b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgt_u16() {
test_cmp_u16(
|i, j| vcgt_u16(i, j),
|a: u16, b: u16| -> u16 {
if a > b {
0xFFFF
} else {
0
}
},
|a: u16, b: u16| -> u16 { if a > b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgtq_u16() {
testq_cmp_u16(
|i, j| vcgtq_u16(i, j),
|a: u16, b: u16| -> u16 {
if a > b {
0xFFFF
} else {
0
}
},
|a: u16, b: u16| -> u16 { if a > b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgt_u32() {
test_cmp_u32(
|i, j| vcgt_u32(i, j),
|a: u32, b: u32| -> u32 {
if a > b {
0xFFFFFF
} else {
0
}
},
|a: u32, b: u32| -> u32 { if a > b { 0xFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgtq_u32() {
testq_cmp_u32(
|i, j| vcgtq_u32(i, j),
|a: u32, b: u32| -> u32 {
if a > b {
0xFFFFFFFF
} else {
0
}
},
|a: u32, b: u32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -14161,26 +14005,14 @@ unsafe fn test_vcgtq_u32() {
unsafe fn test_vcgt_f32() {
test_cmp_f32(
|i, j| vcgt_f32(i, j),
|a: f32, b: f32| -> u32 {
if a > b {
0xFFFFFFFF
} else {
0
}
},
|a: f32, b: f32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgtq_f32() {
testq_cmp_f32(
|i, j| vcgtq_f32(i, j),
|a: f32, b: f32| -> u32 {
if a > b {
0xFFFFFFFF
} else {
0
}
},
|a: f32, b: f32| -> u32 { if a > b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -14188,78 +14020,42 @@ unsafe fn test_vcgtq_f32() {
unsafe fn test_vclt_s8() {
test_cmp_s8(
|i, j| vclt_s8(i, j),
|a: i8, b: i8| -> u8 {
if a < b {
0xFF
} else {
0
}
},
|a: i8, b: i8| -> u8 { if a < b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcltq_s8() {
testq_cmp_s8(
|i, j| vcltq_s8(i, j),
|a: i8, b: i8| -> u8 {
if a < b {
0xFF
} else {
0
}
},
|a: i8, b: i8| -> u8 { if a < b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vclt_s16() {
test_cmp_s16(
|i, j| vclt_s16(i, j),
|a: i16, b: i16| -> u16 {
if a < b {
0xFFFF
} else {
0
}
},
|a: i16, b: i16| -> u16 { if a < b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcltq_s16() {
testq_cmp_s16(
|i, j| vcltq_s16(i, j),
|a: i16, b: i16| -> u16 {
if a < b {
0xFFFF
} else {
0
}
},
|a: i16, b: i16| -> u16 { if a < b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vclt_s32() {
test_cmp_s32(
|i, j| vclt_s32(i, j),
|a: i32, b: i32| -> u32 {
if a < b {
0xFFFFFFFF
} else {
0
}
},
|a: i32, b: i32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcltq_s32() {
testq_cmp_s32(
|i, j| vcltq_s32(i, j),
|a: i32, b: i32| -> u32 {
if a < b {
0xFFFFFFFF
} else {
0
}
},
|a: i32, b: i32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -14267,78 +14063,42 @@ unsafe fn test_vcltq_s32() {
unsafe fn test_vclt_u8() {
test_cmp_u8(
|i, j| vclt_u8(i, j),
|a: u8, b: u8| -> u8 {
if a < b {
0xFF
} else {
0
}
},
|a: u8, b: u8| -> u8 { if a < b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcltq_u8() {
testq_cmp_u8(
|i, j| vcltq_u8(i, j),
|a: u8, b: u8| -> u8 {
if a < b {
0xFF
} else {
0
}
},
|a: u8, b: u8| -> u8 { if a < b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vclt_u16() {
test_cmp_u16(
|i, j| vclt_u16(i, j),
|a: u16, b: u16| -> u16 {
if a < b {
0xFFFF
} else {
0
}
},
|a: u16, b: u16| -> u16 { if a < b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcltq_u16() {
testq_cmp_u16(
|i, j| vcltq_u16(i, j),
|a: u16, b: u16| -> u16 {
if a < b {
0xFFFF
} else {
0
}
},
|a: u16, b: u16| -> u16 { if a < b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vclt_u32() {
test_cmp_u32(
|i, j| vclt_u32(i, j),
|a: u32, b: u32| -> u32 {
if a < b {
0xFFFFFF
} else {
0
}
},
|a: u32, b: u32| -> u32 { if a < b { 0xFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcltq_u32() {
testq_cmp_u32(
|i, j| vcltq_u32(i, j),
|a: u32, b: u32| -> u32 {
if a < b {
0xFFFFFFFF
} else {
0
}
},
|a: u32, b: u32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -14346,26 +14106,14 @@ unsafe fn test_vcltq_u32() {
unsafe fn test_vclt_f32() {
test_cmp_f32(
|i, j| vclt_f32(i, j),
|a: f32, b: f32| -> u32 {
if a < b {
0xFFFFFFFF
} else {
0
}
},
|a: f32, b: f32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcltq_f32() {
testq_cmp_f32(
|i, j| vcltq_f32(i, j),
|a: f32, b: f32| -> u32 {
if a < b {
0xFFFFFFFF
} else {
0
}
},
|a: f32, b: f32| -> u32 { if a < b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -14373,78 +14121,42 @@ unsafe fn test_vcltq_f32() {
unsafe fn test_vcle_s8() {
test_cmp_s8(
|i, j| vcle_s8(i, j),
|a: i8, b: i8| -> u8 {
if a <= b {
0xFF
} else {
0
}
},
|a: i8, b: i8| -> u8 { if a <= b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcleq_s8() {
testq_cmp_s8(
|i, j| vcleq_s8(i, j),
|a: i8, b: i8| -> u8 {
if a <= b {
0xFF
} else {
0
}
},
|a: i8, b: i8| -> u8 { if a <= b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcle_s16() {
test_cmp_s16(
|i, j| vcle_s16(i, j),
|a: i16, b: i16| -> u16 {
if a <= b {
0xFFFF
} else {
0
}
},
|a: i16, b: i16| -> u16 { if a <= b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcleq_s16() {
testq_cmp_s16(
|i, j| vcleq_s16(i, j),
|a: i16, b: i16| -> u16 {
if a <= b {
0xFFFF
} else {
0
}
},
|a: i16, b: i16| -> u16 { if a <= b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcle_s32() {
test_cmp_s32(
|i, j| vcle_s32(i, j),
|a: i32, b: i32| -> u32 {
if a <= b {
0xFFFFFFFF
} else {
0
}
},
|a: i32, b: i32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcleq_s32() {
testq_cmp_s32(
|i, j| vcleq_s32(i, j),
|a: i32, b: i32| -> u32 {
if a <= b {
0xFFFFFFFF
} else {
0
}
},
|a: i32, b: i32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -14452,78 +14164,42 @@ unsafe fn test_vcleq_s32() {
unsafe fn test_vcle_u8() {
test_cmp_u8(
|i, j| vcle_u8(i, j),
|a: u8, b: u8| -> u8 {
if a <= b {
0xFF
} else {
0
}
},
|a: u8, b: u8| -> u8 { if a <= b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcleq_u8() {
testq_cmp_u8(
|i, j| vcleq_u8(i, j),
|a: u8, b: u8| -> u8 {
if a <= b {
0xFF
} else {
0
}
},
|a: u8, b: u8| -> u8 { if a <= b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcle_u16() {
test_cmp_u16(
|i, j| vcle_u16(i, j),
|a: u16, b: u16| -> u16 {
if a <= b {
0xFFFF
} else {
0
}
},
|a: u16, b: u16| -> u16 { if a <= b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcleq_u16() {
testq_cmp_u16(
|i, j| vcleq_u16(i, j),
|a: u16, b: u16| -> u16 {
if a <= b {
0xFFFF
} else {
0
}
},
|a: u16, b: u16| -> u16 { if a <= b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcle_u32() {
test_cmp_u32(
|i, j| vcle_u32(i, j),
|a: u32, b: u32| -> u32 {
if a <= b {
0xFFFFFFFF
} else {
0
}
},
|a: u32, b: u32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcleq_u32() {
testq_cmp_u32(
|i, j| vcleq_u32(i, j),
|a: u32, b: u32| -> u32 {
if a <= b {
0xFFFFFFFF
} else {
0
}
},
|a: u32, b: u32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -14531,26 +14207,14 @@ unsafe fn test_vcleq_u32() {
unsafe fn test_vcle_f32() {
test_cmp_f32(
|i, j| vcle_f32(i, j),
|a: f32, b: f32| -> u32 {
if a <= b {
0xFFFFFFFF
} else {
0
}
},
|a: f32, b: f32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcleq_f32() {
testq_cmp_f32(
|i, j| vcleq_f32(i, j),
|a: f32, b: f32| -> u32 {
if a <= b {
0xFFFFFFFF
} else {
0
}
},
|a: f32, b: f32| -> u32 { if a <= b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -14558,78 +14222,42 @@ unsafe fn test_vcleq_f32() {
unsafe fn test_vcge_s8() {
test_cmp_s8(
|i, j| vcge_s8(i, j),
|a: i8, b: i8| -> u8 {
if a >= b {
0xFF
} else {
0
}
},
|a: i8, b: i8| -> u8 { if a >= b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgeq_s8() {
testq_cmp_s8(
|i, j| vcgeq_s8(i, j),
|a: i8, b: i8| -> u8 {
if a >= b {
0xFF
} else {
0
}
},
|a: i8, b: i8| -> u8 { if a >= b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcge_s16() {
test_cmp_s16(
|i, j| vcge_s16(i, j),
|a: i16, b: i16| -> u16 {
if a >= b {
0xFFFF
} else {
0
}
},
|a: i16, b: i16| -> u16 { if a >= b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgeq_s16() {
testq_cmp_s16(
|i, j| vcgeq_s16(i, j),
|a: i16, b: i16| -> u16 {
if a >= b {
0xFFFF
} else {
0
}
},
|a: i16, b: i16| -> u16 { if a >= b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcge_s32() {
test_cmp_s32(
|i, j| vcge_s32(i, j),
|a: i32, b: i32| -> u32 {
if a >= b {
0xFFFFFFFF
} else {
0
}
},
|a: i32, b: i32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgeq_s32() {
testq_cmp_s32(
|i, j| vcgeq_s32(i, j),
|a: i32, b: i32| -> u32 {
if a >= b {
0xFFFFFFFF
} else {
0
}
},
|a: i32, b: i32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -14637,78 +14265,42 @@ unsafe fn test_vcgeq_s32() {
unsafe fn test_vcge_u8() {
test_cmp_u8(
|i, j| vcge_u8(i, j),
|a: u8, b: u8| -> u8 {
if a >= b {
0xFF
} else {
0
}
},
|a: u8, b: u8| -> u8 { if a >= b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgeq_u8() {
testq_cmp_u8(
|i, j| vcgeq_u8(i, j),
|a: u8, b: u8| -> u8 {
if a >= b {
0xFF
} else {
0
}
},
|a: u8, b: u8| -> u8 { if a >= b { 0xFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcge_u16() {
test_cmp_u16(
|i, j| vcge_u16(i, j),
|a: u16, b: u16| -> u16 {
if a >= b {
0xFFFF
} else {
0
}
},
|a: u16, b: u16| -> u16 { if a >= b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgeq_u16() {
testq_cmp_u16(
|i, j| vcgeq_u16(i, j),
|a: u16, b: u16| -> u16 {
if a >= b {
0xFFFF
} else {
0
}
},
|a: u16, b: u16| -> u16 { if a >= b { 0xFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcge_u32() {
test_cmp_u32(
|i, j| vcge_u32(i, j),
|a: u32, b: u32| -> u32 {
if a >= b {
0xFFFFFFFF
} else {
0
}
},
|a: u32, b: u32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgeq_u32() {
testq_cmp_u32(
|i, j| vcgeq_u32(i, j),
|a: u32, b: u32| -> u32 {
if a >= b {
0xFFFFFFFF
} else {
0
}
},
|a: u32, b: u32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } },
);
}
@@ -14716,26 +14308,14 @@ unsafe fn test_vcgeq_u32() {
unsafe fn test_vcge_f32() {
test_cmp_f32(
|i, j| vcge_f32(i, j),
|a: f32, b: f32| -> u32 {
if a >= b {
0xFFFFFFFF
} else {
0
}
},
|a: f32, b: f32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } },
);
}
#[simd_test(enable = "neon")]
unsafe fn test_vcgeq_f32() {
testq_cmp_f32(
|i, j| vcgeq_f32(i, j),
|a: f32, b: f32| -> u32 {
if a >= b {
0xFFFFFFFF
} else {
0
}
},
|a: f32, b: f32| -> u32 { if a >= b { 0xFFFFFFFF } else { 0 } },
);
}
library/stdarch/crates/core_arch/src/macros.rs
+3 -9
View File
@@ -131,17 +131,11 @@ macro_rules! simd_shuffle {
#[allow(unused)]
macro_rules! simd_insert {
($x:expr, $idx:expr, $val:expr $(,)?) => {{
$crate::intrinsics::simd::simd_insert($x, const { $idx }, $val)
}};
($x:expr, $idx:expr, $val:expr $(,)?) => {{ $crate::intrinsics::simd::simd_insert($x, const { $idx }, $val) }};
}
#[allow(unused)]
macro_rules! simd_extract {
($x:expr, $idx:expr $(,)?) => {{
$crate::intrinsics::simd::simd_extract($x, const { $idx })
}};
($x:expr, $idx:expr, $ty:ty $(,)?) => {{
$crate::intrinsics::simd::simd_extract::<_, $ty>($x, const { $idx })
}};
($x:expr, $idx:expr $(,)?) => {{ $crate::intrinsics::simd::simd_extract($x, const { $idx }) }};
($x:expr, $idx:expr, $ty:ty $(,)?) => {{ $crate::intrinsics::simd::simd_extract::<_, $ty>($x, const { $idx }) }};
}
library/stdarch/crates/core_arch/src/mod.rs
+1 -1
View File
@@ -72,8 +72,8 @@ pub mod aarch64 {
#[doc(cfg(any(target_arch = "riscv32")))]
#[unstable(feature = "riscv_ext_intrinsics", issue = "114544")]
pub mod riscv32 {
pub use crate::core_arch::riscv32::*;
pub use crate::core_arch::riscv_shared::*;
pub use crate::core_arch::riscv32::*;
}
/// Platform-specific intrinsics for the `riscv64` platform.
library/stdarch/crates/core_arch/src/powerpc/altivec.rs
+6 -2
View File
@@ -4720,7 +4720,9 @@ unsafe fn test_vec_ld() {
let v: u8x16 = transmute(vec_ld(0, (pat.as_ptr() as *const u8).offset(off)));
assert_eq!(
v,
u8x16::new(16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31)
u8x16::new(
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
)
);
}
}
@@ -4778,7 +4780,9 @@ unsafe fn test_vec_ldl() {
let v: u8x16 = transmute(vec_ldl(0, (pat.as_ptr() as *const u8).offset(off)));
assert_eq!(
v,
u8x16::new(16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31)
u8x16::new(
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
)
);
}
}
library/stdarch/crates/core_arch/src/wasm32/simd128.rs
+3 -1
View File
@@ -4361,7 +4361,9 @@ fn test_i8x16() {
};
assert_eq!(
bytes,
[-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15, -16]
[
-1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15, -16
]
);
}
library/stdarch/crates/core_arch/src/x86/avx2.rs
+2 -2
View File
@@ -3785,7 +3785,7 @@ fn vpgatherqpd(
) -> __m256d;
#[link_name = "llvm.x86.avx2.gather.d.ps"]
fn pgatherdps(src: __m128, slice: *const i8, offsets: i32x4, mask: __m128, scale: i8)
-> __m128;
-> __m128;
#[link_name = "llvm.x86.avx2.gather.d.ps.256"]
fn vpgatherdps(
src: __m256,
@@ -3796,7 +3796,7 @@ fn vpgatherdps(
) -> __m256;
#[link_name = "llvm.x86.avx2.gather.q.ps"]
fn pgatherqps(src: __m128, slice: *const i8, offsets: i64x2, mask: __m128, scale: i8)
-> __m128;
-> __m128;
#[link_name = "llvm.x86.avx2.gather.q.ps.256"]
fn vpgatherqps(
src: __m128,
library/stdarch/crates/core_arch/src/x86/avx512bitalg.rs
+4 -4
View File
@@ -7,19 +7,19 @@
//!
//! [intel64_ref]: http://www.intel.de/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-instruction-set-reference-manual-325383.pdf
use crate::core_arch::simd::i16x16;
use crate::core_arch::simd::i16x32;
use crate::core_arch::simd::i16x8;
use crate::core_arch::simd::i8x16;
use crate::core_arch::simd::i8x32;
use crate::core_arch::simd::i8x64;
use crate::core_arch::simd::i16x8;
use crate::core_arch::simd::i16x16;
use crate::core_arch::simd::i16x32;
use crate::core_arch::x86::__m128i;
use crate::core_arch::x86::__m256i;
use crate::core_arch::x86::__m512i;
use crate::core_arch::x86::__mmask8;
use crate::core_arch::x86::__mmask16;
use crate::core_arch::x86::__mmask32;
use crate::core_arch::x86::__mmask64;
use crate::core_arch::x86::__mmask8;
use crate::intrinsics::simd::{simd_ctpop, simd_select_bitmask};
use crate::mem::transmute;
library/stdarch/crates/core_arch/src/x86/avx512bw.rs
+2 -2
View File
@@ -9572,7 +9572,7 @@ pub unsafe fn _mm512_movepi8_mask(a: __m512i) -> __mmask64 {
#[target_feature(enable = "avx512bw,avx512vl")]
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
#[cfg_attr(test, assert_instr(vpmovmskb))] // should be vpmovb2m but compiled to vpmovmskb in the test shim because that takes less cycles than
// using vpmovb2m plus converting the mask register to a standard register.
// using vpmovb2m plus converting the mask register to a standard register.
pub unsafe fn _mm256_movepi8_mask(a: __m256i) -> __mmask32 {
let filter = _mm256_set1_epi8(1 << 7);
let a = _mm256_and_si256(a, filter);
@@ -9586,7 +9586,7 @@ pub unsafe fn _mm256_movepi8_mask(a: __m256i) -> __mmask32 {
#[target_feature(enable = "avx512bw,avx512vl")]
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
#[cfg_attr(test, assert_instr(vpmovmskb))] // should be vpmovb2m but compiled to vpmovmskb in the test shim because that takes less cycles than
// using vpmovb2m plus converting the mask register to a standard register.
// using vpmovb2m plus converting the mask register to a standard register.
pub unsafe fn _mm_movepi8_mask(a: __m128i) -> __mmask16 {
let filter = _mm_set1_epi8(1 << 7);
let a = _mm_and_si128(a, filter);
library/stdarch/crates/core_arch/src/x86/avx512dq.rs
+1 -1
View File
@@ -6836,7 +6836,7 @@ pub unsafe fn _mm_mask_fpclass_ss_mask<const IMM8: i32>(k1: __mmask8, a: __m128)
fn vrangeps_256(a: f32x8, b: f32x8, imm8: i32, src: f32x8, k: __mmask8) -> f32x8;
#[link_name = "llvm.x86.avx512.mask.range.ps.512"]
fn vrangeps_512(a: f32x16, b: f32x16, imm8: i32, src: f32x16, k: __mmask16, sae: i32)
-> f32x16;
-> f32x16;
#[link_name = "llvm.x86.avx512.mask.range.sd"]
fn vrangesd(a: f64x2, b: f64x2, src: f64x2, k: __mmask8, imm8: i32, sae: i32) -> f64x2;
library/stdarch/crates/core_arch/src/x86/avx512f.rs
+6 -2
View File
@@ -26220,12 +26220,16 @@ pub unsafe fn _mm512_alignr_epi32<const IMM8: i32>(a: __m512i, b: __m512i) -> __
0 => simd_shuffle!(
a,
b,
[16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,],
[
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
],
),
1 => simd_shuffle!(
a,
b,
[17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0,],
[
17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0,
],
),
2 => simd_shuffle!(
a,
library/stdarch/crates/core_arch/src/x86/avx512fp16.rs
+15 -7
View File
@@ -10866,7 +10866,9 @@ pub unsafe fn _mm512_reduce_add_ph(a: __m512h) -> f16 {
let q = simd_shuffle!(
a,
a,
[16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
[
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
]
);
_mm256_reduce_add_ph(_mm256_add_ph(p, q))
}
@@ -10911,7 +10913,9 @@ pub unsafe fn _mm512_reduce_mul_ph(a: __m512h) -> f16 {
let q = simd_shuffle!(
a,
a,
[16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
[
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
]
);
_mm256_reduce_mul_ph(_mm256_mul_ph(p, q))
}
@@ -10957,7 +10961,9 @@ pub unsafe fn _mm512_reduce_min_ph(a: __m512h) -> f16 {
let q = simd_shuffle!(
a,
a,
[16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
[
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
]
);
_mm256_reduce_min_ph(_mm256_min_ph(p, q))
}
@@ -11003,7 +11009,9 @@ pub unsafe fn _mm512_reduce_max_ph(a: __m512h) -> f16 {
let q = simd_shuffle!(
a,
a,
[16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
[
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
]
);
_mm256_reduce_max_ph(_mm256_max_ph(p, q))
}
@@ -16059,10 +16067,10 @@ pub unsafe fn _mm_cvtsi16_si128(a: i16) -> __m128i {
fn vfcmaddcph_maskz_256(a: __m256, b: __m256, c: __m256, k: __mmask8) -> __m256;
#[link_name = "llvm.x86.avx512fp16.mask.vfcmadd.cph.512"]
fn vfcmaddcph_mask3_512(a: __m512, b: __m512, c: __m512, k: __mmask16, rounding: i32)
-> __m512;
-> __m512;
#[link_name = "llvm.x86.avx512fp16.maskz.vfcmadd.cph.512"]
fn vfcmaddcph_maskz_512(a: __m512, b: __m512, c: __m512, k: __mmask16, rounding: i32)
-> __m512;
-> __m512;
#[link_name = "llvm.x86.avx512fp16.mask.vfcmadd.csh"]
fn vfcmaddcsh_mask(a: __m128, b: __m128, c: __m128, k: __mmask8, rounding: i32) -> __m128;
#[link_name = "llvm.x86.avx512fp16.maskz.vfcmadd.csh"]
@@ -16179,7 +16187,7 @@ fn vrndscalesh(
fn vreduceph_512(a: __m512h, imm8: i32, src: __m512h, k: __mmask32, sae: i32) -> __m512h;
#[link_name = "llvm.x86.avx512fp16.mask.reduce.sh"]
fn vreducesh(a: __m128h, b: __m128h, src: __m128h, k: __mmask8, imm8: i32, sae: i32)
-> __m128h;
-> __m128h;
#[link_name = "llvm.x86.avx512fp16.mask.fpclass.sh"]
fn vfpclasssh(a: __m128h, imm8: i32, k: __mmask8) -> __mmask8;
library/stdarch/crates/core_arch/src/x86/avx512vpopcntdq.rs
+1 -1
View File
@@ -11,8 +11,8 @@
use crate::core_arch::x86::__m128i;
use crate::core_arch::x86::__m256i;
use crate::core_arch::x86::__m512i;
use crate::core_arch::x86::__mmask16;
use crate::core_arch::x86::__mmask8;
use crate::core_arch::x86::__mmask16;
use crate::intrinsics::simd::{simd_ctpop, simd_select_bitmask};
use crate::mem::transmute;
library/stdarch/crates/core_arch/src/x86/sse2.rs
+1 -5
View File
@@ -449,11 +449,7 @@ pub unsafe fn _mm_slli_si128<const IMM8: i32>(a: __m128i) -> __m128i {
unsafe fn _mm_slli_si128_impl<const IMM8: i32>(a: __m128i) -> __m128i {
const fn mask(shift: i32, i: u32) -> u32 {
let shift = shift as u32 & 0xff;
if shift > 15 {
i
} else {
16 - shift + i
}
if shift > 15 { i } else { 16 - shift + i }
}
transmute::<i8x16, _>(simd_shuffle!(
i8x16::ZERO,
library/stdarch/crates/core_arch/src/x86/test.rs
+1 -1
View File
@@ -133,7 +133,7 @@ pub unsafe fn _mm256_insert_epi64<const INDEX: i32>(a: __m256i, val: i64) -> __m
#[cfg(target_arch = "x86_64")]
mod x86_polyfill {
pub use crate::core_arch::x86_64::{_mm256_insert_epi64, _mm_insert_epi64};
pub use crate::core_arch::x86_64::{_mm_insert_epi64, _mm256_insert_epi64};
}
pub use self::x86_polyfill::*;
library/stdarch/crates/core_arch/src/x86_64/amx.rs
+1 -1
View File
@@ -292,7 +292,7 @@ mod tests {
use core::mem::transmute;
use stdarch_test::simd_test;
#[cfg(target_os = "linux")]
use syscalls::{syscall, Sysno};
use syscalls::{Sysno, syscall};
#[allow(non_camel_case_types)]
#[repr(packed)]
library/stdarch/crates/intrinsic-test/src/argument.rs
+1 -1
View File
@@ -1,9 +1,9 @@
use std::ops::Range;
use crate::Language;
use crate::format::Indentation;
use crate::json_parser::ArgPrep;
use crate::types::{IntrinsicType, TypeKind};
use crate::Language;
/// An argument for the intrinsic.
#[derive(Debug, PartialEq, Clone)]
library/stdarch/crates/intrinsic-test/src/types.rs
+1 -1
View File
@@ -3,9 +3,9 @@
use itertools::Itertools as _;
use crate::Language;
use crate::format::Indentation;
use crate::values::value_for_array;
use crate::Language;
#[derive(Debug, PartialEq, Copy, Clone)]
pub enum TypeKind {
library/stdarch/crates/std_detect/src/detect/os/aarch64.rs
+1 -1
View File
@@ -17,7 +17,7 @@
//! - [Linux documentation](https://www.kernel.org/doc/Documentation/arm64/cpu-feature-registers.txt)
//! - [ARM documentation](https://developer.arm.com/documentation/ddi0601/2022-12/AArch64-Registers?lang=en)
use crate::detect::{cache, Feature};
use crate::detect::{Feature, cache};
use core::arch::asm;
/// Try to read the features from the system registers.
library/stdarch/crates/std_detect/src/detect/os/darwin/aarch64.rs
+1 -1
View File
@@ -2,7 +2,7 @@
//!
//! <https://developer.apple.com/documentation/kernel/1387446-sysctlbyname/determining_instruction_set_characteristics>
use crate::detect::{cache, Feature};
use crate::detect::{Feature, cache};
use core::ffi::CStr;
#[inline]
library/stdarch/crates/std_detect/src/detect/os/freebsd/arm.rs
+1 -1
View File
@@ -1,7 +1,7 @@
//! Run-time feature detection for ARM on FreeBSD
use super::auxvec;
use crate::detect::{cache, Feature};
use crate::detect::{Feature, cache};
// Defined in machine/elf.h.
// https://github.com/freebsd/freebsd-src/blob/deb63adf945d446ed91a9d84124c71f15ae571d1/sys/arm/include/elf.h
library/stdarch/crates/std_detect/src/detect/os/freebsd/powerpc.rs
+1 -1
View File
@@ -1,7 +1,7 @@
//! Run-time feature detection for PowerPC on FreeBSD.
use super::auxvec;
use crate::detect::{cache, Feature};
use crate::detect::{Feature, cache};
pub(crate) fn detect_features() -> cache::Initializer {
let mut value = cache::Initializer::default();
library/stdarch/crates/std_detect/src/detect/os/linux/aarch64.rs
+1 -1
View File
@@ -1,7 +1,7 @@
//! Run-time feature detection for Aarch64 on Linux.
use super::auxvec;
use crate::detect::{bit, cache, Feature};
use crate::detect::{Feature, bit, cache};
/// Try to read the features from the auxiliary vector, and if that fails, try
/// to read them from /proc/cpuinfo.
library/stdarch/crates/std_detect/src/detect/os/linux/arm.rs
+1 -1
View File
@@ -1,7 +1,7 @@
//! Run-time feature detection for ARM on Linux.
use super::auxvec;
use crate::detect::{bit, cache, Feature};
use crate::detect::{Feature, bit, cache};
/// Try to read the features from the auxiliary vector, and if that fails, try
/// to read them from /proc/cpuinfo.
library/stdarch/crates/std_detect/src/detect/os/linux/loongarch.rs
+1 -1
View File
@@ -1,7 +1,7 @@
//! Run-time feature detection for LoongArch on Linux.
use super::auxvec;
use crate::detect::{bit, cache, Feature};
use crate::detect::{Feature, bit, cache};
use core::arch::asm;
/// Try to read the features from the auxiliary vector.
library/stdarch/crates/std_detect/src/detect/os/linux/mips.rs
+1 -1
View File
@@ -1,7 +1,7 @@
//! Run-time feature detection for MIPS on Linux.
use super::auxvec;
use crate::detect::{bit, cache, Feature};
use crate::detect::{Feature, bit, cache};
/// Try to read the features from the auxiliary vector, and if that fails, try
/// to read them from `/proc/cpuinfo`.
library/stdarch/crates/std_detect/src/detect/os/linux/powerpc.rs
+1 -1
View File
@@ -1,7 +1,7 @@
//! Run-time feature detection for PowerPC on Linux.
use super::auxvec;
use crate::detect::{cache, Feature};
use crate::detect::{Feature, cache};
/// Try to read the features from the auxiliary vector, and if that fails, try
/// to read them from /proc/cpuinfo.
library/stdarch/crates/std_detect/src/detect/os/linux/riscv.rs
+1 -1
View File
@@ -1,7 +1,7 @@
//! Run-time feature detection for RISC-V on Linux.
use super::auxvec;
use crate::detect::{bit, cache, Feature};
use crate::detect::{Feature, bit, cache};
/// Read list of supported features from the auxiliary vector.
pub(crate) fn detect_features() -> cache::Initializer {
library/stdarch/crates/std_detect/src/detect/os/linux/s390x.rs
+1 -1
View File
@@ -1,7 +1,7 @@
//! Run-time feature detection for s390x on Linux.
use super::auxvec;
use crate::detect::{bit, cache, Feature};
use crate::detect::{Feature, bit, cache};
/// Try to read the features from the auxiliary vector
pub(crate) fn detect_features() -> cache::Initializer {
library/stdarch/crates/std_detect/src/detect/os/windows/aarch64.rs
+1 -1
View File
@@ -1,6 +1,6 @@
//! Run-time feature detection for Aarch64 on Windows.
use crate::detect::{cache, Feature};
use crate::detect::{Feature, cache};
/// Try to read the features using IsProcessorFeaturePresent.
pub(crate) fn detect_features() -> cache::Initializer {
library/stdarch/crates/std_detect/src/detect/os/x86.rs
+1 -1
View File
@@ -7,7 +7,7 @@
use core::mem;
use crate::detect::{bit, cache, Feature};
use crate::detect::{Feature, bit, cache};
/// Run-time feature detection on x86 works by using the CPUID instruction.
///
library/stdarch/crates/stdarch-gen-arm/src/assert_instr.rs
+2 -2
View File
@@ -1,7 +1,7 @@
use proc_macro2::TokenStream;
use quote::{format_ident, quote, ToTokens, TokenStreamExt};
use quote::{ToTokens, TokenStreamExt, format_ident, quote};
use serde::de::{self, MapAccess, Visitor};
use serde::{ser::SerializeSeq, Deserialize, Deserializer, Serialize};
use serde::{Deserialize, Deserializer, Serialize, ser::SerializeSeq};
use std::fmt;
use crate::{
library/stdarch/crates/stdarch-gen-arm/src/context.rs
+3 -1
View File
@@ -240,7 +240,9 @@ pub fn make_assertion_from_constraint(&self, constraint: &Constraint) -> Result<
format!("{variable}, 0, {max}"),
))
} else {
Err(format!("can't make an assertion out of constraint {self:?}: no types are being used"))
Err(format!(
"can't make an assertion out of constraint {self:?}: no types are being used"
))
}
}
_ => unreachable!("constraints were not built successfully!"),
library/stdarch/crates/stdarch-gen-arm/src/expression.rs
+1 -1
View File
@@ -1,7 +1,7 @@
use itertools::Itertools;
use lazy_static::lazy_static;
use proc_macro2::{Literal, Punct, Spacing, TokenStream};
use quote::{format_ident, quote, ToTokens, TokenStreamExt};
use quote::{ToTokens, TokenStreamExt, format_ident, quote};
use regex::Regex;
use serde::de::{self, MapAccess, Visitor};
use serde::{Deserialize, Deserializer, Serialize};
library/stdarch/crates/stdarch-gen-arm/src/input.rs
+2 -2
View File
@@ -1,5 +1,5 @@
use itertools::Itertools;
use serde::{de, Deserialize, Deserializer, Serialize};
use serde::{Deserialize, Deserializer, Serialize, de};
use crate::{
context::{self, GlobalContext},
@@ -87,7 +87,7 @@ fn cmp(&self, other: &Self) -> std::cmp::Ordering {
}
mod many_or_one {
use serde::{de::Deserializer, ser::Serializer, Deserialize, Serialize};
use serde::{Deserialize, Serialize, de::Deserializer, ser::Serializer};
pub fn serialize<T, S>(vec: &Vec<T>, serializer: S) -> Result<S::Ok, S::Error>
where
library/stdarch/crates/stdarch-gen-arm/src/intrinsic.rs
+16 -8
View File
@@ -1,6 +1,6 @@
use itertools::Itertools;
use proc_macro2::{Delimiter, Group, Punct, Spacing, TokenStream};
use quote::{format_ident, quote, ToTokens, TokenStreamExt};
use quote::{ToTokens, TokenStreamExt, format_ident, quote};
use serde::{Deserialize, Serialize};
use serde_with::{DeserializeFromStr, SerializeDisplay};
use std::collections::{HashMap, HashSet};
@@ -17,7 +17,7 @@
assert_instr::InstructionAssertionMethod,
context::{self, ArchitectureSettings, Context, LocalContext, VariableType},
expression::{Expression, FnCall, IdentifierType},
fn_suffix::{type_to_size, SuffixKind},
fn_suffix::{SuffixKind, type_to_size},
input::IntrinsicInput,
matching::{KindMatchable, SizeMatchable},
typekinds::*,
@@ -995,7 +995,10 @@ pub fn generate_variant(
};
if variant.attr.is_none() && variant.assert_instr.is_none() {
panic!("Error: {} is missing both 'attr' and 'assert_instr' fields. You must either manually declare the attributes using the 'attr' field or use 'assert_instr'!", variant.signature.name.to_string());
panic!(
"Error: {} is missing both 'attr' and 'assert_instr' fields. You must either manually declare the attributes using the 'attr' field or use 'assert_instr'!",
variant.signature.name.to_string()
);
}
if variant.attr.is_some() {
@@ -1181,7 +1184,10 @@ fn generate_n_variant(
.any(|w| matches!(w, Wildcard::NVariant));
if !has_n_wildcard {
return Err(format!("cannot generate `_n` variant for {}, no wildcard {{_n}} was specified in the intrinsic's name", variant.signature.name));
return Err(format!(
"cannot generate `_n` variant for {}, no wildcard {{_n}} was specified in the intrinsic's name",
variant.signature.name
));
}
// Build signature
@@ -1205,9 +1211,9 @@ fn generate_n_variant(
}
_ => {
return Err(format!(
"cannot generate `_n` variant for {}, the given operand is not a valid SVE type",
variant.signature.name
))
"cannot generate `_n` variant for {}, the given operand is not a valid SVE type",
variant.signature.name
));
}
};
@@ -1434,7 +1440,9 @@ fn defer_to_existing_llvm_link(
(Some(BaseTypeKind::Poly), Some(BaseTypeKind::Poly)) => ex,
(None, None) => ex,
_ => unreachable!("unsupported conversion case from {from_base_type:?} to {to_base_type:?} hit"),
_ => unreachable!(
"unsupported conversion case from {from_base_type:?} to {to_base_type:?} hit"
),
}
} else {
ex
library/stdarch/crates/stdarch-gen-arm/src/load_store_tests.rs
+4 -1
View File
@@ -76,7 +76,10 @@ pub fn generate_load_store_tests(
})
.try_collect()?;
assert!(used_stores.into_iter().all(|b| b), "Not all store tests have been paired with a load. Consider generating specifc store-only tests");
assert!(
used_stores.into_iter().all(|b| b),
"Not all store tests have been paired with a load. Consider generating specifc store-only tests"
);
let preamble =
TokenStream::from_str(&PREAMBLE).map_err(|e| format!("Preamble is invalid: {e}"))?;
library/stdarch/crates/stdarch-gen-arm/src/typekinds.rs
+1 -1
View File
@@ -1,6 +1,6 @@
use lazy_static::lazy_static;
use proc_macro2::TokenStream;
use quote::{quote, ToTokens, TokenStreamExt};
use quote::{ToTokens, TokenStreamExt, quote};
use regex::Regex;
use serde_with::{DeserializeFromStr, SerializeDisplay};
use std::fmt;
library/stdarch/crates/stdarch-gen-arm/src/wildstring.rs
+1 -1
View File
@@ -1,6 +1,6 @@
use itertools::Itertools;
use proc_macro2::TokenStream;
use quote::{quote, ToTokens, TokenStreamExt};
use quote::{ToTokens, TokenStreamExt, quote};
use serde_with::{DeserializeFromStr, SerializeDisplay};
use std::str::pattern::Pattern;
use std::{fmt, str::FromStr};
library/stdarch/crates/stdarch-gen-loongarch/src/main.rs
+25 -7
View File
@@ -495,7 +495,10 @@ fn gen_bind_body(
};
} else if para_num == 2 && in_t[0] == "CVPOINTER" && in_t[1] == "SI" {
call_params = if asm_fmts[2].starts_with("si") {
format!("static_assert_simm_bits!(IMM_S{0}, {0});\n __{current_name}(mem_addr, IMM_S{0})", asm_fmts[2].get(2..).unwrap())
format!(
"static_assert_simm_bits!(IMM_S{0}, {0});\n __{current_name}(mem_addr, IMM_S{0})",
asm_fmts[2].get(2..).unwrap()
)
} else {
panic!("unsupported assembly format: {}", asm_fmts[2])
}
@@ -515,7 +518,9 @@ fn gen_bind_body(
}
} else if para_num == 3 && in_t[1] == "CVPOINTER" && in_t[2] == "SI" {
call_params = match asm_fmts[2].as_str() {
"si12" => format!("static_assert_simm_bits!(IMM_S12, 12);\n __{current_name}(a, mem_addr, IMM_S12)"),
"si12" => format!(
"static_assert_simm_bits!(IMM_S12, 12);\n __{current_name}(a, mem_addr, IMM_S12)"
),
_ => panic!("unsupported assembly format: {}", asm_fmts[2]),
};
} else if para_num == 3 && in_t[1] == "CVPOINTER" && in_t[2] == "DI" {
@@ -525,8 +530,14 @@ fn gen_bind_body(
};
} else if para_num == 4 {
call_params = match (asm_fmts[2].as_str(), current_name.chars().last().unwrap()) {
("si8", t) => format!("static_assert_simm_bits!(IMM_S8, 8);\n static_assert_uimm_bits!(IMM{0}, {0});\n __{current_name}(a, mem_addr, IMM_S8, IMM{0})", type_to_imm(t)),
(_, _) => panic!("unsupported assembly format: {} for {}", asm_fmts[2], current_name),
("si8", t) => format!(
"static_assert_simm_bits!(IMM_S8, 8);\n static_assert_uimm_bits!(IMM{0}, {0});\n __{current_name}(a, mem_addr, IMM_S8, IMM{0})",
type_to_imm(t)
),
(_, _) => panic!(
"unsupported assembly format: {} for {}",
asm_fmts[2], current_name
),
}
}
let function = if !rustc_legacy_const_generics.is_empty() {
@@ -1186,7 +1197,10 @@ fn gen_test_body(
"UQI" => " printf(\" let r: u32 = %u;\\n\", o);",
"QI" => " printf(\" let r: i32 = %d;\\n\", o);",
"HI" => " printf(\" let r: i32 = %d;\\n\", o);",
"V32QI" | "V16HI" | "V8SI" | "V4DI" | "UV32QI" | "UV16HI" | "UV8SI" | "UV4DI" | "V8SF" | "V4DF" => " printf(\" let r = i64x4::new(%ld, %ld, %ld, %ld);\\n\", o.i64[0], o.i64[1], o.i64[2], o.i64[3]);",
"V32QI" | "V16HI" | "V8SI" | "V4DI" | "UV32QI" | "UV16HI" | "UV8SI" | "UV4DI"
| "V8SF" | "V4DF" => {
" printf(\" let r = i64x4::new(%ld, %ld, %ld, %ld);\\n\", o.i64[0], o.i64[1], o.i64[2], o.i64[3]);"
}
_ => " printf(\" let r = i64x2::new(%ld, %ld);\\n\", o.i64[0], o.i64[1]);",
}
};
@@ -1480,9 +1494,13 @@ fn gen_test_body(
};
let fn_assert = {
if out_t.to_lowercase() == "void" {
format!(" printf(\"\\n {current_name}{as_params};\\n assert_eq!(r, transmute(o));\\n\"{as_args});")
format!(
" printf(\"\\n {current_name}{as_params};\\n assert_eq!(r, transmute(o));\\n\"{as_args});"
)
} else {
format!(" printf(\"\\n assert_eq!(r, transmute({current_name}{as_params}));\\n\"{as_args});")
format!(
" printf(\"\\n assert_eq!(r, transmute({current_name}{as_params}));\\n\"{as_args});"
)
}
};
format!(
library/stdarch/examples/connect5.rs
+1 -5
View File
@@ -560,11 +560,7 @@ fn search(pos: &Pos, alpha: i32, beta: i32, depth: i32, _ply: i32) -> i32 {
assert_ne!(bm, MOVE_NONE);
assert!(bs >= -EVAL_INF && bs <= EVAL_INF);
if _ply == 0 {
bm
} else {
bs
} //best move at the root node, best score elsewhere
if _ply == 0 { bm } else { bs } //best move at the root node, best score elsewhere
}
/// Evaluation function: give different scores to different patterns after a fixed depth.