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fix(clippy): redundant variables in simd.rs

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tempdragon
2024-03-11 12:36:39 +08:00
parent 091de55db8
commit d2cda90e4e
1 changed files with 1 additions and 3 deletions
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src/intrinsic/simd.rs
+1 -3
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@@ -531,7 +531,6 @@ macro_rules! arith_binary {
let sign_shift = bx.context.new_rvalue_from_int(elem_type, elem_size as i32 - 1);
let one = bx.context.new_rvalue_one(elem_type);
let mut shift = 0;
for i in 0..in_len {
let elem =
bx.extract_element(vector, bx.context.new_rvalue_from_int(bx.int_type, i as i32));
@@ -539,8 +538,7 @@ macro_rules! arith_binary {
let masked = shifted & one;
result = result
| (bx.context.new_cast(None, masked, result_type)
<< bx.context.new_rvalue_from_int(result_type, shift));
shift += 1;
<< bx.context.new_rvalue_from_int(result_type, i as i32));
}
match *ret_ty.kind() {