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Update amdgpu data layout

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This changed in:
https://github.com/llvm/llvm-project/commit/853760bca6aa7a960b154cef8c61f87271870b8a
This commit is contained in:
Nikita Popov
2026-01-06 11:51:33 +01:00
parent fffc4fcf96
commit bf3ac98d69
2 changed files with 6 additions and 1 deletions
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compiler/rustc_codegen_llvm/src/context.rs
+5
View File
@@ -215,6 +215,11 @@ pub(crate) unsafe fn create_module<'ll>(
// LLVM 22 updated the ABI alignment for double on AIX: https://github.com/llvm/llvm-project/pull/144673
target_data_layout = target_data_layout.replace("-f64:32:64", "");
}
if sess.target.arch == Arch::AmdGpu {
// LLVM 22 specified ELF mangling in the amdgpu data layout:
// https://github.com/llvm/llvm-project/pull/163011
target_data_layout = target_data_layout.replace("-m:e", "");
}
}
// Ensure the data-layout values hardcoded remain the defaults.
compiler/rustc_target/src/spec/targets/amdgcn_amd_amdhsa.rs
+1 -1
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@@ -5,7 +5,7 @@
pub(crate) fn target() -> Target {
Target {
arch: Arch::AmdGpu,
data_layout: "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9".into(),
data_layout: "e-m:e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9".into(),
llvm_target: "amdgcn-amd-amdhsa".into(),
metadata: TargetMetadata {
description: Some("AMD GPU".into()),