Auto merge of #152200 - jieyouxu:rollup-UNFpgZy, r=jieyouxu

Rollup of 4 pull requests

Successful merges:

 - rust-lang/rust#152174 (stdarch subtree update)
 - rust-lang/rust#151278 (Provide more context on trait bounds being unmet due to imperfect derive)
 - rust-lang/rust#151955 (escape symbol names in global asm)
 - rust-lang/rust#152194 (Remove the 4 failing tests from rustdoc-gui)

Failed merges:

 - rust-lang/rust#152191 (Convert to inline diagnostics in `rustc_hir_analysis`)

compiler/rustc_borrowck/src/diagnostics/conflict_errors.rs

@@ -1256,7 +1256,7 @@ pub(crate) fn suggest_cloning(
                 self.suggest_cloning_inner(err, ty, expr);
             }
         } else if let ty::Adt(def, args) = ty.kind()
-            && def.did().as_local().is_some()
+            && let Some(local_did) = def.did().as_local()
             && def.variants().iter().all(|variant| {
                 variant
                     .fields
@@ -1266,12 +1266,50 @@ pub(crate) fn suggest_cloning(
         {
             let ty_span = self.infcx.tcx.def_span(def.did());
             let mut span: MultiSpan = ty_span.into();
-            span.push_span_label(ty_span, "consider implementing `Clone` for this type");
-            span.push_span_label(expr.span, "you could clone this value");
-            err.span_note(
-                span,
-                format!("if `{ty}` implemented `Clone`, you could clone the value"),
+            let mut derive_clone = false;
+            self.infcx.tcx.for_each_relevant_impl(
+                self.infcx.tcx.lang_items().clone_trait().unwrap(),
+                ty,
+                |def_id| {
+                    if self.infcx.tcx.is_automatically_derived(def_id) {
+                        derive_clone = true;
+                        span.push_span_label(
+                            self.infcx.tcx.def_span(def_id),
+                            "derived `Clone` adds implicit bounds on type parameters",
+                        );
+                        if let Some(generics) = self.infcx.tcx.hir_get_generics(local_did) {
+                            for param in generics.params {
+                                if let hir::GenericParamKind::Type { .. } = param.kind {
+                                    span.push_span_label(
+                                        param.span,
+                                        format!(
+                                            "introduces an implicit `{}: Clone` bound",
+                                            param.name.ident()
+                                        ),
+                                    );
+                                }
+                            }
+                        }
+                    }
+                },
             );
+            let msg = if !derive_clone {
+                span.push_span_label(
+                    ty_span,
+                    format!(
+                        "consider {}implementing `Clone` for this type",
+                        if derive_clone { "manually " } else { "" }
+                    ),
+                );
+                format!("if `{ty}` implemented `Clone`, you could clone the value")
+            } else {
+                format!("if all bounds were met, you could clone the value")
+            };
+            span.push_span_label(expr.span, "you could clone this value");
+            err.span_note(span, msg);
+            if derive_clone {
+                err.help("consider manually implementing `Clone` to avoid undesired bounds");
+            }
         } else if let ty::Param(param) = ty.kind()
             && let Some(_clone_trait_def) = self.infcx.tcx.lang_items().clone_trait()
             && let generics = self.infcx.tcx.generics_of(self.mir_def_id())

compiler/rustc_builtin_macros/src/deriving/generic/mod.rs

@@ -638,27 +638,27 @@ fn create_derived_impl(
                 GenericParamKind::Type { .. } => {
                     // Extra restrictions on the generics parameters to the
                     // type being derived upon.
+                    let span = param.ident.span.with_ctxt(ctxt);
                     let bounds: Vec<_> = self
                         .additional_bounds
                         .iter()
                         .map(|p| {
-                            cx.trait_bound(
-                                p.to_path(cx, self.span, type_ident, generics),
-                                self.is_const,
-                            )
+                            cx.trait_bound(p.to_path(cx, span, type_ident, generics), self.is_const)
                         })
                         .chain(
                             // Add a bound for the current trait.
-                            self.skip_path_as_bound
-                                .not()
-                                .then(|| cx.trait_bound(trait_path.clone(), self.is_const)),
+                            self.skip_path_as_bound.not().then(|| {
+                                let mut trait_path = trait_path.clone();
+                                trait_path.span = span;
+                                cx.trait_bound(trait_path, self.is_const)
+                            }),
                         )
                         .chain({
                             // Add a `Copy` bound if required.
                             if is_packed && self.needs_copy_as_bound_if_packed {
                                 let p = deriving::path_std!(marker::Copy);
                                 Some(cx.trait_bound(
-                                    p.to_path(cx, self.span, type_ident, generics),
+                                    p.to_path(cx, span, type_ident, generics),
                                     self.is_const,
                                 ))
                             } else {
@@ -671,7 +671,7 @@ fn create_derived_impl(
                         )
                         .collect();
 
-                    cx.typaram(param.ident.span.with_ctxt(ctxt), param.ident, bounds, None)
+                    cx.typaram(span, param.ident, bounds, None)
                 }
                 GenericParamKind::Const { ty, span, .. } => {
                     let const_nodefault_kind = GenericParamKind::Const {
@@ -791,7 +791,8 @@ fn create_derived_impl(
             .collect();
 
         // Create the type of `self`.
-        let path = cx.path_all(self.span, false, vec![type_ident], self_params);
+        let path =
+            cx.path_all(type_ident.span.with_ctxt(ctxt), false, vec![type_ident], self_params);
         let self_type = cx.ty_path(path);
         let rustc_const_unstable =
             cx.path_ident(self.span, Ident::new(sym::rustc_const_unstable, self.span));

compiler/rustc_codegen_llvm/src/asm.rs

@@ -399,7 +399,7 @@ fn codegen_global_asm(
         for piece in template {
             match *piece {
                 InlineAsmTemplatePiece::String(ref s) => template_str.push_str(s),
-                InlineAsmTemplatePiece::Placeholder { operand_idx, modifier: _, span: _ } => {
+                InlineAsmTemplatePiece::Placeholder { operand_idx, modifier: _, span } => {
                     match operands[operand_idx] {
                         GlobalAsmOperandRef::Const { ref string } => {
                             // Const operands get injected directly into the
@@ -414,7 +414,7 @@ fn codegen_global_asm(
                                 llvm::LLVMRustGetMangledName(llval, s);
                             })
                             .expect("symbol is not valid UTF-8");
-                            template_str.push_str(&symbol);
+                            template_str.push_str(&escape_symbol_name(self, symbol, span));
                         }
                         GlobalAsmOperandRef::SymStatic { def_id } => {
                             let llval = self
@@ -428,7 +428,7 @@ fn codegen_global_asm(
                                 llvm::LLVMRustGetMangledName(llval, s);
                             })
                             .expect("symbol is not valid UTF-8");
-                            template_str.push_str(&symbol);
+                            template_str.push_str(&escape_symbol_name(self, symbol, span));
                         }
                     }
                 }
@@ -1390,3 +1390,42 @@ fn llvm_fixup_output_type<'ll, 'tcx>(
         _ => layout.llvm_type(cx),
     }
 }
+
+fn escape_symbol_name<'ll, 'tcx>(cx: &CodegenCx<'ll, 'tcx>, symbol: String, span: Span) -> String {
+    use rustc_target::spec::{Arch, BinaryFormat};
+    if !symbol.is_empty()
+        && symbol.chars().all(|c| matches!(c, '0'..='9' | 'A'..='Z' | 'a'..='z' | '_' | '$' | '.'))
+    {
+        return symbol;
+    }
+    if cx.tcx.sess.target.binary_format == BinaryFormat::Xcoff {
+        cx.tcx.sess.dcx().span_fatal(
+            span,
+            format!(
+                "symbol escaping is not supported for the binary format {}",
+                cx.tcx.sess.target.binary_format
+            ),
+        );
+    }
+    if cx.tcx.sess.target.arch == Arch::Nvptx64 {
+        cx.tcx.sess.dcx().span_fatal(
+            span,
+            format!(
+                "symbol escaping is not supported for the architecture {}",
+                cx.tcx.sess.target.arch
+            ),
+        );
+    }
+    let mut escaped_symbol = String::new();
+    escaped_symbol.push('\"');
+    for c in symbol.chars() {
+        match c {
+            '\n' => escaped_symbol.push_str("\\\n"),
+            '"' => escaped_symbol.push_str("\\\""),
+            '\\' => escaped_symbol.push_str("\\\\"),
+            c => escaped_symbol.push(c),
+        }
+    }
+    escaped_symbol.push('\"');
+    escaped_symbol
+}

compiler/rustc_hir/src/hir.rs

@@ -1,6 +1,7 @@
 // ignore-tidy-filelength
 use std::borrow::Cow;
 use std::fmt;
+use std::ops::Not;
 
 use rustc_abi::ExternAbi;
 use rustc_ast::attr::AttributeExt;
@@ -1012,10 +1013,14 @@ pub fn bounds_span_for_suggestions(
 
                 span_for_parentheses.map_or_else(
                     || {
-                        // We include bounds that come from a `#[derive(_)]` but point at the user's code,
-                        // as we use this method to get a span appropriate for suggestions.
+                        // We include bounds that come from a `#[derive(_)]` but point at the user's
+                        // code, as we use this method to get a span appropriate for suggestions.
                         let bs = bound.span();
-                        bs.can_be_used_for_suggestions().then(|| (bs.shrink_to_hi(), None))
+                        // We use `from_expansion` instead of `can_be_used_for_suggestions` because
+                        // the trait bound from imperfect derives do point at the type parameter,
+                        // but expanded to a where clause, so we want to ignore those. This is only
+                        // true for derive intrinsics.
+                        bs.from_expansion().not().then(|| (bs.shrink_to_hi(), None))
                     },
                     |span| Some((span.shrink_to_hi(), Some(span.shrink_to_lo()))),
                 )

compiler/rustc_hir_analysis/messages.ftl

@@ -142,6 +142,7 @@ hir_analysis_copy_impl_on_non_adt =
 hir_analysis_copy_impl_on_type_with_dtor =
     the trait `Copy` cannot be implemented for this type; the type has a destructor
     .label = `Copy` not allowed on types with destructors
+    .note = destructor declared here
 
 hir_analysis_cross_crate_traits = cross-crate traits with a default impl, like `{$traits}`, can only be implemented for a struct/enum type, not `{$self_ty}`
     .label = can't implement cross-crate trait with a default impl for non-struct/enum type

compiler/rustc_hir_analysis/src/coherence/builtin.rs

@@ -122,9 +122,10 @@ fn visit_implementation_of_copy(checker: &Checker<'_>) -> Result<(), ErrorGuaran
             let span = tcx.hir_expect_item(impl_did).expect_impl().self_ty.span;
             Err(tcx.dcx().emit_err(errors::CopyImplOnNonAdt { span }))
         }
-        Err(CopyImplementationError::HasDestructor) => {
+        Err(CopyImplementationError::HasDestructor(did)) => {
             let span = tcx.hir_expect_item(impl_did).expect_impl().self_ty.span;
-            Err(tcx.dcx().emit_err(errors::CopyImplOnTypeWithDtor { span }))
+            let impl_ = tcx.def_span(did);
+            Err(tcx.dcx().emit_err(errors::CopyImplOnTypeWithDtor { span, impl_ }))
         }
         Err(CopyImplementationError::HasUnsafeFields) => {
             let span = tcx.hir_expect_item(impl_did).expect_impl().self_ty.span;

compiler/rustc_hir_analysis/src/errors.rs

@@ -278,6 +278,8 @@ pub(crate) struct CopyImplOnTypeWithDtor {
     #[primary_span]
     #[label]
     pub span: Span,
+    #[note]
+    pub impl_: Span,
 }
 
 #[derive(Diagnostic)]

compiler/rustc_hir_analysis/src/hir_ty_lowering/dyn_trait.rs

@@ -592,7 +592,7 @@ fn prohibit_or_lint_bare_trait_object_ty(
             if span.can_be_used_for_suggestions()
                 && poly_trait_ref.trait_ref.trait_def_id().is_some()
                 && !self.maybe_suggest_impl_trait(span, hir_id, hir_bounds, &mut diag)
-                && !self.maybe_suggest_dyn_trait(hir_id, sugg, &mut diag)
+                && !self.maybe_suggest_dyn_trait(hir_id, span, sugg, &mut diag)
             {
                 self.maybe_suggest_add_generic_impl_trait(span, hir_id, &mut diag);
             }
@@ -750,10 +750,14 @@ fn maybe_suggest_blanket_trait_impl<G: EmissionGuarantee>(
     fn maybe_suggest_dyn_trait(
         &self,
         hir_id: hir::HirId,
+        span: Span,
         sugg: Vec<(Span, String)>,
         diag: &mut Diag<'_>,
     ) -> bool {
         let tcx = self.tcx();
+        if span.in_derive_expansion() {
+            return false;
+        }
 
         // Look at the direct HIR parent, since we care about the relationship between
         // the type and the thing that directly encloses it.

compiler/rustc_hir_typeck/src/fn_ctxt/suggestions.rs

@@ -1932,25 +1932,94 @@ pub(crate) fn note_type_is_not_clone(
                     None,
                 );
             } else {
+                let mut suggest_derive = true;
                 if let Some(errors) =
                     self.type_implements_trait_shallow(clone_trait_did, expected_ty, self.param_env)
                 {
+                    let manually_impl = "consider manually implementing `Clone` to avoid the \
+                        implicit type parameter bounds";
                     match &errors[..] {
                         [] => {}
                         [error] => {
-                            diag.help(format!(
-                                "`Clone` is not implemented because the trait bound `{}` is \
-                                 not satisfied",
-                                error.obligation.predicate,
-                            ));
+                            let msg = "`Clone` is not implemented because a trait bound is not \
+                                satisfied";
+                            if let traits::ObligationCauseCode::ImplDerived(data) =
+                                error.obligation.cause.code()
+                            {
+                                let mut span: MultiSpan = data.span.into();
+                                if self.tcx.is_automatically_derived(data.impl_or_alias_def_id) {
+                                    span.push_span_label(
+                                        data.span,
+                                        format!(
+                                            "derive introduces an implicit `{}` bound",
+                                            error.obligation.predicate
+                                        ),
+                                    );
+                                }
+                                diag.span_help(span, msg);
+                                if self.tcx.is_automatically_derived(data.impl_or_alias_def_id)
+                                    && data.impl_or_alias_def_id.is_local()
+                                {
+                                    diag.help(manually_impl);
+                                    suggest_derive = false;
+                                }
+                            } else {
+                                diag.help(msg);
+                            }
                         }
                         _ => {
-                            diag.help(format!(
-                                "`Clone` is not implemented because the following trait bounds \
-                                 could not be satisfied: {}",
-                                listify(&errors, |e| format!("`{}`", e.obligation.predicate))
-                                    .unwrap(),
-                            ));
+                            let unsatisfied_bounds: Vec<_> = errors
+                                .iter()
+                                .filter_map(|error| match error.obligation.cause.code() {
+                                    traits::ObligationCauseCode::ImplDerived(data) => {
+                                        let pre = if self
+                                            .tcx
+                                            .is_automatically_derived(data.impl_or_alias_def_id)
+                                        {
+                                            "derive introduces an implicit "
+                                        } else {
+                                            ""
+                                        };
+                                        Some((
+                                            data.span,
+                                            format!(
+                                                "{pre}unsatisfied trait bound `{}`",
+                                                error.obligation.predicate
+                                            ),
+                                        ))
+                                    }
+                                    _ => None,
+                                })
+                                .collect();
+                            let msg = "`Clone` is not implemented because the some trait bounds \
+                                could not be satisfied";
+                            if errors.len() == unsatisfied_bounds.len() {
+                                let mut unsatisfied_bounds_spans: MultiSpan = unsatisfied_bounds
+                                    .iter()
+                                    .map(|(span, _)| *span)
+                                    .collect::<Vec<Span>>()
+                                    .into();
+                                for (span, label) in unsatisfied_bounds {
+                                    unsatisfied_bounds_spans.push_span_label(span, label);
+                                }
+                                diag.span_help(unsatisfied_bounds_spans, msg);
+                                if errors.iter().all(|error| match error.obligation.cause.code() {
+                                    traits::ObligationCauseCode::ImplDerived(data) => {
+                                        self.tcx.is_automatically_derived(data.impl_or_alias_def_id)
+                                            && data.impl_or_alias_def_id.is_local()
+                                    }
+                                    _ => false,
+                                }) {
+                                    diag.help(manually_impl);
+                                    suggest_derive = false;
+                                }
+                            } else {
+                                diag.help(format!(
+                                    "{msg}: {}",
+                                    listify(&errors, |e| format!("`{}`", e.obligation.predicate))
+                                        .unwrap(),
+                                ));
+                            }
                         }
                     }
                     for error in errors {
@@ -1968,7 +2037,9 @@ pub(crate) fn note_type_is_not_clone(
                         }
                     }
                 }
-                self.suggest_derive(diag, &vec![(trait_ref.upcast(self.tcx), None, None)]);
+                if suggest_derive {
+                    self.suggest_derive(diag, &vec![(trait_ref.upcast(self.tcx), None, None)]);
+                }
             }
         }
     }

compiler/rustc_hir_typeck/src/method/suggest.rs

@@ -1748,19 +1748,34 @@ fn handle_unsatisfied_predicates(
         // Find all the requirements that come from a local `impl` block.
         let mut skip_list: UnordSet<_> = Default::default();
         let mut spanned_predicates = FxIndexMap::default();
+        let mut manually_impl = false;
         for (p, parent_p, cause) in unsatisfied_predicates {
             // Extract the predicate span and parent def id of the cause,
             // if we have one.
-            let (item_def_id, cause_span) = match cause.as_ref().map(|cause| cause.code()) {
-                Some(ObligationCauseCode::ImplDerived(data)) => {
-                    (data.impl_or_alias_def_id, data.span)
-                }
-                Some(
-                    ObligationCauseCode::WhereClauseInExpr(def_id, span, _, _)
-                    | ObligationCauseCode::WhereClause(def_id, span),
-                ) if !span.is_dummy() => (*def_id, *span),
-                _ => continue,
-            };
+            let (item_def_id, cause_span, cause_msg) =
+                match cause.as_ref().map(|cause| cause.code()) {
+                    Some(ObligationCauseCode::ImplDerived(data)) => {
+                        let msg = if let DefKind::Impl { of_trait: true } =
+                            self.tcx.def_kind(data.impl_or_alias_def_id)
+                        {
+                            format!(
+                                "type parameter would need to implement `{}`",
+                                self.tcx
+                                    .item_name(self.tcx.impl_trait_id(data.impl_or_alias_def_id))
+                            )
+                        } else {
+                            format!("unsatisfied bound `{p}` introduced here")
+                        };
+                        (data.impl_or_alias_def_id, data.span, msg)
+                    }
+                    Some(
+                        ObligationCauseCode::WhereClauseInExpr(def_id, span, _, _)
+                        | ObligationCauseCode::WhereClause(def_id, span),
+                    ) if !span.is_dummy() => {
+                        (*def_id, *span, format!("unsatisfied bound `{p}` introduced here"))
+                    }
+                    _ => continue,
+                };
 
             // Don't point out the span of `WellFormed` predicates.
             if !matches!(
@@ -1791,13 +1806,14 @@ fn handle_unsatisfied_predicates(
                     let entry = entry.or_insert_with(|| {
                         (FxIndexSet::default(), FxIndexSet::default(), Vec::new())
                     });
-                    entry.0.insert(span);
+                    entry.0.insert(cause_span);
                     entry.1.insert((
-                        span,
-                        "unsatisfied trait bound introduced in this `derive` macro",
+                        cause_span,
+                        cause_msg,
                     ));
                     entry.2.push(p);
                     skip_list.insert(p);
+                    manually_impl = true;
                 }
 
                 // Unmet obligation coming from an `impl`.
@@ -1842,7 +1858,7 @@ fn handle_unsatisfied_predicates(
                     entry.2.push(p);
                     if cause_span != *item_span {
                         entry.0.insert(cause_span);
-                        entry.1.insert((cause_span, "unsatisfied trait bound introduced here"));
+                        entry.1.insert((cause_span, "unsatisfied trait bound introduced here".to_string()));
                     } else {
                         if let Some(of_trait) = of_trait {
                             entry.0.insert(of_trait.trait_ref.path.span);
@@ -1850,9 +1866,9 @@ fn handle_unsatisfied_predicates(
                         entry.0.insert(self_ty.span);
                     };
                     if let Some(of_trait) = of_trait {
-                        entry.1.insert((of_trait.trait_ref.path.span, ""));
+                        entry.1.insert((of_trait.trait_ref.path.span, String::new()));
                     }
-                    entry.1.insert((self_ty.span, ""));
+                    entry.1.insert((self_ty.span, String::new()));
                 }
                 Some(Node::Item(hir::Item {
                     kind: hir::ItemKind::Trait(_, rustc_ast::ast::IsAuto::Yes, ..),
@@ -1881,8 +1897,8 @@ fn handle_unsatisfied_predicates(
                         (FxIndexSet::default(), FxIndexSet::default(), Vec::new())
                     });
                     entry.0.insert(cause_span);
-                    entry.1.insert((ident.span, ""));
-                    entry.1.insert((cause_span, "unsatisfied trait bound introduced here"));
+                    entry.1.insert((ident.span, String::new()));
+                    entry.1.insert((cause_span, "unsatisfied trait bound introduced here".to_string()));
                     entry.2.push(p);
                 }
                 _ => {
@@ -2083,6 +2099,9 @@ fn handle_unsatisfied_predicates(
             *suggested_derive = self.suggest_derive(err, unsatisfied_predicates);
             *unsatisfied_bounds = true;
         }
+        if manually_impl {
+            err.help("consider manually implementing the trait to avoid undesired bounds");
+        }
     }
 
     /// If an appropriate error source is not found, check method chain for possible candidates

compiler/rustc_middle/src/ty/diagnostics.rs

@@ -526,12 +526,15 @@ pub fn suggest_constraining_type_params<'a>(
         //
         //   fn foo<T>(t: T) { ... }
         //          - help: consider restricting this type parameter with `T: Foo`
-        suggestions.push((
-            param.span.shrink_to_hi(),
-            post,
-            format!(": {constraint}"),
-            SuggestChangingConstraintsMessage::RestrictType { ty: param_name },
-        ));
+        let span = param.span.shrink_to_hi();
+        if span.can_be_used_for_suggestions() {
+            suggestions.push((
+                span,
+                post,
+                format!(": {constraint}"),
+                SuggestChangingConstraintsMessage::RestrictType { ty: param_name },
+            ));
+        }
     }
 
     // FIXME: remove the suggestions that are from derive, as the span is not correct

compiler/rustc_trait_selection/src/error_reporting/traits/suggestions.rs

@@ -3583,11 +3583,14 @@ pub(super) fn note_obligation_cause_code<G: EmissionGuarantee, T>(
                         ..
                     })) => {
                         let mut spans = Vec::with_capacity(2);
-                        if let Some(of_trait) = of_trait {
+                        if let Some(of_trait) = of_trait
+                            && !of_trait.trait_ref.path.span.in_derive_expansion()
+                        {
                             spans.push(of_trait.trait_ref.path.span);
                         }
                         spans.push(self_ty.span);
                         let mut spans: MultiSpan = spans.into();
+                        let mut derived = false;
                         if matches!(
                             self_ty.span.ctxt().outer_expn_data().kind,
                             ExpnKind::Macro(MacroKind::Derive, _)
@@ -3595,9 +3598,14 @@ pub(super) fn note_obligation_cause_code<G: EmissionGuarantee, T>(
                             of_trait.map(|t| t.trait_ref.path.span.ctxt().outer_expn_data().kind),
                             Some(ExpnKind::Macro(MacroKind::Derive, _))
                         ) {
+                            derived = true;
                             spans.push_span_label(
                                 data.span,
-                                "unsatisfied trait bound introduced in this `derive` macro",
+                                if data.span.in_derive_expansion() {
+                                    format!("type parameter would need to implement `{trait_name}`")
+                                } else {
+                                    format!("unsatisfied trait bound")
+                                },
                             );
                         } else if !data.span.is_dummy() && !data.span.overlaps(self_ty.span) {
                             // `Sized` may be an explicit or implicit trait bound. If it is
@@ -3623,6 +3631,12 @@ pub(super) fn note_obligation_cause_code<G: EmissionGuarantee, T>(
                             }
                         }
                         err.span_note(spans, msg);
+                        if derived && trait_name != "Copy" {
+                            err.help(format!(
+                                "consider manually implementing `{trait_name}` to avoid undesired \
+                                 bounds",
+                            ));
+                        }
                         point_at_assoc_type_restriction(
                             tcx,
                             err,

compiler/rustc_trait_selection/src/traits/misc.rs

@@ -13,7 +13,7 @@
 pub enum CopyImplementationError<'tcx> {
     InfringingFields(Vec<(&'tcx ty::FieldDef, Ty<'tcx>, InfringingFieldsReason<'tcx>)>),
     NotAnAdt,
-    HasDestructor,
+    HasDestructor(hir::def_id::DefId),
     HasUnsafeFields,
 }
 
@@ -76,8 +76,8 @@ pub fn type_allowed_to_implement_copy<'tcx>(
     )
     .map_err(CopyImplementationError::InfringingFields)?;
 
-    if adt.has_dtor(tcx) {
-        return Err(CopyImplementationError::HasDestructor);
+    if let Some(did) = adt.destructor(tcx).map(|dtor| dtor.did) {
+        return Err(CopyImplementationError::HasDestructor(did));
     }
 
     if impl_safety.is_safe() && self_type.has_unsafe_fields() {

library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs

@@ -4092,7 +4092,7 @@ pub fn vcmlaq_rot90_laneq_f32<const LANE: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_lane_f32)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_lane_f32<const LANE1: i32, const LANE2: i32>(
@@ -4113,7 +4113,7 @@ pub fn vcopy_lane_f32<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_lane_s8)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_lane_s8<const LANE1: i32, const LANE2: i32>(a: int8x8_t, b: int8x8_t) -> int8x8_t {
@@ -4137,7 +4137,7 @@ pub fn vcopy_lane_s8<const LANE1: i32, const LANE2: i32>(a: int8x8_t, b: int8x8_
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_lane_s16)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_lane_s16<const LANE1: i32, const LANE2: i32>(a: int16x4_t, b: int16x4_t) -> int16x4_t {
@@ -4157,7 +4157,7 @@ pub fn vcopy_lane_s16<const LANE1: i32, const LANE2: i32>(a: int16x4_t, b: int16
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_lane_s32)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_lane_s32<const LANE1: i32, const LANE2: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t {
@@ -4175,7 +4175,7 @@ pub fn vcopy_lane_s32<const LANE1: i32, const LANE2: i32>(a: int32x2_t, b: int32
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_lane_u8)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_lane_u8<const LANE1: i32, const LANE2: i32>(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
@@ -4199,7 +4199,7 @@ pub fn vcopy_lane_u8<const LANE1: i32, const LANE2: i32>(a: uint8x8_t, b: uint8x
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_lane_u16)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_lane_u16<const LANE1: i32, const LANE2: i32>(
@@ -4222,7 +4222,7 @@ pub fn vcopy_lane_u16<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_lane_u32)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_lane_u32<const LANE1: i32, const LANE2: i32>(
@@ -4243,7 +4243,7 @@ pub fn vcopy_lane_u32<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_lane_p8)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_lane_p8<const LANE1: i32, const LANE2: i32>(a: poly8x8_t, b: poly8x8_t) -> poly8x8_t {
@@ -4267,7 +4267,7 @@ pub fn vcopy_lane_p8<const LANE1: i32, const LANE2: i32>(a: poly8x8_t, b: poly8x
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_lane_p16)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_lane_p16<const LANE1: i32, const LANE2: i32>(
@@ -4290,7 +4290,7 @@ pub fn vcopy_lane_p16<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_laneq_f32)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_laneq_f32<const LANE1: i32, const LANE2: i32>(
@@ -4312,7 +4312,7 @@ pub fn vcopy_laneq_f32<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_laneq_s8)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_laneq_s8<const LANE1: i32, const LANE2: i32>(a: int8x8_t, b: int8x16_t) -> int8x8_t {
@@ -4338,7 +4338,7 @@ pub fn vcopy_laneq_s8<const LANE1: i32, const LANE2: i32>(a: int8x8_t, b: int8x1
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_laneq_s16)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_laneq_s16<const LANE1: i32, const LANE2: i32>(
@@ -4362,7 +4362,7 @@ pub fn vcopy_laneq_s16<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_laneq_s32)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_laneq_s32<const LANE1: i32, const LANE2: i32>(
@@ -4384,7 +4384,7 @@ pub fn vcopy_laneq_s32<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_laneq_u8)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_laneq_u8<const LANE1: i32, const LANE2: i32>(
@@ -4413,7 +4413,7 @@ pub fn vcopy_laneq_u8<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_laneq_u16)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_laneq_u16<const LANE1: i32, const LANE2: i32>(
@@ -4437,7 +4437,7 @@ pub fn vcopy_laneq_u16<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_laneq_u32)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_laneq_u32<const LANE1: i32, const LANE2: i32>(
@@ -4459,7 +4459,7 @@ pub fn vcopy_laneq_u32<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_laneq_p8)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_laneq_p8<const LANE1: i32, const LANE2: i32>(
@@ -4488,7 +4488,7 @@ pub fn vcopy_laneq_p8<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopy_laneq_p16)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopy_laneq_p16<const LANE1: i32, const LANE2: i32>(
@@ -4624,7 +4624,7 @@ pub fn vcopyq_lane_p64<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_lane_s8)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_lane_s8<const LANE1: i32, const LANE2: i32>(a: int8x16_t, b: int8x8_t) -> int8x16_t {
@@ -4994,7 +4994,7 @@ pub fn vcopyq_lane_s8<const LANE1: i32, const LANE2: i32>(a: int8x16_t, b: int8x
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_lane_s16)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_lane_s16<const LANE1: i32, const LANE2: i32>(
@@ -5022,7 +5022,7 @@ pub fn vcopyq_lane_s16<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_lane_s32)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_lane_s32<const LANE1: i32, const LANE2: i32>(
@@ -5046,7 +5046,7 @@ pub fn vcopyq_lane_s32<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_lane_u8)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_lane_u8<const LANE1: i32, const LANE2: i32>(
@@ -5419,7 +5419,7 @@ pub fn vcopyq_lane_u8<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_lane_u16)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_lane_u16<const LANE1: i32, const LANE2: i32>(
@@ -5447,7 +5447,7 @@ pub fn vcopyq_lane_u16<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_lane_u32)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_lane_u32<const LANE1: i32, const LANE2: i32>(
@@ -5471,7 +5471,7 @@ pub fn vcopyq_lane_u32<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_lane_p8)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_lane_p8<const LANE1: i32, const LANE2: i32>(
@@ -5844,7 +5844,7 @@ pub fn vcopyq_lane_p8<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_lane_p16)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_lane_p16<const LANE1: i32, const LANE2: i32>(
@@ -5872,7 +5872,7 @@ pub fn vcopyq_lane_p16<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_f32)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_f32<const LANE1: i32, const LANE2: i32>(
@@ -5895,7 +5895,7 @@ pub fn vcopyq_laneq_f32<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_f64)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_f64<const LANE1: i32, const LANE2: i32>(
@@ -5916,7 +5916,7 @@ pub fn vcopyq_laneq_f64<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_s8)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_s8<const LANE1: i32, const LANE2: i32>(
@@ -6287,7 +6287,7 @@ pub fn vcopyq_laneq_s8<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_s16)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_s16<const LANE1: i32, const LANE2: i32>(
@@ -6314,7 +6314,7 @@ pub fn vcopyq_laneq_s16<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_s32)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_s32<const LANE1: i32, const LANE2: i32>(
@@ -6337,7 +6337,7 @@ pub fn vcopyq_laneq_s32<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_s64)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_s64<const LANE1: i32, const LANE2: i32>(
@@ -6358,7 +6358,7 @@ pub fn vcopyq_laneq_s64<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_u8)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_u8<const LANE1: i32, const LANE2: i32>(
@@ -6729,7 +6729,7 @@ pub fn vcopyq_laneq_u8<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_u16)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_u16<const LANE1: i32, const LANE2: i32>(
@@ -6756,7 +6756,7 @@ pub fn vcopyq_laneq_u16<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_u32)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_u32<const LANE1: i32, const LANE2: i32>(
@@ -6779,7 +6779,7 @@ pub fn vcopyq_laneq_u32<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_u64)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_u64<const LANE1: i32, const LANE2: i32>(
@@ -6800,7 +6800,7 @@ pub fn vcopyq_laneq_u64<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_p8)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_p8<const LANE1: i32, const LANE2: i32>(
@@ -7171,7 +7171,7 @@ pub fn vcopyq_laneq_p8<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_p16)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_p16<const LANE1: i32, const LANE2: i32>(
@@ -7198,7 +7198,7 @@ pub fn vcopyq_laneq_p16<const LANE1: i32, const LANE2: i32>(
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcopyq_laneq_p64)"]
 #[inline(always)]
 #[target_feature(enable = "neon")]
-#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 1))]
+#[cfg_attr(test, assert_instr(mov, LANE1 = 0, LANE2 = 0))]
 #[rustc_legacy_const_generics(1, 3)]
 #[stable(feature = "neon_intrinsics", since = "1.59.0")]
 pub fn vcopyq_laneq_p64<const LANE1: i32, const LANE2: i32>(

library/stdarch/crates/core_arch/src/aarch64/neon/mod.rs

@@ -569,47 +569,46 @@ mod tests {
     use crate::core_arch::aarch64::test_support::*;
     use crate::core_arch::arm_shared::test_support::*;
     use crate::core_arch::{aarch64::neon::*, aarch64::*, simd::*};
-    use std::mem::transmute;
     use stdarch_test::simd_test;
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vadd_f64() {
-        let a = 1.;
-        let b = 8.;
-        let e = 9.;
-        let r: f64 = transmute(vadd_f64(transmute(a), transmute(b)));
+    fn test_vadd_f64() {
+        let a = f64x1::from_array([1.]);
+        let b = f64x1::from_array([8.]);
+        let e = f64x1::from_array([9.]);
+        let r = f64x1::from(vadd_f64(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vaddq_f64() {
+    fn test_vaddq_f64() {
         let a = f64x2::new(1., 2.);
         let b = f64x2::new(8., 7.);
         let e = f64x2::new(9., 9.);
-        let r: f64x2 = transmute(vaddq_f64(transmute(a), transmute(b)));
+        let r = f64x2::from(vaddq_f64(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vadd_s64() {
-        let a = 1_i64;
-        let b = 8_i64;
-        let e = 9_i64;
-        let r: i64 = transmute(vadd_s64(transmute(a), transmute(b)));
+    fn test_vadd_s64() {
+        let a = i64x1::from_array([1]);
+        let b = i64x1::from_array([8]);
+        let e = i64x1::from_array([9]);
+        let r = i64x1::from(vadd_s64(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vadd_u64() {
-        let a = 1_u64;
-        let b = 8_u64;
-        let e = 9_u64;
-        let r: u64 = transmute(vadd_u64(transmute(a), transmute(b)));
+    fn test_vadd_u64() {
+        let a = u64x1::from_array([1]);
+        let b = u64x1::from_array([8]);
+        let e = u64x1::from_array([9]);
+        let r = u64x1::from(vadd_u64(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vaddd_s64() {
+    fn test_vaddd_s64() {
         let a = 1_i64;
         let b = 8_i64;
         let e = 9_i64;
@@ -618,7 +617,7 @@ unsafe fn test_vaddd_s64() {
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vaddd_u64() {
+    fn test_vaddd_u64() {
         let a = 1_u64;
         let b = 8_u64;
         let e = 9_u64;
@@ -627,25 +626,25 @@ unsafe fn test_vaddd_u64() {
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vext_p64() {
-        let a: i64x1 = i64x1::new(0);
-        let b: i64x1 = i64x1::new(1);
-        let e: i64x1 = i64x1::new(0);
-        let r: i64x1 = transmute(vext_p64::<0>(transmute(a), transmute(b)));
+    fn test_vext_p64() {
+        let a = u64x1::new(0);
+        let b = u64x1::new(1);
+        let e = u64x1::new(0);
+        let r = u64x1::from(vext_p64::<0>(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vext_f64() {
-        let a: f64x1 = f64x1::new(0.);
-        let b: f64x1 = f64x1::new(1.);
-        let e: f64x1 = f64x1::new(0.);
-        let r: f64x1 = transmute(vext_f64::<0>(transmute(a), transmute(b)));
+    fn test_vext_f64() {
+        let a = f64x1::new(0.);
+        let b = f64x1::new(1.);
+        let e = f64x1::new(0.);
+        let r = f64x1::from(vext_f64::<0>(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vshld_n_s64() {
+    fn test_vshld_n_s64() {
         let a: i64 = 1;
         let e: i64 = 4;
         let r: i64 = vshld_n_s64::<2>(a);
@@ -653,7 +652,7 @@ unsafe fn test_vshld_n_s64() {
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vshld_n_u64() {
+    fn test_vshld_n_u64() {
         let a: u64 = 1;
         let e: u64 = 4;
         let r: u64 = vshld_n_u64::<2>(a);
@@ -661,7 +660,7 @@ unsafe fn test_vshld_n_u64() {
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vshrd_n_s64() {
+    fn test_vshrd_n_s64() {
         let a: i64 = 4;
         let e: i64 = 1;
         let r: i64 = vshrd_n_s64::<2>(a);
@@ -669,7 +668,7 @@ unsafe fn test_vshrd_n_s64() {
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vshrd_n_u64() {
+    fn test_vshrd_n_u64() {
         let a: u64 = 4;
         let e: u64 = 1;
         let r: u64 = vshrd_n_u64::<2>(a);
@@ -677,7 +676,7 @@ unsafe fn test_vshrd_n_u64() {
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vsrad_n_s64() {
+    fn test_vsrad_n_s64() {
         let a: i64 = 1;
         let b: i64 = 4;
         let e: i64 = 2;
@@ -686,7 +685,7 @@ unsafe fn test_vsrad_n_s64() {
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vsrad_n_u64() {
+    fn test_vsrad_n_u64() {
         let a: u64 = 1;
         let b: u64 = 4;
         let e: u64 = 2;
@@ -695,298 +694,461 @@ unsafe fn test_vsrad_n_u64() {
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vdup_n_f64() {
+    fn test_vdup_n_f64() {
         let a: f64 = 3.3;
         let e = f64x1::new(3.3);
-        let r: f64x1 = transmute(vdup_n_f64(a));
+        let r = f64x1::from(vdup_n_f64(a));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vdup_n_p64() {
+    fn test_vdup_n_p64() {
         let a: u64 = 3;
         let e = u64x1::new(3);
-        let r: u64x1 = transmute(vdup_n_p64(a));
+        let r = u64x1::from(vdup_n_p64(a));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vdupq_n_f64() {
+    fn test_vdupq_n_f64() {
         let a: f64 = 3.3;
         let e = f64x2::new(3.3, 3.3);
-        let r: f64x2 = transmute(vdupq_n_f64(a));
+        let r = f64x2::from(vdupq_n_f64(a));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vdupq_n_p64() {
+    fn test_vdupq_n_p64() {
         let a: u64 = 3;
         let e = u64x2::new(3, 3);
-        let r: u64x2 = transmute(vdupq_n_p64(a));
+        let r = u64x2::from(vdupq_n_p64(a));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vmov_n_p64() {
+    fn test_vmov_n_p64() {
         let a: u64 = 3;
         let e = u64x1::new(3);
-        let r: u64x1 = transmute(vmov_n_p64(a));
+        let r = u64x1::from(vmov_n_p64(a));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vmov_n_f64() {
+    fn test_vmov_n_f64() {
         let a: f64 = 3.3;
         let e = f64x1::new(3.3);
-        let r: f64x1 = transmute(vmov_n_f64(a));
+        let r = f64x1::from(vmov_n_f64(a));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vmovq_n_p64() {
+    fn test_vmovq_n_p64() {
         let a: u64 = 3;
         let e = u64x2::new(3, 3);
-        let r: u64x2 = transmute(vmovq_n_p64(a));
+        let r = u64x2::from(vmovq_n_p64(a));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vmovq_n_f64() {
+    fn test_vmovq_n_f64() {
         let a: f64 = 3.3;
         let e = f64x2::new(3.3, 3.3);
-        let r: f64x2 = transmute(vmovq_n_f64(a));
+        let r = f64x2::from(vmovq_n_f64(a));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vget_high_f64() {
+    fn test_vget_high_f64() {
         let a = f64x2::new(1.0, 2.0);
         let e = f64x1::new(2.0);
-        let r: f64x1 = transmute(vget_high_f64(transmute(a)));
+        let r = f64x1::from(vget_high_f64(a.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vget_high_p64() {
+    fn test_vget_high_p64() {
         let a = u64x2::new(1, 2);
         let e = u64x1::new(2);
-        let r: u64x1 = transmute(vget_high_p64(transmute(a)));
+        let r = u64x1::from(vget_high_p64(a.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vget_low_f64() {
+    fn test_vget_low_f64() {
         let a = f64x2::new(1.0, 2.0);
         let e = f64x1::new(1.0);
-        let r: f64x1 = transmute(vget_low_f64(transmute(a)));
+        let r = f64x1::from(vget_low_f64(a.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vget_low_p64() {
+    fn test_vget_low_p64() {
         let a = u64x2::new(1, 2);
         let e = u64x1::new(1);
-        let r: u64x1 = transmute(vget_low_p64(transmute(a)));
+        let r = u64x1::from(vget_low_p64(a.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vget_lane_f64() {
+    fn test_vget_lane_f64() {
         let v = f64x1::new(1.0);
-        let r = vget_lane_f64::<0>(transmute(v));
+        let r = vget_lane_f64::<0>(v.into());
         assert_eq!(r, 1.0);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vgetq_lane_f64() {
+    fn test_vgetq_lane_f64() {
         let v = f64x2::new(0.0, 1.0);
-        let r = vgetq_lane_f64::<1>(transmute(v));
+        let r = vgetq_lane_f64::<1>(v.into());
         assert_eq!(r, 1.0);
-        let r = vgetq_lane_f64::<0>(transmute(v));
+        let r = vgetq_lane_f64::<0>(v.into());
         assert_eq!(r, 0.0);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vcopy_lane_s64() {
-        let a: i64x1 = i64x1::new(1);
-        let b: i64x1 = i64x1::new(0x7F_FF_FF_FF_FF_FF_FF_FF);
-        let e: i64x1 = i64x1::new(0x7F_FF_FF_FF_FF_FF_FF_FF);
-        let r: i64x1 = transmute(vcopy_lane_s64::<0, 0>(transmute(a), transmute(b)));
+    fn test_vcopy_lane_s64() {
+        let a = i64x1::new(1);
+        let b = i64x1::new(0x7F_FF_FF_FF_FF_FF_FF_FF);
+        let e = i64x1::new(0x7F_FF_FF_FF_FF_FF_FF_FF);
+        let r = i64x1::from(vcopy_lane_s64::<0, 0>(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vcopy_lane_u64() {
-        let a: u64x1 = u64x1::new(1);
-        let b: u64x1 = u64x1::new(0xFF_FF_FF_FF_FF_FF_FF_FF);
-        let e: u64x1 = u64x1::new(0xFF_FF_FF_FF_FF_FF_FF_FF);
-        let r: u64x1 = transmute(vcopy_lane_u64::<0, 0>(transmute(a), transmute(b)));
+    fn test_vcopy_lane_u64() {
+        let a = u64x1::new(1);
+        let b = u64x1::new(0xFF_FF_FF_FF_FF_FF_FF_FF);
+        let e = u64x1::new(0xFF_FF_FF_FF_FF_FF_FF_FF);
+        let r = u64x1::from(vcopy_lane_u64::<0, 0>(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vcopy_lane_p64() {
-        let a: i64x1 = i64x1::new(1);
-        let b: i64x1 = i64x1::new(0x7F_FF_FF_FF_FF_FF_FF_FF);
-        let e: i64x1 = i64x1::new(0x7F_FF_FF_FF_FF_FF_FF_FF);
-        let r: i64x1 = transmute(vcopy_lane_p64::<0, 0>(transmute(a), transmute(b)));
+    fn test_vcopy_lane_p64() {
+        let a = u64x1::new(1);
+        let b = u64x1::new(0x7F_FF_FF_FF_FF_FF_FF_FF);
+        let e = u64x1::new(0x7F_FF_FF_FF_FF_FF_FF_FF);
+        let r = u64x1::from(vcopy_lane_p64::<0, 0>(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vcopy_lane_f64() {
-        let a: f64 = 1.;
-        let b: f64 = 0.;
-        let e: f64 = 0.;
-        let r: f64 = transmute(vcopy_lane_f64::<0, 0>(transmute(a), transmute(b)));
+    fn test_vcopy_lane_f64() {
+        let a = f64x1::from_array([1.]);
+        let b = f64x1::from_array([0.]);
+        let e = f64x1::from_array([0.]);
+        let r = f64x1::from(vcopy_lane_f64::<0, 0>(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vcopy_laneq_s64() {
-        let a: i64x1 = i64x1::new(1);
-        let b: i64x2 = i64x2::new(0, 0x7F_FF_FF_FF_FF_FF_FF_FF);
-        let e: i64x1 = i64x1::new(0x7F_FF_FF_FF_FF_FF_FF_FF);
-        let r: i64x1 = transmute(vcopy_laneq_s64::<0, 1>(transmute(a), transmute(b)));
+    fn test_vcopy_laneq_s64() {
+        let a = i64x1::new(1);
+        let b = i64x2::new(0, 0x7F_FF_FF_FF_FF_FF_FF_FF);
+        let e = i64x1::new(0x7F_FF_FF_FF_FF_FF_FF_FF);
+        let r = i64x1::from(vcopy_laneq_s64::<0, 1>(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vcopy_laneq_u64() {
-        let a: u64x1 = u64x1::new(1);
-        let b: u64x2 = u64x2::new(0, 0xFF_FF_FF_FF_FF_FF_FF_FF);
-        let e: u64x1 = u64x1::new(0xFF_FF_FF_FF_FF_FF_FF_FF);
-        let r: u64x1 = transmute(vcopy_laneq_u64::<0, 1>(transmute(a), transmute(b)));
+    fn test_vcopy_laneq_u64() {
+        let a = u64x1::new(1);
+        let b = u64x2::new(0, 0xFF_FF_FF_FF_FF_FF_FF_FF);
+        let e = u64x1::new(0xFF_FF_FF_FF_FF_FF_FF_FF);
+        let r = u64x1::from(vcopy_laneq_u64::<0, 1>(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vcopy_laneq_p64() {
-        let a: i64x1 = i64x1::new(1);
-        let b: i64x2 = i64x2::new(0, 0x7F_FF_FF_FF_FF_FF_FF_FF);
-        let e: i64x1 = i64x1::new(0x7F_FF_FF_FF_FF_FF_FF_FF);
-        let r: i64x1 = transmute(vcopy_laneq_p64::<0, 1>(transmute(a), transmute(b)));
+    fn test_vcopy_laneq_p64() {
+        let a = u64x1::new(1);
+        let b = u64x2::new(0, 0x7F_FF_FF_FF_FF_FF_FF_FF);
+        let e = u64x1::new(0x7F_FF_FF_FF_FF_FF_FF_FF);
+        let r = u64x1::from(vcopy_laneq_p64::<0, 1>(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vcopy_laneq_f64() {
-        let a: f64 = 1.;
-        let b: f64x2 = f64x2::new(0., 0.5);
-        let e: f64 = 0.5;
-        let r: f64 = transmute(vcopy_laneq_f64::<0, 1>(transmute(a), transmute(b)));
+    fn test_vcopy_laneq_f64() {
+        let a = f64x1::from_array([1.]);
+        let b = f64x2::from_array([0., 0.5]);
+        let e = f64x1::from_array([0.5]);
+        let r = f64x1::from(vcopy_laneq_f64::<0, 1>(a.into(), b.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vbsl_f64() {
+    fn test_vbsl_f64() {
         let a = u64x1::new(0x8000000000000000);
         let b = f64x1::new(-1.23f64);
         let c = f64x1::new(2.34f64);
         let e = f64x1::new(-2.34f64);
-        let r: f64x1 = transmute(vbsl_f64(transmute(a), transmute(b), transmute(c)));
+        let r = f64x1::from(vbsl_f64(a.into(), b.into(), c.into()));
         assert_eq!(r, e);
     }
+
     #[simd_test(enable = "neon")]
-    unsafe fn test_vbsl_p64() {
+    fn test_vbsl_p64() {
         let a = u64x1::new(1);
         let b = u64x1::new(u64::MAX);
         let c = u64x1::new(u64::MIN);
         let e = u64x1::new(1);
-        let r: u64x1 = transmute(vbsl_p64(transmute(a), transmute(b), transmute(c)));
+        let r = u64x1::from(vbsl_p64(a.into(), b.into(), c.into()));
         assert_eq!(r, e);
     }
+
     #[simd_test(enable = "neon")]
-    unsafe fn test_vbslq_f64() {
+    fn test_vbslq_f64() {
         let a = u64x2::new(1, 0x8000000000000000);
         let b = f64x2::new(f64::MAX, -1.23f64);
         let c = f64x2::new(f64::MIN, 2.34f64);
         let e = f64x2::new(f64::MIN, -2.34f64);
-        let r: f64x2 = transmute(vbslq_f64(transmute(a), transmute(b), transmute(c)));
+        let r = f64x2::from(vbslq_f64(a.into(), b.into(), c.into()));
         assert_eq!(r, e);
     }
+
     #[simd_test(enable = "neon")]
-    unsafe fn test_vbslq_p64() {
+    fn test_vbslq_p64() {
         let a = u64x2::new(u64::MAX, 1);
         let b = u64x2::new(u64::MAX, u64::MAX);
         let c = u64x2::new(u64::MIN, u64::MIN);
         let e = u64x2::new(u64::MAX, 1);
-        let r: u64x2 = transmute(vbslq_p64(transmute(a), transmute(b), transmute(c)));
+        let r = u64x2::from(vbslq_p64(a.into(), b.into(), c.into()));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vld1_f64() {
+    fn test_vld1_f64() {
         let a: [f64; 2] = [0., 1.];
         let e = f64x1::new(1.);
-        let r: f64x1 = transmute(vld1_f64(a[1..].as_ptr()));
+        let r = unsafe { f64x1::from(vld1_f64(a[1..].as_ptr())) };
         assert_eq!(r, e)
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vld1q_f64() {
+    fn test_vld1q_f64() {
         let a: [f64; 3] = [0., 1., 2.];
         let e = f64x2::new(1., 2.);
-        let r: f64x2 = transmute(vld1q_f64(a[1..].as_ptr()));
+        let r = unsafe { f64x2::from(vld1q_f64(a[1..].as_ptr())) };
         assert_eq!(r, e)
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vld1_dup_f64() {
+    fn test_vld1_dup_f64() {
         let a: [f64; 2] = [1., 42.];
         let e = f64x1::new(42.);
-        let r: f64x1 = transmute(vld1_dup_f64(a[1..].as_ptr()));
+        let r = unsafe { f64x1::from(vld1_dup_f64(a[1..].as_ptr())) };
         assert_eq!(r, e)
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vld1q_dup_f64() {
+    fn test_vld1q_dup_f64() {
         let elem: f64 = 42.;
         let e = f64x2::new(42., 42.);
-        let r: f64x2 = transmute(vld1q_dup_f64(&elem));
+        let r = unsafe { f64x2::from(vld1q_dup_f64(&elem)) };
         assert_eq!(r, e)
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vld1_lane_f64() {
+    fn test_vld1_lane_f64() {
         let a = f64x1::new(0.);
         let elem: f64 = 42.;
         let e = f64x1::new(42.);
-        let r: f64x1 = transmute(vld1_lane_f64::<0>(&elem, transmute(a)));
+        let r = unsafe { f64x1::from(vld1_lane_f64::<0>(&elem, a.into())) };
         assert_eq!(r, e)
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vld1q_lane_f64() {
+    fn test_vld1q_lane_f64() {
         let a = f64x2::new(0., 1.);
         let elem: f64 = 42.;
         let e = f64x2::new(0., 42.);
-        let r: f64x2 = transmute(vld1q_lane_f64::<1>(&elem, transmute(a)));
+        let r = unsafe { f64x2::from(vld1q_lane_f64::<1>(&elem, a.into())) };
         assert_eq!(r, e)
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vst1_f64() {
+    fn test_vst1_f64() {
         let mut vals = [0_f64; 2];
         let a = f64x1::new(1.);
 
-        vst1_f64(vals[1..].as_mut_ptr(), transmute(a));
+        unsafe {
+            vst1_f64(vals[1..].as_mut_ptr(), a.into());
+        }
 
         assert_eq!(vals[0], 0.);
         assert_eq!(vals[1], 1.);
     }
 
     #[simd_test(enable = "neon")]
-    unsafe fn test_vst1q_f64() {
+    fn test_vst1q_f64() {
         let mut vals = [0_f64; 3];
         let a = f64x2::new(1., 2.);
 
-        vst1q_f64(vals[1..].as_mut_ptr(), transmute(a));
+        unsafe {
+            vst1q_f64(vals[1..].as_mut_ptr(), a.into());
+        }
 
         assert_eq!(vals[0], 0.);
         assert_eq!(vals[1], 1.);
         assert_eq!(vals[2], 2.);
     }
+
+    macro_rules! wide_store_load_roundtrip {
+        ($elem_ty:ty, $len:expr, $vec_ty:ty, $store:expr, $load:expr) => {
+            let vals: [$elem_ty; $len] = crate::array::from_fn(|i| i as $elem_ty);
+            let a: $vec_ty = transmute(vals);
+            let mut tmp = [0 as $elem_ty; $len];
+            $store(tmp.as_mut_ptr().cast(), a);
+            let r: $vec_ty = $load(tmp.as_ptr().cast());
+            let out: [$elem_ty; $len] = transmute(r);
+            assert_eq!(out, vals);
+        };
+    }
+
+    macro_rules! wide_store_load_roundtrip_fp16 {
+        ($( $name:ident $args:tt);* $(;)?) => {
+            $(
+                #[simd_test(enable = "neon,fp16")]
+                #[cfg(not(target_arch = "arm64ec"))]
+                unsafe fn $name() {
+                    wide_store_load_roundtrip! $args;
+                }
+            )*
+        };
+    }
+
+    wide_store_load_roundtrip_fp16! {
+        test_vld1_f16_x2(f16, 8, float16x4x2_t, vst1_f16_x2, vld1_f16_x2);
+        test_vld1_f16_x3(f16, 12, float16x4x3_t, vst1_f16_x3, vld1_f16_x3);
+        test_vld1_f16_x4(f16, 16, float16x4x4_t, vst1_f16_x4, vld1_f16_x4);
+
+        test_vld1q_f16_x2(f16, 16, float16x8x2_t, vst1q_f16_x2, vld1q_f16_x2);
+        test_vld1q_f16_x3(f16, 24, float16x8x3_t, vst1q_f16_x3, vld1q_f16_x3);
+        test_vld1q_f16_x4(f16, 32, float16x8x4_t, vst1q_f16_x4, vld1q_f16_x4);
+    }
+
+    macro_rules! wide_store_load_roundtrip_aes {
+        ($( $name:ident $args:tt);* $(;)?) => {
+            $(
+                #[simd_test(enable = "neon,aes")]
+                unsafe fn $name() {
+                    wide_store_load_roundtrip! $args;
+                }
+            )*
+        };
+    }
+
+    wide_store_load_roundtrip_aes! {
+        test_vld1_p64_x2(p64, 2, poly64x1x2_t, vst1_p64_x2, vld1_p64_x2);
+        test_vld1_p64_x3(p64, 3, poly64x1x3_t, vst1_p64_x3, vld1_p64_x3);
+        test_vld1_p64_x4(p64, 4, poly64x1x4_t, vst1_p64_x4, vld1_p64_x4);
+
+        test_vld1q_p64_x2(p64, 4, poly64x2x2_t, vst1q_p64_x2, vld1q_p64_x2);
+        test_vld1q_p64_x3(p64, 6, poly64x2x3_t, vst1q_p64_x3, vld1q_p64_x3);
+        test_vld1q_p64_x4(p64, 8, poly64x2x4_t, vst1q_p64_x4, vld1q_p64_x4);
+    }
+
+    macro_rules! wide_store_load_roundtrip_neon {
+        ($( $name:ident $args:tt);* $(;)?) => {
+            $(
+                #[simd_test(enable = "neon")]
+                unsafe fn $name() {
+                    wide_store_load_roundtrip! $args;
+                }
+            )*
+        };
+    }
+
+    wide_store_load_roundtrip_neon! {
+        test_vld1_f32_x2(f32, 4, float32x2x2_t, vst1_f32_x2, vld1_f32_x2);
+        test_vld1_f32_x3(f32, 6, float32x2x3_t, vst1_f32_x3, vld1_f32_x3);
+        test_vld1_f32_x4(f32, 8, float32x2x4_t, vst1_f32_x4, vld1_f32_x4);
+
+        test_vld1q_f32_x2(f32, 8, float32x4x2_t, vst1q_f32_x2, vld1q_f32_x2);
+        test_vld1q_f32_x3(f32, 12, float32x4x3_t, vst1q_f32_x3, vld1q_f32_x3);
+        test_vld1q_f32_x4(f32, 16, float32x4x4_t, vst1q_f32_x4, vld1q_f32_x4);
+
+        test_vld1_s8_x2(i8, 16, int8x8x2_t, vst1_s8_x2, vld1_s8_x2);
+        test_vld1_s8_x3(i8, 24, int8x8x3_t, vst1_s8_x3, vld1_s8_x3);
+        test_vld1_s8_x4(i8, 32, int8x8x4_t, vst1_s8_x4, vld1_s8_x4);
+
+        test_vld1q_s8_x2(i8, 32, int8x16x2_t, vst1q_s8_x2, vld1q_s8_x2);
+        test_vld1q_s8_x3(i8, 48, int8x16x3_t, vst1q_s8_x3, vld1q_s8_x3);
+        test_vld1q_s8_x4(i8, 64, int8x16x4_t, vst1q_s8_x4, vld1q_s8_x4);
+
+        test_vld1_s16_x2(i16, 8, int16x4x2_t, vst1_s16_x2, vld1_s16_x2);
+        test_vld1_s16_x3(i16, 12, int16x4x3_t, vst1_s16_x3, vld1_s16_x3);
+        test_vld1_s16_x4(i16, 16, int16x4x4_t, vst1_s16_x4, vld1_s16_x4);
+
+        test_vld1q_s16_x2(i16, 16, int16x8x2_t, vst1q_s16_x2, vld1q_s16_x2);
+        test_vld1q_s16_x3(i16, 24, int16x8x3_t, vst1q_s16_x3, vld1q_s16_x3);
+        test_vld1q_s16_x4(i16, 32, int16x8x4_t, vst1q_s16_x4, vld1q_s16_x4);
+
+        test_vld1_s32_x2(i32, 4, int32x2x2_t, vst1_s32_x2, vld1_s32_x2);
+        test_vld1_s32_x3(i32, 6, int32x2x3_t, vst1_s32_x3, vld1_s32_x3);
+        test_vld1_s32_x4(i32, 8, int32x2x4_t, vst1_s32_x4, vld1_s32_x4);
+
+        test_vld1q_s32_x2(i32, 8, int32x4x2_t, vst1q_s32_x2, vld1q_s32_x2);
+        test_vld1q_s32_x3(i32, 12, int32x4x3_t, vst1q_s32_x3, vld1q_s32_x3);
+        test_vld1q_s32_x4(i32, 16, int32x4x4_t, vst1q_s32_x4, vld1q_s32_x4);
+
+        test_vld1_s64_x2(i64, 2, int64x1x2_t, vst1_s64_x2, vld1_s64_x2);
+        test_vld1_s64_x3(i64, 3, int64x1x3_t, vst1_s64_x3, vld1_s64_x3);
+        test_vld1_s64_x4(i64, 4, int64x1x4_t, vst1_s64_x4, vld1_s64_x4);
+
+        test_vld1q_s64_x2(i64, 4, int64x2x2_t, vst1q_s64_x2, vld1q_s64_x2);
+        test_vld1q_s64_x3(i64, 6, int64x2x3_t, vst1q_s64_x3, vld1q_s64_x3);
+        test_vld1q_s64_x4(i64, 8, int64x2x4_t, vst1q_s64_x4, vld1q_s64_x4);
+
+        test_vld1_u8_x2(u8, 16, uint8x8x2_t, vst1_u8_x2, vld1_u8_x2);
+        test_vld1_u8_x3(u8, 24, uint8x8x3_t, vst1_u8_x3, vld1_u8_x3);
+        test_vld1_u8_x4(u8, 32, uint8x8x4_t, vst1_u8_x4, vld1_u8_x4);
+
+        test_vld1q_u8_x2(u8, 32, uint8x16x2_t, vst1q_u8_x2, vld1q_u8_x2);
+        test_vld1q_u8_x3(u8, 48, uint8x16x3_t, vst1q_u8_x3, vld1q_u8_x3);
+        test_vld1q_u8_x4(u8, 64, uint8x16x4_t, vst1q_u8_x4, vld1q_u8_x4);
+
+        test_vld1_u16_x2(u16, 8, uint16x4x2_t, vst1_u16_x2, vld1_u16_x2);
+        test_vld1_u16_x3(u16, 12, uint16x4x3_t, vst1_u16_x3, vld1_u16_x3);
+        test_vld1_u16_x4(u16, 16, uint16x4x4_t, vst1_u16_x4, vld1_u16_x4);
+
+        test_vld1q_u16_x2(u16, 16, uint16x8x2_t, vst1q_u16_x2, vld1q_u16_x2);
+        test_vld1q_u16_x3(u16, 24, uint16x8x3_t, vst1q_u16_x3, vld1q_u16_x3);
+        test_vld1q_u16_x4(u16, 32, uint16x8x4_t, vst1q_u16_x4, vld1q_u16_x4);
+
+        test_vld1_u32_x2(u32, 4, uint32x2x2_t, vst1_u32_x2, vld1_u32_x2);
+        test_vld1_u32_x3(u32, 6, uint32x2x3_t, vst1_u32_x3, vld1_u32_x3);
+        test_vld1_u32_x4(u32, 8, uint32x2x4_t, vst1_u32_x4, vld1_u32_x4);
+
+        test_vld1q_u32_x2(u32, 8, uint32x4x2_t, vst1q_u32_x2, vld1q_u32_x2);
+        test_vld1q_u32_x3(u32, 12, uint32x4x3_t, vst1q_u32_x3, vld1q_u32_x3);
+        test_vld1q_u32_x4(u32, 16, uint32x4x4_t, vst1q_u32_x4, vld1q_u32_x4);
+
+        test_vld1_u64_x2(u64, 2, uint64x1x2_t, vst1_u64_x2, vld1_u64_x2);
+        test_vld1_u64_x3(u64, 3, uint64x1x3_t, vst1_u64_x3, vld1_u64_x3);
+        test_vld1_u64_x4(u64, 4, uint64x1x4_t, vst1_u64_x4, vld1_u64_x4);
+
+        test_vld1q_u64_x2(u64, 4, uint64x2x2_t, vst1q_u64_x2, vld1q_u64_x2);
+        test_vld1q_u64_x3(u64, 6, uint64x2x3_t, vst1q_u64_x3, vld1q_u64_x3);
+        test_vld1q_u64_x4(u64, 8, uint64x2x4_t, vst1q_u64_x4, vld1q_u64_x4);
+
+        test_vld1_p8_x2(p8, 16, poly8x8x2_t, vst1_p8_x2, vld1_p8_x2);
+        test_vld1_p8_x3(p8, 24, poly8x8x3_t, vst1_p8_x3, vld1_p8_x3);
+        test_vld1_p8_x4(p8, 32, poly8x8x4_t, vst1_p8_x4, vld1_p8_x4);
+
+        test_vld1q_p8_x2(p8, 32, poly8x16x2_t, vst1q_p8_x2, vld1q_p8_x2);
+        test_vld1q_p8_x3(p8, 48, poly8x16x3_t, vst1q_p8_x3, vld1q_p8_x3);
+        test_vld1q_p8_x4(p8, 64, poly8x16x4_t, vst1q_p8_x4, vld1q_p8_x4);
+
+        test_vld1_p16_x2(p16, 8, poly16x4x2_t, vst1_p16_x2, vld1_p16_x2);
+        test_vld1_p16_x3(p16, 12, poly16x4x3_t, vst1_p16_x3, vld1_p16_x3);
+        test_vld1_p16_x4(p16, 16, poly16x4x4_t, vst1_p16_x4, vld1_p16_x4);
+
+        test_vld1q_p16_x2(p16, 16, poly16x8x2_t, vst1q_p16_x2, vld1q_p16_x2);
+        test_vld1q_p16_x3(p16, 24, poly16x8x3_t, vst1q_p16_x3, vld1q_p16_x3);
+        test_vld1q_p16_x4(p16, 32, poly16x8x4_t, vst1q_p16_x4, vld1q_p16_x4);
+    }
 }
 
 #[cfg(test)]

library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs

@@ -17067,7 +17067,6 @@ pub unsafe fn vld1_p64_x4(a: *const p64) -> poly64x1x4_t {
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon,aes")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
@@ -17087,38 +17086,10 @@ pub unsafe fn vld1q_p64_x2(a: *const p64) -> poly64x2x2_t {
     transmute(vld1q_s64_x2(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64_x2)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon,aes")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_p64_x2(a: *const p64) -> poly64x2x2_t {
-    let mut ret_val: poly64x2x2_t = transmute(vld1q_s64_x2(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64_x3)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon,aes")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
@@ -17138,39 +17109,10 @@ pub unsafe fn vld1q_p64_x3(a: *const p64) -> poly64x2x3_t {
     transmute(vld1q_s64_x3(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64_x3)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon,aes")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_p64_x3(a: *const p64) -> poly64x2x3_t {
-    let mut ret_val: poly64x2x3_t = transmute(vld1q_s64_x3(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64_x4)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon,aes")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
@@ -17189,35 +17131,6 @@ pub unsafe fn vld1q_p64_x3(a: *const p64) -> poly64x2x3_t {
 pub unsafe fn vld1q_p64_x4(a: *const p64) -> poly64x2x4_t {
     transmute(vld1q_s64_x4(transmute(a)))
 }
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p64_x4)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon,aes")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_p64_x4(a: *const p64) -> poly64x2x4_t {
-    let mut ret_val: poly64x2x4_t = transmute(vld1q_s64_x4(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [1, 0]) };
-    ret_val.3 = unsafe { simd_shuffle!(ret_val.3, ret_val.3, [1, 0]) };
-    ret_val
-}
 #[doc = "Load multiple single-element structures to one, two, three, or four registers."]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_s8)"]
 #[doc = "## Safety"]
@@ -18071,7 +17984,6 @@ pub unsafe fn vld1q_s64_x4(a: *const i64) -> int64x2x4_t {
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18091,38 +18003,10 @@ pub unsafe fn vld1_u8_x2(a: *const u8) -> uint8x8x2_t {
     transmute(vld1_s8_x2(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8_x2)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_u8_x2(a: *const u8) -> uint8x8x2_t {
-    let mut ret_val: uint8x8x2_t = transmute(vld1_s8_x2(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8_x3)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18142,39 +18026,10 @@ pub unsafe fn vld1_u8_x3(a: *const u8) -> uint8x8x3_t {
     transmute(vld1_s8_x3(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8_x3)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_u8_x3(a: *const u8) -> uint8x8x3_t {
-    let mut ret_val: uint8x8x3_t = transmute(vld1_s8_x3(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8_x4)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18194,40 +18049,10 @@ pub unsafe fn vld1_u8_x4(a: *const u8) -> uint8x8x4_t {
     transmute(vld1_s8_x4(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u8_x4)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_u8_x4(a: *const u8) -> uint8x8x4_t {
-    let mut ret_val: uint8x8x4_t = transmute(vld1_s8_x4(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.3 = unsafe { simd_shuffle!(ret_val.3, ret_val.3, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8_x2)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18247,50 +18072,10 @@ pub unsafe fn vld1q_u8_x2(a: *const u8) -> uint8x16x2_t {
     transmute(vld1q_s8_x2(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8_x2)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_u8_x2(a: *const u8) -> uint8x16x2_t {
-    let mut ret_val: uint8x16x2_t = transmute(vld1q_s8_x2(transmute(a)));
-    ret_val.0 = unsafe {
-        simd_shuffle!(
-            ret_val.0,
-            ret_val.0,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val.1 = unsafe {
-        simd_shuffle!(
-            ret_val.1,
-            ret_val.1,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8_x3)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18310,57 +18095,10 @@ pub unsafe fn vld1q_u8_x3(a: *const u8) -> uint8x16x3_t {
     transmute(vld1q_s8_x3(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8_x3)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_u8_x3(a: *const u8) -> uint8x16x3_t {
-    let mut ret_val: uint8x16x3_t = transmute(vld1q_s8_x3(transmute(a)));
-    ret_val.0 = unsafe {
-        simd_shuffle!(
-            ret_val.0,
-            ret_val.0,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val.1 = unsafe {
-        simd_shuffle!(
-            ret_val.1,
-            ret_val.1,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val.2 = unsafe {
-        simd_shuffle!(
-            ret_val.2,
-            ret_val.2,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8_x4)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18380,64 +18118,10 @@ pub unsafe fn vld1q_u8_x4(a: *const u8) -> uint8x16x4_t {
     transmute(vld1q_s8_x4(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u8_x4)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_u8_x4(a: *const u8) -> uint8x16x4_t {
-    let mut ret_val: uint8x16x4_t = transmute(vld1q_s8_x4(transmute(a)));
-    ret_val.0 = unsafe {
-        simd_shuffle!(
-            ret_val.0,
-            ret_val.0,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val.1 = unsafe {
-        simd_shuffle!(
-            ret_val.1,
-            ret_val.1,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val.2 = unsafe {
-        simd_shuffle!(
-            ret_val.2,
-            ret_val.2,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val.3 = unsafe {
-        simd_shuffle!(
-            ret_val.3,
-            ret_val.3,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16_x2)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18457,38 +18141,10 @@ pub unsafe fn vld1_u16_x2(a: *const u16) -> uint16x4x2_t {
     transmute(vld1_s16_x2(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16_x2)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_u16_x2(a: *const u16) -> uint16x4x2_t {
-    let mut ret_val: uint16x4x2_t = transmute(vld1_s16_x2(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16_x3)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18508,39 +18164,10 @@ pub unsafe fn vld1_u16_x3(a: *const u16) -> uint16x4x3_t {
     transmute(vld1_s16_x3(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16_x3)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_u16_x3(a: *const u16) -> uint16x4x3_t {
-    let mut ret_val: uint16x4x3_t = transmute(vld1_s16_x3(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16_x4)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18560,40 +18187,10 @@ pub unsafe fn vld1_u16_x4(a: *const u16) -> uint16x4x4_t {
     transmute(vld1_s16_x4(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u16_x4)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_u16_x4(a: *const u16) -> uint16x4x4_t {
-    let mut ret_val: uint16x4x4_t = transmute(vld1_s16_x4(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [3, 2, 1, 0]) };
-    ret_val.3 = unsafe { simd_shuffle!(ret_val.3, ret_val.3, [3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16_x2)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18613,38 +18210,10 @@ pub unsafe fn vld1q_u16_x2(a: *const u16) -> uint16x8x2_t {
     transmute(vld1q_s16_x2(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16_x2)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_u16_x2(a: *const u16) -> uint16x8x2_t {
-    let mut ret_val: uint16x8x2_t = transmute(vld1q_s16_x2(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16_x3)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18664,39 +18233,10 @@ pub unsafe fn vld1q_u16_x3(a: *const u16) -> uint16x8x3_t {
     transmute(vld1q_s16_x3(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16_x3)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_u16_x3(a: *const u16) -> uint16x8x3_t {
-    let mut ret_val: uint16x8x3_t = transmute(vld1q_s16_x3(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16_x4)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18716,40 +18256,10 @@ pub unsafe fn vld1q_u16_x4(a: *const u16) -> uint16x8x4_t {
     transmute(vld1q_s16_x4(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u16_x4)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_u16_x4(a: *const u16) -> uint16x8x4_t {
-    let mut ret_val: uint16x8x4_t = transmute(vld1q_s16_x4(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.3 = unsafe { simd_shuffle!(ret_val.3, ret_val.3, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32_x2)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18769,38 +18279,10 @@ pub unsafe fn vld1_u32_x2(a: *const u32) -> uint32x2x2_t {
     transmute(vld1_s32_x2(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32_x2)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_u32_x2(a: *const u32) -> uint32x2x2_t {
-    let mut ret_val: uint32x2x2_t = transmute(vld1_s32_x2(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32_x3)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18820,39 +18302,10 @@ pub unsafe fn vld1_u32_x3(a: *const u32) -> uint32x2x3_t {
     transmute(vld1_s32_x3(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32_x3)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_u32_x3(a: *const u32) -> uint32x2x3_t {
-    let mut ret_val: uint32x2x3_t = transmute(vld1_s32_x3(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32_x4)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18872,40 +18325,10 @@ pub unsafe fn vld1_u32_x4(a: *const u32) -> uint32x2x4_t {
     transmute(vld1_s32_x4(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u32_x4)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_u32_x4(a: *const u32) -> uint32x2x4_t {
-    let mut ret_val: uint32x2x4_t = transmute(vld1_s32_x4(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [1, 0]) };
-    ret_val.3 = unsafe { simd_shuffle!(ret_val.3, ret_val.3, [1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32_x2)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18925,38 +18348,10 @@ pub unsafe fn vld1q_u32_x2(a: *const u32) -> uint32x4x2_t {
     transmute(vld1q_s32_x2(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32_x2)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_u32_x2(a: *const u32) -> uint32x4x2_t {
-    let mut ret_val: uint32x4x2_t = transmute(vld1q_s32_x2(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32_x3)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -18976,39 +18371,10 @@ pub unsafe fn vld1q_u32_x3(a: *const u32) -> uint32x4x3_t {
     transmute(vld1q_s32_x3(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32_x3)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_u32_x3(a: *const u32) -> uint32x4x3_t {
-    let mut ret_val: uint32x4x3_t = transmute(vld1q_s32_x3(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32_x4)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19028,35 +18394,6 @@ pub unsafe fn vld1q_u32_x4(a: *const u32) -> uint32x4x4_t {
     transmute(vld1q_s32_x4(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u32_x4)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_u32_x4(a: *const u32) -> uint32x4x4_t {
-    let mut ret_val: uint32x4x4_t = transmute(vld1q_s32_x4(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [3, 2, 1, 0]) };
-    ret_val.3 = unsafe { simd_shuffle!(ret_val.3, ret_val.3, [3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_u64_x2)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
@@ -19130,7 +18467,6 @@ pub unsafe fn vld1_u64_x4(a: *const u64) -> uint64x1x4_t {
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19150,38 +18486,10 @@ pub unsafe fn vld1q_u64_x2(a: *const u64) -> uint64x2x2_t {
     transmute(vld1q_s64_x2(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64_x2)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_u64_x2(a: *const u64) -> uint64x2x2_t {
-    let mut ret_val: uint64x2x2_t = transmute(vld1q_s64_x2(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64_x3)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19201,39 +18509,10 @@ pub unsafe fn vld1q_u64_x3(a: *const u64) -> uint64x2x3_t {
     transmute(vld1q_s64_x3(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64_x3)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_u64_x3(a: *const u64) -> uint64x2x3_t {
-    let mut ret_val: uint64x2x3_t = transmute(vld1q_s64_x3(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64_x4)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19253,40 +18532,10 @@ pub unsafe fn vld1q_u64_x4(a: *const u64) -> uint64x2x4_t {
     transmute(vld1q_s64_x4(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_u64_x4)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_u64_x4(a: *const u64) -> uint64x2x4_t {
-    let mut ret_val: uint64x2x4_t = transmute(vld1q_s64_x4(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [1, 0]) };
-    ret_val.3 = unsafe { simd_shuffle!(ret_val.3, ret_val.3, [1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8_x2)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19306,38 +18555,10 @@ pub unsafe fn vld1_p8_x2(a: *const p8) -> poly8x8x2_t {
     transmute(vld1_s8_x2(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8_x2)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_p8_x2(a: *const p8) -> poly8x8x2_t {
-    let mut ret_val: poly8x8x2_t = transmute(vld1_s8_x2(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8_x3)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19357,39 +18578,10 @@ pub unsafe fn vld1_p8_x3(a: *const p8) -> poly8x8x3_t {
     transmute(vld1_s8_x3(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8_x3)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_p8_x3(a: *const p8) -> poly8x8x3_t {
-    let mut ret_val: poly8x8x3_t = transmute(vld1_s8_x3(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8_x4)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19409,40 +18601,10 @@ pub unsafe fn vld1_p8_x4(a: *const p8) -> poly8x8x4_t {
     transmute(vld1_s8_x4(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p8_x4)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_p8_x4(a: *const p8) -> poly8x8x4_t {
-    let mut ret_val: poly8x8x4_t = transmute(vld1_s8_x4(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.3 = unsafe { simd_shuffle!(ret_val.3, ret_val.3, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8_x2)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19462,50 +18624,10 @@ pub unsafe fn vld1q_p8_x2(a: *const p8) -> poly8x16x2_t {
     transmute(vld1q_s8_x2(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8_x2)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_p8_x2(a: *const p8) -> poly8x16x2_t {
-    let mut ret_val: poly8x16x2_t = transmute(vld1q_s8_x2(transmute(a)));
-    ret_val.0 = unsafe {
-        simd_shuffle!(
-            ret_val.0,
-            ret_val.0,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val.1 = unsafe {
-        simd_shuffle!(
-            ret_val.1,
-            ret_val.1,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8_x3)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19525,57 +18647,10 @@ pub unsafe fn vld1q_p8_x3(a: *const p8) -> poly8x16x3_t {
     transmute(vld1q_s8_x3(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8_x3)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_p8_x3(a: *const p8) -> poly8x16x3_t {
-    let mut ret_val: poly8x16x3_t = transmute(vld1q_s8_x3(transmute(a)));
-    ret_val.0 = unsafe {
-        simd_shuffle!(
-            ret_val.0,
-            ret_val.0,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val.1 = unsafe {
-        simd_shuffle!(
-            ret_val.1,
-            ret_val.1,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val.2 = unsafe {
-        simd_shuffle!(
-            ret_val.2,
-            ret_val.2,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8_x4)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19595,64 +18670,10 @@ pub unsafe fn vld1q_p8_x4(a: *const p8) -> poly8x16x4_t {
     transmute(vld1q_s8_x4(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p8_x4)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_p8_x4(a: *const p8) -> poly8x16x4_t {
-    let mut ret_val: poly8x16x4_t = transmute(vld1q_s8_x4(transmute(a)));
-    ret_val.0 = unsafe {
-        simd_shuffle!(
-            ret_val.0,
-            ret_val.0,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val.1 = unsafe {
-        simd_shuffle!(
-            ret_val.1,
-            ret_val.1,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val.2 = unsafe {
-        simd_shuffle!(
-            ret_val.2,
-            ret_val.2,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val.3 = unsafe {
-        simd_shuffle!(
-            ret_val.3,
-            ret_val.3,
-            [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
-        )
-    };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16_x2)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19672,38 +18693,10 @@ pub unsafe fn vld1_p16_x2(a: *const p16) -> poly16x4x2_t {
     transmute(vld1_s16_x2(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16_x2)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_p16_x2(a: *const p16) -> poly16x4x2_t {
-    let mut ret_val: poly16x4x2_t = transmute(vld1_s16_x2(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16_x3)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19723,39 +18716,10 @@ pub unsafe fn vld1_p16_x3(a: *const p16) -> poly16x4x3_t {
     transmute(vld1_s16_x3(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16_x3)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_p16_x3(a: *const p16) -> poly16x4x3_t {
-    let mut ret_val: poly16x4x3_t = transmute(vld1_s16_x3(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16_x4)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19775,40 +18739,10 @@ pub unsafe fn vld1_p16_x4(a: *const p16) -> poly16x4x4_t {
     transmute(vld1_s16_x4(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1_p16_x4)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1_p16_x4(a: *const p16) -> poly16x4x4_t {
-    let mut ret_val: poly16x4x4_t = transmute(vld1_s16_x4(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [3, 2, 1, 0]) };
-    ret_val.3 = unsafe { simd_shuffle!(ret_val.3, ret_val.3, [3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16_x2)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19828,38 +18762,10 @@ pub unsafe fn vld1q_p16_x2(a: *const p16) -> poly16x8x2_t {
     transmute(vld1q_s16_x2(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16_x2)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_p16_x2(a: *const p16) -> poly16x8x2_t {
-    let mut ret_val: poly16x8x2_t = transmute(vld1q_s16_x2(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16_x3)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19879,39 +18785,10 @@ pub unsafe fn vld1q_p16_x3(a: *const p16) -> poly16x8x3_t {
     transmute(vld1q_s16_x3(transmute(a)))
 }
 #[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16_x3)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_p16_x3(a: *const p16) -> poly16x8x3_t {
-    let mut ret_val: poly16x8x3_t = transmute(vld1q_s16_x3(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val
-}
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
 #[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16_x4)"]
 #[doc = "## Safety"]
 #[doc = "  * Neon intrinsic unsafe"]
 #[inline(always)]
-#[cfg(target_endian = "little")]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
@@ -19930,35 +18807,6 @@ pub unsafe fn vld1q_p16_x3(a: *const p16) -> poly16x8x3_t {
 pub unsafe fn vld1q_p16_x4(a: *const p16) -> poly16x8x4_t {
     transmute(vld1q_s16_x4(transmute(a)))
 }
-#[doc = "Load multiple single-element structures to one, two, three, or four registers"]
-#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vld1q_p16_x4)"]
-#[doc = "## Safety"]
-#[doc = "  * Neon intrinsic unsafe"]
-#[inline(always)]
-#[cfg(target_endian = "big")]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
-#[cfg_attr(
-    all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
-    assert_instr(ld1)
-)]
-#[cfg_attr(
-    not(target_arch = "arm"),
-    stable(feature = "neon_intrinsics", since = "1.59.0")
-)]
-#[cfg_attr(
-    target_arch = "arm",
-    unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
-)]
-pub unsafe fn vld1q_p16_x4(a: *const p16) -> poly16x8x4_t {
-    let mut ret_val: poly16x8x4_t = transmute(vld1q_s16_x4(transmute(a)));
-    ret_val.0 = unsafe { simd_shuffle!(ret_val.0, ret_val.0, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.1 = unsafe { simd_shuffle!(ret_val.1, ret_val.1, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.2 = unsafe { simd_shuffle!(ret_val.2, ret_val.2, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val.3 = unsafe { simd_shuffle!(ret_val.3, ret_val.3, [7, 6, 5, 4, 3, 2, 1, 0]) };
-    ret_val
-}
 #[inline(always)]
 #[rustc_legacy_const_generics(1)]
 #[cfg(target_arch = "arm")]

library/stdarch/crates/core_arch/src/powerpc/altivec.rs

@@ -47,6 +47,54 @@
     pub struct vector_float(4 x f32);
 }
 
+#[unstable(feature = "stdarch_powerpc", issue = "111145")]
+impl From<m8x16> for vector_bool_char {
+    #[inline]
+    fn from(value: m8x16) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
+#[unstable(feature = "stdarch_powerpc", issue = "111145")]
+impl From<vector_bool_char> for m8x16 {
+    #[inline]
+    fn from(value: vector_bool_char) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
+#[unstable(feature = "stdarch_powerpc", issue = "111145")]
+impl From<m16x8> for vector_bool_short {
+    #[inline]
+    fn from(value: m16x8) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
+#[unstable(feature = "stdarch_powerpc", issue = "111145")]
+impl From<vector_bool_short> for m16x8 {
+    #[inline]
+    fn from(value: vector_bool_short) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
+#[unstable(feature = "stdarch_powerpc", issue = "111145")]
+impl From<m32x4> for vector_bool_int {
+    #[inline]
+    fn from(value: m32x4) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
+#[unstable(feature = "stdarch_powerpc", issue = "111145")]
+impl From<vector_bool_int> for m32x4 {
+    #[inline]
+    fn from(value: vector_bool_int) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
 #[allow(improper_ctypes)]
 unsafe extern "C" {
     #[link_name = "llvm.ppc.altivec.lvx"]
@@ -129,8 +177,6 @@ fn vmsumshm(
         b: vector_signed_short,
         c: vector_signed_int,
     ) -> vector_signed_int;
-    #[link_name = "llvm.ppc.altivec.vnmsubfp"]
-    fn vnmsubfp(a: vector_float, b: vector_float, c: vector_float) -> vector_float;
     #[link_name = "llvm.ppc.altivec.vsum2sws"]
     fn vsum2sws(a: vector_signed_int, b: vector_signed_int) -> vector_signed_int;
     #[link_name = "llvm.ppc.altivec.vsum4ubs"]
@@ -1881,9 +1927,9 @@ unsafe fn vec_vsum2sws(a: vector_signed_int, b: vector_signed_int) -> vector_sig
 
     #[inline]
     #[target_feature(enable = "altivec")]
-    #[cfg_attr(test, assert_instr(vnmsubfp))]
-    unsafe fn vec_vnmsubfp(a: vector_float, b: vector_float, c: vector_float) -> vector_float {
-        vnmsubfp(a, b, c)
+    #[cfg_attr(test, assert_instr(xvnmsubasp))]
+    pub unsafe fn vec_vnmsubfp(a: vector_float, b: vector_float, c: vector_float) -> vector_float {
+        simd_neg(simd_fma(a, b, simd_neg(c)))
     }
 
     #[inline]
@@ -3249,7 +3295,7 @@ pub trait VectorRound {
         unsafe fn vec_round(self) -> Self;
     }
 
-    test_impl! { vec_vrfin(a: vector_float) -> vector_float [vrfin, xvrspic] }
+    test_impl! { vec_vrfin(a: vector_float) -> vector_float [vrfin, vrfin] }
 
     #[unstable(feature = "stdarch_powerpc", issue = "111145")]
     impl VectorRound for vector_float {
@@ -4281,7 +4327,7 @@ pub unsafe fn vec_madd(a: vector_float, b: vector_float, c: vector_float) -> vec
 #[target_feature(enable = "altivec")]
 #[unstable(feature = "stdarch_powerpc", issue = "111145")]
 pub unsafe fn vec_nmsub(a: vector_float, b: vector_float, c: vector_float) -> vector_float {
-    vnmsubfp(a, b, c)
+    sealed::vec_vnmsubfp(a, b, c)
 }
 
 /// Vector Select
@@ -4653,22 +4699,22 @@ macro_rules! test_vec_2 {
         };
         { $name: ident, $fn:ident, $ty: ident -> $ty_out: ident, [$($a:expr),+], [$($b:expr),+], [$($d:expr),+] } => {
             #[simd_test(enable = "altivec")]
-            unsafe fn $name() {
-                let a: s_t_l!($ty) = transmute($ty::new($($a),+));
-                let b: s_t_l!($ty) = transmute($ty::new($($b),+));
+            fn $name() {
+                let a: s_t_l!($ty) = $ty::new($($a),+).into();
+                let b: s_t_l!($ty) = $ty::new($($b),+).into();
 
                 let d = $ty_out::new($($d),+);
-                let r : $ty_out = transmute($fn(a, b));
+                let r = $ty_out::from(unsafe { $fn(a, b) });
                 assert_eq!(d, r);
             }
          };
          { $name: ident, $fn:ident, $ty: ident -> $ty_out: ident, [$($a:expr),+], [$($b:expr),+], $d:expr } => {
             #[simd_test(enable = "altivec")]
-            unsafe fn $name() {
-                let a: s_t_l!($ty) = transmute($ty::new($($a),+));
-                let b: s_t_l!($ty) = transmute($ty::new($($b),+));
+            fn $name() {
+                let a: s_t_l!($ty) = $ty::new($($a),+).into();
+                let b: s_t_l!($ty) = $ty::new($($b),+).into();
 
-                let r : $ty_out = transmute($fn(a, b));
+                let r = $ty_out::from(unsafe { $fn(a, b) });
                 assert_eq!($d, r);
             }
          }
@@ -4677,11 +4723,11 @@ unsafe fn $name() {
     macro_rules! test_vec_1 {
         { $name: ident, $fn:ident, f32x4, [$($a:expr),+], ~[$($d:expr),+] } => {
             #[simd_test(enable = "altivec")]
-            unsafe fn $name() {
-                let a: vector_float = transmute(f32x4::new($($a),+));
+            fn $name() {
+                let a = vector_float::from(f32x4::new($($a),+));
 
-                let d: vector_float = transmute(f32x4::new($($d),+));
-                let r = transmute(vec_cmple(vec_abs(vec_sub($fn(a), d)), vec_splats(f32::EPSILON)));
+                let d = vector_float::from(f32x4::new($($d),+));
+                let r = m32x4::from(unsafe { vec_cmple(vec_abs(vec_sub($fn(a), d)), vec_splats(f32::EPSILON)) });
                 let e = m32x4::new(true, true, true, true);
                 assert_eq!(e, r);
             }
@@ -4691,18 +4737,18 @@ unsafe fn $name() {
         };
         { $name: ident, $fn:ident, $ty: ident -> $ty_out: ident, [$($a:expr),+], [$($d:expr),+] } => {
             #[simd_test(enable = "altivec")]
-            unsafe fn $name() {
-                let a: s_t_l!($ty) = transmute($ty::new($($a),+));
+            fn $name() {
+                let a: s_t_l!($ty) = $ty::new($($a),+).into();
 
                 let d = $ty_out::new($($d),+);
-                let r : $ty_out = transmute($fn(a));
+                let r = $ty_out::from(unsafe { $fn(a) });
                 assert_eq!(d, r);
             }
         }
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_ld() {
+    fn test_vec_ld() {
         let pat = [
             u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15),
             u8x16::new(
@@ -4711,14 +4757,14 @@ unsafe fn test_vec_ld() {
         ];
 
         for off in 0..16 {
-            let v: u8x16 = transmute(vec_ld(0, (pat.as_ptr() as *const u8).offset(off)));
+            let v = u8x16::from(unsafe { vec_ld(0, (pat.as_ptr() as *const u8).offset(off)) });
             assert_eq!(
                 v,
                 u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
             );
         }
         for off in 16..32 {
-            let v: u8x16 = transmute(vec_ld(0, (pat.as_ptr() as *const u8).offset(off)));
+            let v = u8x16::from(unsafe { vec_ld(0, (pat.as_ptr() as *const u8).offset(off)) });
             assert_eq!(
                 v,
                 u8x16::new(
@@ -4729,7 +4775,7 @@ unsafe fn test_vec_ld() {
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_xl() {
+    fn test_vec_xl() {
         let pat = [
             u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15),
             u8x16::new(
@@ -4738,7 +4784,7 @@ unsafe fn test_vec_xl() {
         ];
 
         for off in 0..16 {
-            let val: u8x16 = transmute(vec_xl(0, (pat.as_ptr() as *const u8).offset(off)));
+            let val = u8x16::from(unsafe { vec_xl(0, (pat.as_ptr() as *const u8).offset(off)) });
             for i in 0..16 {
                 let v = val.extract_dyn(i);
                 assert_eq!(off as usize + i, v as usize);
@@ -4747,14 +4793,16 @@ unsafe fn test_vec_xl() {
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_xst() {
-        let v: vector_unsigned_char = transmute(u8x16::new(
+    fn test_vec_xst() {
+        let v = vector_unsigned_char::from(u8x16::new(
             0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
         ));
 
         for off in 0..16 {
             let mut buf = [0u8; 32];
-            vec_xst(v, 0, (buf.as_mut_ptr() as *mut u8).offset(off));
+            unsafe {
+                vec_xst(v, 0, (buf.as_mut_ptr() as *mut u8).offset(off));
+            }
             for i in 0..16 {
                 assert_eq!(i as u8, buf[off as usize..][i]);
             }
@@ -4762,7 +4810,7 @@ unsafe fn test_vec_xst() {
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_ldl() {
+    fn test_vec_ldl() {
         let pat = [
             u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15),
             u8x16::new(
@@ -4771,14 +4819,14 @@ unsafe fn test_vec_ldl() {
         ];
 
         for off in 0..16 {
-            let v: u8x16 = transmute(vec_ldl(0, (pat.as_ptr() as *const u8).offset(off)));
+            let v = u8x16::from(unsafe { vec_ldl(0, (pat.as_ptr() as *const u8).offset(off)) });
             assert_eq!(
                 v,
                 u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
             );
         }
         for off in 16..32 {
-            let v: u8x16 = transmute(vec_ldl(0, (pat.as_ptr() as *const u8).offset(off)));
+            let v = u8x16::from(unsafe { vec_ldl(0, (pat.as_ptr() as *const u8).offset(off)) });
             assert_eq!(
                 v,
                 u8x16::new(
@@ -4789,30 +4837,30 @@ unsafe fn test_vec_ldl() {
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_lde_u8() {
+    fn test_vec_lde_u8() {
         let pat = [u8x16::new(
             0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
         )];
         for off in 0..16 {
-            let v: u8x16 = transmute(vec_lde(off, pat.as_ptr() as *const u8));
+            let v = u8x16::from(unsafe { vec_lde(off, pat.as_ptr() as *const u8) });
             assert_eq!(off as u8, v.extract_dyn(off as _));
         }
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_lde_u16() {
+    fn test_vec_lde_u16() {
         let pat = [u16x8::new(0, 1, 2, 3, 4, 5, 6, 7)];
         for off in 0..8 {
-            let v: u16x8 = transmute(vec_lde(off * 2, pat.as_ptr() as *const u16));
+            let v = u16x8::from(unsafe { vec_lde(off * 2, pat.as_ptr() as *const u16) });
             assert_eq!(off as u16, v.extract_dyn(off as _));
         }
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_lde_u32() {
+    fn test_vec_lde_u32() {
         let pat = [u32x4::new(0, 1, 2, 3)];
         for off in 0..4 {
-            let v: u32x4 = transmute(vec_lde(off * 4, pat.as_ptr() as *const u32));
+            let v = u32x4::from(unsafe { vec_lde(off * 4, pat.as_ptr() as *const u32) });
             assert_eq!(off as u32, v.extract_dyn(off as _));
         }
     }
@@ -5818,9 +5866,9 @@ unsafe fn test_vec_lde_u32() {
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_cmpb() {
-        let a: vector_float = transmute(f32x4::new(0.1, 0.5, 0.6, 0.9));
-        let b: vector_float = transmute(f32x4::new(-0.1, 0.5, -0.6, 0.9));
+    fn test_vec_cmpb() {
+        let a = vector_float::from(f32x4::new(0.1, 0.5, 0.6, 0.9));
+        let b = vector_float::from(f32x4::new(-0.1, 0.5, -0.6, 0.9));
         let d = i32x4::new(
             -0b10000000000000000000000000000000,
             0,
@@ -5828,15 +5876,15 @@ unsafe fn test_vec_cmpb() {
             0,
         );
 
-        assert_eq!(d, transmute(vec_cmpb(a, b)));
+        assert_eq!(d, i32x4::from(unsafe { vec_cmpb(a, b) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_ceil() {
-        let a: vector_float = transmute(f32x4::new(0.1, 0.5, 0.6, 0.9));
+    fn test_vec_ceil() {
+        let a = vector_float::from(f32x4::new(0.1, 0.5, 0.6, 0.9));
         let d = f32x4::new(1.0, 1.0, 1.0, 1.0);
 
-        assert_eq!(d, transmute(vec_ceil(a)));
+        assert_eq!(d, f32x4::from(unsafe { vec_ceil(a) }));
     }
 
     test_vec_2! { test_vec_andc, vec_andc, i32x4,
@@ -5926,11 +5974,11 @@ macro_rules! test_vec_adds {
     macro_rules! test_vec_abs {
         { $name: ident, $ty: ident, $a: expr, $d: expr } => {
             #[simd_test(enable = "altivec")]
-            unsafe fn $name() {
-                let a = vec_splats($a);
-                let a: s_t_l!($ty) = vec_abs(a);
+            fn $name() {
+                let a = unsafe { vec_splats($a) };
+                let a: s_t_l!($ty) = unsafe { vec_abs(a) };
                 let d = $ty::splat($d);
-                assert_eq!(d, transmute(a));
+                assert_eq!(d, $ty::from(a));
             }
         }
     }
@@ -5943,11 +5991,11 @@ unsafe fn $name() {
     macro_rules! test_vec_abss {
         { $name: ident, $ty: ident, $a: expr, $d: expr } => {
             #[simd_test(enable = "altivec")]
-            unsafe fn $name() {
-                let a = vec_splats($a);
-                let a: s_t_l!($ty) = vec_abss(a);
+            fn $name() {
+                let a = unsafe { vec_splats($a) };
+                let a: s_t_l!($ty) = unsafe { vec_abss(a) };
                 let d = $ty::splat($d);
-                assert_eq!(d, transmute(a));
+                assert_eq!(d, $ty::from(a));
             }
         }
     }
@@ -5959,10 +6007,10 @@ unsafe fn $name() {
     macro_rules! test_vec_splats {
         { $name: ident, $ty: ident, $a: expr } => {
             #[simd_test(enable = "altivec")]
-            unsafe fn $name() {
-                let a: s_t_l!($ty) = vec_splats($a);
+            fn $name() {
+                let a: s_t_l!($ty) = unsafe { vec_splats($a) };
                 let d = $ty::splat($a);
-                assert_eq!(d, transmute(a));
+                assert_eq!(d, $ty::from(a));
             }
         }
     }
@@ -5978,10 +6026,10 @@ unsafe fn $name() {
     macro_rules! test_vec_splat {
         { $name: ident, $fun: ident, $ty: ident, $a: expr, $b: expr} => {
             #[simd_test(enable = "altivec")]
-            unsafe fn $name() {
-                let a = $fun::<$a>();
+            fn $name() {
+                let a = unsafe { $fun::<$a>() };
                 let d = $ty::splat($b);
-                assert_eq!(d, transmute(a));
+                assert_eq!(d, $ty::from(a));
             }
         }
     }
@@ -6073,12 +6121,12 @@ macro_rules! test_vec_subs {
     macro_rules! test_vec_min {
         { $name: ident, $ty: ident, [$($a:expr),+], [$($b:expr),+], [$($d:expr),+] } => {
             #[simd_test(enable = "altivec")]
-            unsafe fn $name() {
-                let a: s_t_l!($ty) = transmute($ty::new($($a),+));
-                let b: s_t_l!($ty) = transmute($ty::new($($b),+));
+            fn $name() {
+                let a: s_t_l!($ty) = $ty::new($($a),+).into();
+                let b: s_t_l!($ty) = $ty::new($($b),+).into();
 
                 let d = $ty::new($($d),+);
-                let r : $ty = transmute(vec_min(a, b));
+                let r = $ty::from(unsafe { vec_min(a, b) });
                 assert_eq!(d, r);
             }
          }
@@ -6117,12 +6165,12 @@ unsafe fn $name() {
     macro_rules! test_vec_max {
         { $name: ident, $ty: ident, [$($a:expr),+], [$($b:expr),+], [$($d:expr),+] } => {
             #[simd_test(enable = "altivec")]
-            unsafe fn $name() {
-                let a: s_t_l!($ty) = transmute($ty::new($($a),+));
-                let b: s_t_l!($ty) = transmute($ty::new($($b),+));
+            fn $name() {
+                let a: s_t_l!($ty) = $ty::new($($a),+).into();
+                let b: s_t_l!($ty) = $ty::new($($b),+).into();
 
                 let d = $ty::new($($d),+);
-                let r : $ty = transmute(vec_max(a, b));
+                let r = $ty::from(unsafe { vec_max(a, b) });
                 assert_eq!(d, r);
             }
          }
@@ -6163,13 +6211,13 @@ macro_rules! test_vec_perm {
          $shorttype:ident, $longtype:ident,
          [$($a:expr),+], [$($b:expr),+], [$($c:expr),+], [$($d:expr),+]} => {
             #[simd_test(enable = "altivec")]
-            unsafe fn $name() {
-                let a: $longtype = transmute($shorttype::new($($a),+));
-                let b: $longtype = transmute($shorttype::new($($b),+));
-                let c: vector_unsigned_char = transmute(u8x16::new($($c),+));
+            fn $name() {
+                let a = $longtype::from($shorttype::new($($a),+));
+                let b = $longtype::from($shorttype::new($($b),+));
+                let c = vector_unsigned_char::from(u8x16::new($($c),+));
                 let d = $shorttype::new($($d),+);
 
-                let r: $shorttype = transmute(vec_perm(a, b, c));
+                let r = $shorttype::from(unsafe { vec_perm(a, b, c) });
                 assert_eq!(d, r);
             }
         }
@@ -6249,8 +6297,8 @@ unsafe fn $name() {
     [0.0, 1.0, 1.0, 1.1]}
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_madds() {
-        let a: vector_signed_short = transmute(i16x8::new(
+    fn test_vec_madds() {
+        let a = vector_signed_short::from(i16x8::new(
             0 * 256,
             1 * 256,
             2 * 256,
@@ -6260,19 +6308,19 @@ unsafe fn test_vec_madds() {
             6 * 256,
             7 * 256,
         ));
-        let b: vector_signed_short = transmute(i16x8::new(256, 256, 256, 256, 256, 256, 256, 256));
-        let c: vector_signed_short = transmute(i16x8::new(0, 1, 2, 3, 4, 5, 6, 7));
+        let b = vector_signed_short::from(i16x8::new(256, 256, 256, 256, 256, 256, 256, 256));
+        let c = vector_signed_short::from(i16x8::new(0, 1, 2, 3, 4, 5, 6, 7));
 
         let d = i16x8::new(0, 3, 6, 9, 12, 15, 18, 21);
 
-        assert_eq!(d, transmute(vec_madds(a, b, c)));
+        assert_eq!(d, i16x8::from(unsafe { vec_madds(a, b, c) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_madd_float() {
-        let a: vector_float = transmute(f32x4::new(0.1, 0.2, 0.3, 0.4));
-        let b: vector_float = transmute(f32x4::new(0.1, 0.2, 0.3, 0.4));
-        let c: vector_float = transmute(f32x4::new(0.1, 0.2, 0.3, 0.4));
+    fn test_vec_madd_float() {
+        let a = vector_float::from(f32x4::new(0.1, 0.2, 0.3, 0.4));
+        let b = vector_float::from(f32x4::new(0.1, 0.2, 0.3, 0.4));
+        let c = vector_float::from(f32x4::new(0.1, 0.2, 0.3, 0.4));
         let d = f32x4::new(
             0.1 * 0.1 + 0.1,
             0.2 * 0.2 + 0.2,
@@ -6280,26 +6328,26 @@ unsafe fn test_vec_madd_float() {
             0.4 * 0.4 + 0.4,
         );
 
-        assert_eq!(d, transmute(vec_madd(a, b, c)));
+        assert_eq!(d, f32x4::from(unsafe { vec_madd(a, b, c) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_nmsub_float() {
-        let a: vector_float = transmute(f32x4::new(0.1, 0.2, 0.3, 0.4));
-        let b: vector_float = transmute(f32x4::new(0.1, 0.2, 0.3, 0.4));
-        let c: vector_float = transmute(f32x4::new(0.1, 0.2, 0.3, 0.4));
+    fn test_vec_nmsub_float() {
+        let a = vector_float::from(f32x4::new(0.1, 0.2, 0.3, 0.4));
+        let b = vector_float::from(f32x4::new(0.1, 0.2, 0.3, 0.4));
+        let c = vector_float::from(f32x4::new(0.1, 0.2, 0.3, 0.4));
         let d = f32x4::new(
             -(0.1 * 0.1 - 0.1),
             -(0.2 * 0.2 - 0.2),
             -(0.3 * 0.3 - 0.3),
             -(0.4 * 0.4 - 0.4),
         );
-        assert_eq!(d, transmute(vec_nmsub(a, b, c)));
+        assert_eq!(d, f32x4::from(unsafe { vec_nmsub(a, b, c) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_mradds() {
-        let a: vector_signed_short = transmute(i16x8::new(
+    fn test_vec_mradds() {
+        let a = vector_signed_short::from(i16x8::new(
             0 * 256,
             1 * 256,
             2 * 256,
@@ -6309,25 +6357,25 @@ unsafe fn test_vec_mradds() {
             6 * 256,
             7 * 256,
         ));
-        let b: vector_signed_short = transmute(i16x8::new(256, 256, 256, 256, 256, 256, 256, 256));
-        let c: vector_signed_short = transmute(i16x8::new(0, 1, 2, 3, 4, 5, 6, i16::MAX - 1));
+        let b = vector_signed_short::from(i16x8::new(256, 256, 256, 256, 256, 256, 256, 256));
+        let c = vector_signed_short::from(i16x8::new(0, 1, 2, 3, 4, 5, 6, i16::MAX - 1));
 
         let d = i16x8::new(0, 3, 6, 9, 12, 15, 18, i16::MAX);
 
-        assert_eq!(d, transmute(vec_mradds(a, b, c)));
+        assert_eq!(d, i16x8::from(unsafe { vec_mradds(a, b, c) }));
     }
 
     macro_rules! test_vec_mladd {
         {$name:ident, $sa:ident, $la:ident, $sbc:ident, $lbc:ident, $sd:ident,
             [$($a:expr),+], [$($b:expr),+], [$($c:expr),+], [$($d:expr),+]} => {
             #[simd_test(enable = "altivec")]
-            unsafe fn $name() {
-                let a: $la = transmute($sa::new($($a),+));
-                let b: $lbc = transmute($sbc::new($($b),+));
-                let c = transmute($sbc::new($($c),+));
+            fn $name() {
+                let a = $la::from($sa::new($($a),+));
+                let b = $lbc::from($sbc::new($($b),+));
+                let c = $sbc::new($($c),+).into();
                 let d = $sd::new($($d),+);
 
-                assert_eq!(d, transmute(vec_mladd(a, b, c)));
+                assert_eq!(d, $sd::from(unsafe { vec_mladd(a, b, c) }));
             }
         }
     }
@@ -6335,24 +6383,24 @@ unsafe fn $name() {
     test_vec_mladd! { test_vec_mladd_u16x8_u16x8, u16x8, vector_unsigned_short, u16x8, vector_unsigned_short, u16x8,
         [0, 1, 2, 3, 4, 5, 6, 7], [0, 1, 2, 3, 4, 5, 6, 7], [0, 1, 2, 3, 4, 5, 6, 7], [0, 2, 6, 12, 20, 30, 42, 56]
     }
-    test_vec_mladd! { test_vec_mladd_u16x8_i16x8, u16x8, vector_unsigned_short, i16x8, vector_unsigned_short, i16x8,
+    test_vec_mladd! { test_vec_mladd_u16x8_i16x8, u16x8, vector_unsigned_short, i16x8, vector_signed_short, i16x8,
         [0, 1, 2, 3, 4, 5, 6, 7], [0, 1, 2, 3, 4, 5, 6, 7], [0, 1, 2, 3, 4, 5, 6, 7], [0, 2, 6, 12, 20, 30, 42, 56]
     }
     test_vec_mladd! { test_vec_mladd_i16x8_u16x8, i16x8, vector_signed_short, u16x8, vector_unsigned_short, i16x8,
         [0, 1, 2, 3, 4, 5, 6, 7], [0, 1, 2, 3, 4, 5, 6, 7], [0, 1, 2, 3, 4, 5, 6, 7], [0, 2, 6, 12, 20, 30, 42, 56]
     }
-    test_vec_mladd! { test_vec_mladd_i16x8_i16x8, i16x8, vector_signed_short, i16x8, vector_unsigned_short, i16x8,
+    test_vec_mladd! { test_vec_mladd_i16x8_i16x8, i16x8, vector_signed_short, i16x8, vector_signed_short, i16x8,
         [0, 1, 2, 3, 4, 5, 6, 7], [0, 1, 2, 3, 4, 5, 6, 7], [0, 1, 2, 3, 4, 5, 6, 7], [0, 2, 6, 12, 20, 30, 42, 56]
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_msum_unsigned_char() {
-        let a: vector_unsigned_char =
-            transmute(u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7));
-        let b: vector_unsigned_char = transmute(u8x16::new(
+    fn test_vec_msum_unsigned_char() {
+        let a =
+            vector_unsigned_char::from(u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7));
+        let b = vector_unsigned_char::from(u8x16::new(
             255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255,
         ));
-        let c: vector_unsigned_int = transmute(u32x4::new(0, 1, 2, 3));
+        let c = vector_unsigned_int::from(u32x4::new(0, 1, 2, 3));
         let d = u32x4::new(
             (0 + 1 + 2 + 3) * 255 + 0,
             (4 + 5 + 6 + 7) * 255 + 1,
@@ -6360,17 +6408,17 @@ unsafe fn test_vec_msum_unsigned_char() {
             (4 + 5 + 6 + 7) * 255 + 3,
         );
 
-        assert_eq!(d, transmute(vec_msum(a, b, c)));
+        assert_eq!(d, u32x4::from(unsafe { vec_msum(a, b, c) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_msum_signed_char() {
-        let a: vector_signed_char = transmute(i8x16::new(
+    fn test_vec_msum_signed_char() {
+        let a = vector_signed_char::from(i8x16::new(
             0, -1, 2, -3, 1, -1, 1, -1, 0, 1, 2, 3, 4, -5, -6, -7,
         ));
-        let b: vector_unsigned_char =
-            transmute(i8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1));
-        let c: vector_signed_int = transmute(u32x4::new(0, 1, 2, 3));
+        let b =
+            vector_unsigned_char::from(u8x16::new(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1));
+        let c = vector_signed_int::from(i32x4::new(0, 1, 2, 3));
         let d = i32x4::new(
             (0 - 1 + 2 - 3) + 0,
             (0) + 1,
@@ -6378,11 +6426,12 @@ unsafe fn test_vec_msum_signed_char() {
             (4 - 5 - 6 - 7) + 3,
         );
 
-        assert_eq!(d, transmute(vec_msum(a, b, c)));
+        assert_eq!(d, i32x4::from(unsafe { vec_msum(a, b, c) }));
     }
+
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_msum_unsigned_short() {
-        let a: vector_unsigned_short = transmute(u16x8::new(
+    fn test_vec_msum_unsigned_short() {
+        let a = vector_unsigned_short::from(u16x8::new(
             0 * 256,
             1 * 256,
             2 * 256,
@@ -6392,9 +6441,8 @@ unsafe fn test_vec_msum_unsigned_short() {
             6 * 256,
             7 * 256,
         ));
-        let b: vector_unsigned_short =
-            transmute(u16x8::new(256, 256, 256, 256, 256, 256, 256, 256));
-        let c: vector_unsigned_int = transmute(u32x4::new(0, 1, 2, 3));
+        let b = vector_unsigned_short::from(u16x8::new(256, 256, 256, 256, 256, 256, 256, 256));
+        let c = vector_unsigned_int::from(u32x4::new(0, 1, 2, 3));
         let d = u32x4::new(
             (0 + 1) * 256 * 256 + 0,
             (2 + 3) * 256 * 256 + 1,
@@ -6402,12 +6450,12 @@ unsafe fn test_vec_msum_unsigned_short() {
             (6 + 7) * 256 * 256 + 3,
         );
 
-        assert_eq!(d, transmute(vec_msum(a, b, c)));
+        assert_eq!(d, u32x4::from(unsafe { vec_msum(a, b, c) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_msum_signed_short() {
-        let a: vector_signed_short = transmute(i16x8::new(
+    fn test_vec_msum_signed_short() {
+        let a = vector_signed_short::from(i16x8::new(
             0 * 256,
             -1 * 256,
             2 * 256,
@@ -6417,8 +6465,8 @@ unsafe fn test_vec_msum_signed_short() {
             6 * 256,
             -7 * 256,
         ));
-        let b: vector_signed_short = transmute(i16x8::new(256, 256, 256, 256, 256, 256, 256, 256));
-        let c: vector_signed_int = transmute(i32x4::new(0, 1, 2, 3));
+        let b = vector_signed_short::from(i16x8::new(256, 256, 256, 256, 256, 256, 256, 256));
+        let c = vector_signed_int::from(i32x4::new(0, 1, 2, 3));
         let d = i32x4::new(
             (0 - 1) * 256 * 256 + 0,
             (2 - 3) * 256 * 256 + 1,
@@ -6426,12 +6474,12 @@ unsafe fn test_vec_msum_signed_short() {
             (6 - 7) * 256 * 256 + 3,
         );
 
-        assert_eq!(d, transmute(vec_msum(a, b, c)));
+        assert_eq!(d, i32x4::from(unsafe { vec_msum(a, b, c) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_msums_unsigned() {
-        let a: vector_unsigned_short = transmute(u16x8::new(
+    fn test_vec_msums_unsigned() {
+        let a = vector_unsigned_short::from(u16x8::new(
             0 * 256,
             1 * 256,
             2 * 256,
@@ -6441,9 +6489,8 @@ unsafe fn test_vec_msums_unsigned() {
             6 * 256,
             7 * 256,
         ));
-        let b: vector_unsigned_short =
-            transmute(u16x8::new(256, 256, 256, 256, 256, 256, 256, 256));
-        let c: vector_unsigned_int = transmute(u32x4::new(0, 1, 2, 3));
+        let b = vector_unsigned_short::from(u16x8::new(256, 256, 256, 256, 256, 256, 256, 256));
+        let c = vector_unsigned_int::from(u32x4::new(0, 1, 2, 3));
         let d = u32x4::new(
             (0 + 1) * 256 * 256 + 0,
             (2 + 3) * 256 * 256 + 1,
@@ -6451,12 +6498,12 @@ unsafe fn test_vec_msums_unsigned() {
             (6 + 7) * 256 * 256 + 3,
         );
 
-        assert_eq!(d, transmute(vec_msums(a, b, c)));
+        assert_eq!(d, u32x4::from(unsafe { vec_msums(a, b, c) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_msums_signed() {
-        let a: vector_signed_short = transmute(i16x8::new(
+    fn test_vec_msums_signed() {
+        let a = vector_signed_short::from(i16x8::new(
             0 * 256,
             -1 * 256,
             2 * 256,
@@ -6466,8 +6513,8 @@ unsafe fn test_vec_msums_signed() {
             6 * 256,
             -7 * 256,
         ));
-        let b: vector_signed_short = transmute(i16x8::new(256, 256, 256, 256, 256, 256, 256, 256));
-        let c: vector_signed_int = transmute(i32x4::new(0, 1, 2, 3));
+        let b = vector_signed_short::from(i16x8::new(256, 256, 256, 256, 256, 256, 256, 256));
+        let c = vector_signed_int::from(i32x4::new(0, 1, 2, 3));
         let d = i32x4::new(
             (0 - 1) * 256 * 256 + 0,
             (2 - 3) * 256 * 256 + 1,
@@ -6475,23 +6522,23 @@ unsafe fn test_vec_msums_signed() {
             (6 - 7) * 256 * 256 + 3,
         );
 
-        assert_eq!(d, transmute(vec_msums(a, b, c)));
+        assert_eq!(d, i32x4::from(unsafe { vec_msums(a, b, c) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_sum2s() {
-        let a: vector_signed_int = transmute(i32x4::new(0, 1, 2, 3));
-        let b: vector_signed_int = transmute(i32x4::new(0, 1, 2, 3));
+    fn test_vec_sum2s() {
+        let a = vector_signed_int::from(i32x4::new(0, 1, 2, 3));
+        let b = vector_signed_int::from(i32x4::new(0, 1, 2, 3));
         let d = i32x4::new(0, 0 + 1 + 1, 0, 2 + 3 + 3);
 
-        assert_eq!(d, transmute(vec_sum2s(a, b)));
+        assert_eq!(d, i32x4::from(unsafe { vec_sum2s(a, b) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_sum4s_unsigned_char() {
-        let a: vector_unsigned_char =
-            transmute(u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7));
-        let b: vector_unsigned_int = transmute(u32x4::new(0, 1, 2, 3));
+    fn test_vec_sum4s_unsigned_char() {
+        let a =
+            vector_unsigned_char::from(u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7));
+        let b = vector_unsigned_int::from(u32x4::new(0, 1, 2, 3));
         let d = u32x4::new(
             0 + 1 + 2 + 3 + 0,
             4 + 5 + 6 + 7 + 1,
@@ -6499,13 +6546,13 @@ unsafe fn test_vec_sum4s_unsigned_char() {
             4 + 5 + 6 + 7 + 3,
         );
 
-        assert_eq!(d, transmute(vec_sum4s(a, b)));
+        assert_eq!(d, u32x4::from(unsafe { vec_sum4s(a, b) }));
     }
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_sum4s_signed_char() {
-        let a: vector_signed_char =
-            transmute(i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7));
-        let b: vector_signed_int = transmute(i32x4::new(0, 1, 2, 3));
+    fn test_vec_sum4s_signed_char() {
+        let a =
+            vector_signed_char::from(i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7));
+        let b = vector_signed_int::from(i32x4::new(0, 1, 2, 3));
         let d = i32x4::new(
             0 + 1 + 2 + 3 + 0,
             4 + 5 + 6 + 7 + 1,
@@ -6513,109 +6560,110 @@ unsafe fn test_vec_sum4s_signed_char() {
             4 + 5 + 6 + 7 + 3,
         );
 
-        assert_eq!(d, transmute(vec_sum4s(a, b)));
+        assert_eq!(d, i32x4::from(unsafe { vec_sum4s(a, b) }));
     }
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_sum4s_signed_short() {
-        let a: vector_signed_short = transmute(i16x8::new(0, 1, 2, 3, 4, 5, 6, 7));
-        let b: vector_signed_int = transmute(i32x4::new(0, 1, 2, 3));
+    fn test_vec_sum4s_signed_short() {
+        let a = vector_signed_short::from(i16x8::new(0, 1, 2, 3, 4, 5, 6, 7));
+        let b = vector_signed_int::from(i32x4::new(0, 1, 2, 3));
         let d = i32x4::new(0 + 1 + 0, 2 + 3 + 1, 4 + 5 + 2, 6 + 7 + 3);
 
-        assert_eq!(d, transmute(vec_sum4s(a, b)));
+        assert_eq!(d, i32x4::from(unsafe { vec_sum4s(a, b) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_mule_unsigned_char() {
-        let a: vector_unsigned_char =
-            transmute(u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7));
+    fn test_vec_mule_unsigned_char() {
+        let a =
+            vector_unsigned_char::from(u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7));
         let d = u16x8::new(0 * 0, 2 * 2, 4 * 4, 6 * 6, 0 * 0, 2 * 2, 4 * 4, 6 * 6);
 
-        assert_eq!(d, transmute(vec_mule(a, a)));
+        assert_eq!(d, u16x8::from(unsafe { vec_mule(a, a) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_mule_signed_char() {
-        let a: vector_signed_char = transmute(i8x16::new(
+    fn test_vec_mule_signed_char() {
+        let a = vector_signed_char::from(i8x16::new(
             0, 1, -2, 3, -4, 5, -6, 7, 0, 1, 2, 3, 4, 5, 6, 7,
         ));
         let d = i16x8::new(0 * 0, 2 * 2, 4 * 4, 6 * 6, 0 * 0, 2 * 2, 4 * 4, 6 * 6);
 
-        assert_eq!(d, transmute(vec_mule(a, a)));
+        assert_eq!(d, i16x8::from(unsafe { vec_mule(a, a) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_mule_unsigned_short() {
-        let a: vector_unsigned_short = transmute(u16x8::new(0, 1, 2, 3, 4, 5, 6, 7));
+    fn test_vec_mule_unsigned_short() {
+        let a = vector_unsigned_short::from(u16x8::new(0, 1, 2, 3, 4, 5, 6, 7));
         let d = u32x4::new(0 * 0, 2 * 2, 4 * 4, 6 * 6);
 
-        assert_eq!(d, transmute(vec_mule(a, a)));
+        assert_eq!(d, u32x4::from(unsafe { vec_mule(a, a) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_mule_signed_short() {
-        let a: vector_signed_short = transmute(i16x8::new(0, 1, -2, 3, -4, 5, -6, 7));
+    fn test_vec_mule_signed_short() {
+        let a = vector_signed_short::from(i16x8::new(0, 1, -2, 3, -4, 5, -6, 7));
         let d = i32x4::new(0 * 0, 2 * 2, 4 * 4, 6 * 6);
 
-        assert_eq!(d, transmute(vec_mule(a, a)));
+        assert_eq!(d, i32x4::from(unsafe { vec_mule(a, a) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_mulo_unsigned_char() {
-        let a: vector_unsigned_char =
-            transmute(u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7));
+    fn test_vec_mulo_unsigned_char() {
+        let a =
+            vector_unsigned_char::from(u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7));
         let d = u16x8::new(1 * 1, 3 * 3, 5 * 5, 7 * 7, 1 * 1, 3 * 3, 5 * 5, 7 * 7);
 
-        assert_eq!(d, transmute(vec_mulo(a, a)));
+        assert_eq!(d, u16x8::from(unsafe { vec_mulo(a, a) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_mulo_signed_char() {
-        let a: vector_signed_char = transmute(i8x16::new(
+    fn test_vec_mulo_signed_char() {
+        let a = vector_signed_char::from(i8x16::new(
             0, 1, -2, 3, -4, 5, -6, 7, 0, 1, 2, 3, 4, 5, 6, 7,
         ));
         let d = i16x8::new(1 * 1, 3 * 3, 5 * 5, 7 * 7, 1 * 1, 3 * 3, 5 * 5, 7 * 7);
 
-        assert_eq!(d, transmute(vec_mulo(a, a)));
+        assert_eq!(d, i16x8::from(unsafe { vec_mulo(a, a) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_mulo_unsigned_short() {
-        let a: vector_unsigned_short = transmute(u16x8::new(0, 1, 2, 3, 4, 5, 6, 7));
+    fn test_vec_mulo_unsigned_short() {
+        let a = vector_unsigned_short::from(u16x8::new(0, 1, 2, 3, 4, 5, 6, 7));
         let d = u32x4::new(1 * 1, 3 * 3, 5 * 5, 7 * 7);
 
-        assert_eq!(d, transmute(vec_mulo(a, a)));
+        assert_eq!(d, u32x4::from(unsafe { vec_mulo(a, a) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_mulo_signed_short() {
-        let a: vector_signed_short = transmute(i16x8::new(0, 1, -2, 3, -4, 5, -6, 7));
+    fn test_vec_mulo_signed_short() {
+        let a = vector_signed_short::from(i16x8::new(0, 1, -2, 3, -4, 5, -6, 7));
         let d = i32x4::new(1 * 1, 3 * 3, 5 * 5, 7 * 7);
 
-        assert_eq!(d, transmute(vec_mulo(a, a)));
+        assert_eq!(d, i32x4::from(unsafe { vec_mulo(a, a) }));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn vec_add_i32x4_i32x4() {
+    fn vec_add_i32x4_i32x4() {
         let x = i32x4::new(1, 2, 3, 4);
         let y = i32x4::new(4, 3, 2, 1);
-        let x: vector_signed_int = transmute(x);
-        let y: vector_signed_int = transmute(y);
-        let z = vec_add(x, y);
-        assert_eq!(i32x4::splat(5), transmute(z));
+        let x = vector_signed_int::from(x);
+        let y = vector_signed_int::from(y);
+        let z = unsafe { vec_add(x, y) };
+        assert_eq!(i32x4::splat(5), i32x4::from(z));
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn vec_ctf_u32() {
-        let v: vector_unsigned_int = transmute(u32x4::new(u32::MIN, u32::MAX, u32::MAX, 42));
-        let v2 = vec_ctf::<1, _>(v);
-        let r2: vector_float = transmute(f32x4::new(0.0, 2147483600.0, 2147483600.0, 21.0));
-        let v4 = vec_ctf::<2, _>(v);
-        let r4: vector_float = transmute(f32x4::new(0.0, 1073741800.0, 1073741800.0, 10.5));
-        let v8 = vec_ctf::<3, _>(v);
-        let r8: vector_float = transmute(f32x4::new(0.0, 536870900.0, 536870900.0, 5.25));
+    fn vec_ctf_u32() {
+        let v = vector_unsigned_int::from(u32x4::new(u32::MIN, u32::MAX, u32::MAX, 42));
+        let v2 = unsafe { vec_ctf::<1, _>(v) };
+        let r2 = vector_float::from(f32x4::new(0.0, 2147483600.0, 2147483600.0, 21.0));
+        let v4 = unsafe { vec_ctf::<2, _>(v) };
+        let r4 = vector_float::from(f32x4::new(0.0, 1073741800.0, 1073741800.0, 10.5));
+        let v8 = unsafe { vec_ctf::<3, _>(v) };
+        let r8 = vector_float::from(f32x4::new(0.0, 536870900.0, 536870900.0, 5.25));
 
         let check = |a, b| {
-            let r = transmute(vec_cmple(vec_abs(vec_sub(a, b)), vec_splats(f32::EPSILON)));
+            let r =
+                m32x4::from(unsafe { vec_cmple(vec_abs(vec_sub(a, b)), vec_splats(f32::EPSILON)) });
             let e = m32x4::new(true, true, true, true);
             assert_eq!(e, r);
         };
@@ -6626,26 +6674,32 @@ unsafe fn vec_ctf_u32() {
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_ctu() {
+    fn test_vec_ctu() {
         let v = u32x4::new(u32::MIN, u32::MAX, u32::MAX, 42);
-        let v2: u32x4 = transmute(vec_ctu::<1>(transmute(f32x4::new(
-            0.0,
-            2147483600.0,
-            2147483600.0,
-            21.0,
-        ))));
-        let v4: u32x4 = transmute(vec_ctu::<2>(transmute(f32x4::new(
-            0.0,
-            1073741800.0,
-            1073741800.0,
-            10.5,
-        ))));
-        let v8: u32x4 = transmute(vec_ctu::<3>(transmute(f32x4::new(
-            0.0,
-            536870900.0,
-            536870900.0,
-            5.25,
-        ))));
+        let v2 = u32x4::from(unsafe {
+            vec_ctu::<1>(vector_float::from(f32x4::new(
+                0.0,
+                2147483600.0,
+                2147483600.0,
+                21.0,
+            )))
+        });
+        let v4 = u32x4::from(unsafe {
+            vec_ctu::<2>(vector_float::from(f32x4::new(
+                0.0,
+                1073741800.0,
+                1073741800.0,
+                10.5,
+            )))
+        });
+        let v8 = u32x4::from(unsafe {
+            vec_ctu::<3>(vector_float::from(f32x4::new(
+                0.0,
+                536870900.0,
+                536870900.0,
+                5.25,
+            )))
+        });
 
         assert_eq!(v2, v);
         assert_eq!(v4, v);
@@ -6653,18 +6707,18 @@ unsafe fn test_vec_ctu() {
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn vec_ctf_i32() {
-        let v: vector_signed_int = transmute(i32x4::new(i32::MIN, i32::MAX, i32::MAX - 42, 42));
-        let v2 = vec_ctf::<1, _>(v);
-        let r2: vector_float =
-            transmute(f32x4::new(-1073741800.0, 1073741800.0, 1073741800.0, 21.0));
-        let v4 = vec_ctf::<2, _>(v);
-        let r4: vector_float = transmute(f32x4::new(-536870900.0, 536870900.0, 536870900.0, 10.5));
-        let v8 = vec_ctf::<3, _>(v);
-        let r8: vector_float = transmute(f32x4::new(-268435460.0, 268435460.0, 268435460.0, 5.25));
+    fn vec_ctf_i32() {
+        let v = vector_signed_int::from(i32x4::new(i32::MIN, i32::MAX, i32::MAX - 42, 42));
+        let v2 = unsafe { vec_ctf::<1, _>(v) };
+        let r2 = vector_float::from(f32x4::new(-1073741800.0, 1073741800.0, 1073741800.0, 21.0));
+        let v4 = unsafe { vec_ctf::<2, _>(v) };
+        let r4 = vector_float::from(f32x4::new(-536870900.0, 536870900.0, 536870900.0, 10.5));
+        let v8 = unsafe { vec_ctf::<3, _>(v) };
+        let r8 = vector_float::from(f32x4::new(-268435460.0, 268435460.0, 268435460.0, 5.25));
 
         let check = |a, b| {
-            let r = transmute(vec_cmple(vec_abs(vec_sub(a, b)), vec_splats(f32::EPSILON)));
+            let r =
+                m32x4::from(unsafe { vec_cmple(vec_abs(vec_sub(a, b)), vec_splats(f32::EPSILON)) });
             println!("{:?} {:?}", a, b);
             let e = m32x4::new(true, true, true, true);
             assert_eq!(e, r);
@@ -6676,26 +6730,32 @@ unsafe fn vec_ctf_i32() {
     }
 
     #[simd_test(enable = "altivec")]
-    unsafe fn test_vec_cts() {
+    fn test_vec_cts() {
         let v = i32x4::new(i32::MIN, i32::MAX, i32::MAX, 42);
-        let v2: i32x4 = transmute(vec_cts::<1>(transmute(f32x4::new(
-            -1073741800.0,
-            1073741800.0,
-            1073741800.0,
-            21.0,
-        ))));
-        let v4: i32x4 = transmute(vec_cts::<2>(transmute(f32x4::new(
-            -536870900.0,
-            536870900.0,
-            536870900.0,
-            10.5,
-        ))));
-        let v8: i32x4 = transmute(vec_cts::<3>(transmute(f32x4::new(
-            -268435460.0,
-            268435460.0,
-            268435460.0,
-            5.25,
-        ))));
+        let v2 = i32x4::from(unsafe {
+            vec_cts::<1>(transmute(f32x4::new(
+                -1073741800.0,
+                1073741800.0,
+                1073741800.0,
+                21.0,
+            )))
+        });
+        let v4 = i32x4::from(unsafe {
+            vec_cts::<2>(transmute(f32x4::new(
+                -536870900.0,
+                536870900.0,
+                536870900.0,
+                10.5,
+            )))
+        });
+        let v8 = i32x4::from(unsafe {
+            vec_cts::<3>(transmute(f32x4::new(
+                -268435460.0,
+                268435460.0,
+                268435460.0,
+                5.25,
+            )))
+        });
 
         assert_eq!(v2, v);
         assert_eq!(v4, v);

library/stdarch/crates/core_arch/src/powerpc/vsx.rs

@@ -9,6 +9,7 @@
 #![allow(non_camel_case_types)]
 
 use crate::core_arch::powerpc::*;
+use crate::core_arch::simd::*;
 
 #[cfg(test)]
 use stdarch_test::assert_instr;
@@ -34,6 +35,22 @@
     // pub struct vector_unsigned___int128 = i128x1;
 }
 
+#[unstable(feature = "stdarch_powerpc", issue = "111145")]
+impl From<m64x2> for vector_bool_long {
+    #[inline]
+    fn from(value: m64x2) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
+#[unstable(feature = "stdarch_powerpc", issue = "111145")]
+impl From<vector_bool_long> for m64x2 {
+    #[inline]
+    fn from(value: vector_bool_long) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
 #[allow(improper_ctypes)]
 unsafe extern "C" {
     #[link_name = "llvm.ppc.altivec.vperm"]
@@ -46,7 +63,6 @@ fn vperm(
 
 mod sealed {
     use super::*;
-    use crate::core_arch::simd::*;
 
     #[unstable(feature = "stdarch_powerpc", issue = "111145")]
     pub trait VectorPermDI {
@@ -221,14 +237,16 @@ mod tests {
     macro_rules! test_vec_xxpermdi {
         {$name:ident, $shorttype:ident, $longtype:ident, [$($a:expr),+], [$($b:expr),+], [$($c:expr),+], [$($d:expr),+]} => {
             #[simd_test(enable = "vsx")]
-            unsafe fn $name() {
-                let a: $longtype = transmute($shorttype::new($($a),+, $($b),+));
-                let b = transmute($shorttype::new($($c),+, $($d),+));
+            fn $name() {
+                let a = $longtype::from($shorttype::new($($a),+, $($b),+));
+                let b = $longtype::from($shorttype::new($($c),+, $($d),+));
 
-                assert_eq!($shorttype::new($($a),+, $($c),+), transmute(vec_xxpermdi::<_, 0>(a, b)));
-                assert_eq!($shorttype::new($($b),+, $($c),+), transmute(vec_xxpermdi::<_, 1>(a, b)));
-                assert_eq!($shorttype::new($($a),+, $($d),+), transmute(vec_xxpermdi::<_, 2>(a, b)));
-                assert_eq!($shorttype::new($($b),+, $($d),+), transmute(vec_xxpermdi::<_, 3>(a, b)));
+                unsafe {
+                    assert_eq!($shorttype::new($($a),+, $($c),+), $shorttype::from(vec_xxpermdi::<_, 0>(a, b)));
+                    assert_eq!($shorttype::new($($b),+, $($c),+), $shorttype::from(vec_xxpermdi::<_, 1>(a, b)));
+                    assert_eq!($shorttype::new($($a),+, $($d),+), $shorttype::from(vec_xxpermdi::<_, 2>(a, b)));
+                    assert_eq!($shorttype::new($($b),+, $($d),+), $shorttype::from(vec_xxpermdi::<_, 3>(a, b)));
+                }
             }
         }
     }

library/stdarch/crates/core_arch/src/s390x/mod.rs

@@ -2,6 +2,11 @@
 
 pub(crate) mod macros;
 
+/// the float and vector registers overlap therefore we cannot use any vector
+/// extensions if softfloat is enabled.
+
+#[cfg(not(target_abi = "softfloat"))]
 mod vector;
+#[cfg(not(target_abi = "softfloat"))]
 #[unstable(feature = "stdarch_s390x", issue = "130869")]
 pub use self::vector::*;

library/stdarch/crates/core_arch/src/s390x/vector.rs

@@ -51,6 +51,54 @@
     pub struct vector_double(2 x f64);
 }
 
+#[unstable(feature = "stdarch_s390x", issue = "135681")]
+impl From<m8x16> for vector_bool_char {
+    #[inline]
+    fn from(value: m8x16) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
+#[unstable(feature = "stdarch_s390x", issue = "135681")]
+impl From<vector_bool_char> for m8x16 {
+    #[inline]
+    fn from(value: vector_bool_char) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
+#[unstable(feature = "stdarch_s390x", issue = "135681")]
+impl From<m16x8> for vector_bool_short {
+    #[inline]
+    fn from(value: m16x8) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
+#[unstable(feature = "stdarch_s390x", issue = "135681")]
+impl From<vector_bool_short> for m16x8 {
+    #[inline]
+    fn from(value: vector_bool_short) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
+#[unstable(feature = "stdarch_s390x", issue = "135681")]
+impl From<m32x4> for vector_bool_int {
+    #[inline]
+    fn from(value: m32x4) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
+#[unstable(feature = "stdarch_s390x", issue = "135681")]
+impl From<vector_bool_int> for m32x4 {
+    #[inline]
+    fn from(value: vector_bool_int) -> Self {
+        unsafe { transmute(value) }
+    }
+}
+
 #[repr(C, packed)]
 struct PackedTuple<T, U> {
     x: T,
@@ -6051,27 +6099,16 @@ fn test_genmasks() {
     }
 
     macro_rules! test_vec_1 {
-        { $name: ident, $fn:ident, f32x4, [$($a:expr),+], ~[$($d:expr),+] } => {
-            #[simd_test(enable = "vector")]
-            unsafe fn $name() {
-                let a: vector_float = transmute(f32x4::new($($a),+));
-
-                let d: vector_float = transmute(f32x4::new($($d),+));
-                let r = transmute(vec_cmple(vec_abs(vec_sub($fn(a), d)), vec_splats(f32::EPSILON)));
-                let e = m32x4::new(true, true, true, true);
-                assert_eq!(e, r);
-            }
-        };
         { $name: ident, $fn:ident, $ty: ident, [$($a:expr),+], [$($d:expr),+] } => {
             test_vec_1! { $name, $fn, $ty -> $ty, [$($a),+], [$($d),+] }
         };
         { $name: ident, $fn:ident, $ty: ident -> $ty_out: ident, [$($a:expr),+], [$($d:expr),+] } => {
             #[simd_test(enable = "vector")]
-            unsafe fn $name() {
-                let a: s_t_l!($ty) = transmute($ty::new($($a),+));
+            fn $name() {
+                let a: s_t_l!($ty) = $ty::new($($a),+).into();
 
                 let d = $ty_out::new($($d),+);
-                let r : $ty_out = transmute($fn(a));
+                let r = $ty_out::from(unsafe { $fn(a) });
                 assert_eq!(d, r);
             }
         }
@@ -6086,35 +6123,23 @@ macro_rules! test_vec_2 {
          };
         { $name: ident, $fn:ident, $ty1: ident, $ty2: ident -> $ty_out: ident, [$($a:expr),+], [$($b:expr),+], [$($d:expr),+] } => {
             #[simd_test(enable = "vector")]
-            unsafe fn $name() {
-                let a: s_t_l!($ty1) = transmute($ty1::new($($a),+));
-                let b: s_t_l!($ty2) = transmute($ty2::new($($b),+));
+            fn $name() {
+                let a: s_t_l!($ty1) = $ty1::new($($a),+).into();
+                let b: s_t_l!($ty2) = $ty2::new($($b),+).into();
 
                 let d = $ty_out::new($($d),+);
-                let r : $ty_out = transmute($fn(a, b));
+                let r = $ty_out::from(unsafe { $fn(a, b) });
                 assert_eq!(d, r);
             }
          };
-         { $name: ident, $fn:ident, $ty: ident -> $ty_out: ident, [$($a:expr),+], [$($b:expr),+], $d:expr } => {
-            #[simd_test(enable = "vector")]
-            unsafe fn $name() {
-                let a: s_t_l!($ty) = transmute($ty::new($($a),+));
-                let b: s_t_l!($ty) = transmute($ty::new($($b),+));
-
-                let r : $ty_out = transmute($fn(a, b));
-                assert_eq!($d, r);
-            }
-         }
    }
 
     #[simd_test(enable = "vector")]
-    unsafe fn vec_add_i32x4_i32x4() {
-        let x = i32x4::new(1, 2, 3, 4);
-        let y = i32x4::new(4, 3, 2, 1);
-        let x: vector_signed_int = transmute(x);
-        let y: vector_signed_int = transmute(y);
-        let z = vec_add(x, y);
-        assert_eq!(i32x4::splat(5), transmute(z));
+    fn vec_add_i32x4_i32x4() {
+        let x = vector_signed_int::from(i32x4::new(1, 2, 3, 4));
+        let y = vector_signed_int::from(i32x4::new(4, 3, 2, 1));
+        let z = unsafe { vec_add(x, y) };
+        assert_eq!(i32x4::splat(5), i32x4::from(z));
     }
 
     macro_rules! test_vec_sub {
@@ -6232,11 +6257,11 @@ macro_rules! test_vec_mul {
     macro_rules! test_vec_abs {
         { $name: ident, $ty: ident, $a: expr, $d: expr } => {
             #[simd_test(enable = "vector")]
-            unsafe fn $name() {
-                let a: s_t_l!($ty) = vec_splats($a);
-                let a: s_t_l!($ty) = vec_abs(a);
+            fn $name() {
+                let a: s_t_l!($ty) = unsafe { vec_splats($a) };
+                let a: s_t_l!($ty) = unsafe { vec_abs(a) };
                 let d = $ty::splat($d);
-                assert_eq!(d, transmute(a));
+                assert_eq!(d, $ty::from(a));
             }
         }
     }
@@ -6386,7 +6411,7 @@ unsafe fn $name() {
     [0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 3, 0, 0, 0, 16],
     [4, 2, 1, 8] }
 
-    test_vec_2! { test_vec_sral_pos, vec_sral, u32x4, u8x16 -> i32x4,
+    test_vec_2! { test_vec_sral_pos, vec_sral, u32x4, u8x16 -> u32x4,
     [0b1000, 0b1000, 0b1000, 0b1000],
     [0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 3, 0, 0, 0, 16],
     [4, 2, 1, 8] }
@@ -6423,13 +6448,13 @@ macro_rules! test_vec_perm {
          $shorttype:ident, $longtype:ident,
          [$($a:expr),+], [$($b:expr),+], [$($c:expr),+], [$($d:expr),+]} => {
             #[simd_test(enable = "vector")]
-            unsafe fn $name() {
-                let a: $longtype = transmute($shorttype::new($($a),+));
-                let b: $longtype = transmute($shorttype::new($($b),+));
-                let c: vector_unsigned_char = transmute(u8x16::new($($c),+));
+            fn $name() {
+                let a = $longtype::from($shorttype::new($($a),+));
+                let b = $longtype::from($shorttype::new($($b),+));
+                let c = vector_unsigned_char::from(u8x16::new($($c),+));
                 let d = $shorttype::new($($d),+);
 
-                let r: $shorttype = transmute(vec_perm(a, b, c));
+                let r = $shorttype::from(unsafe { vec_perm(a, b, c) });
                 assert_eq!(d, r);
             }
         }
@@ -6512,46 +6537,46 @@ unsafe fn $name() {
     [core::f32::consts::PI, 1.0, 25.0, 2.0],
     [core::f32::consts::PI.sqrt(), 1.0, 5.0, core::f32::consts::SQRT_2] }
 
-    test_vec_2! { test_vec_find_any_eq, vec_find_any_eq, i32x4, i32x4 -> u32x4,
+    test_vec_2! { test_vec_find_any_eq, vec_find_any_eq, i32x4, i32x4 -> i32x4,
         [1, -2, 3, -4],
         [-5, 3, -7, 8],
-        [0, 0, 0xFFFFFFFF, 0]
+        [0, 0, !0, 0]
     }
 
-    test_vec_2! { test_vec_find_any_ne, vec_find_any_ne, i32x4, i32x4 -> u32x4,
+    test_vec_2! { test_vec_find_any_ne, vec_find_any_ne, i32x4, i32x4 -> i32x4,
         [1, -2, 3, -4],
         [-5, 3, -7, 8],
-        [0xFFFFFFFF, 0xFFFFFFFF, 0, 0xFFFFFFFF]
+        [!0, !0, 0, !0]
     }
 
-    test_vec_2! { test_vec_find_any_eq_idx_1, vec_find_any_eq_idx, i32x4, i32x4 -> u32x4,
+    test_vec_2! { test_vec_find_any_eq_idx_1, vec_find_any_eq_idx, i32x4, i32x4 -> i32x4,
         [1, 2, 3, 4],
         [5, 3, 7, 8],
         [0, 8, 0, 0]
     }
-    test_vec_2! { test_vec_find_any_eq_idx_2, vec_find_any_eq_idx, i32x4, i32x4 -> u32x4,
+    test_vec_2! { test_vec_find_any_eq_idx_2, vec_find_any_eq_idx, i32x4, i32x4 -> i32x4,
         [1, 2, 3, 4],
         [5, 6, 7, 8],
         [0, 16, 0, 0]
     }
 
-    test_vec_2! { test_vec_find_any_ne_idx_1, vec_find_any_ne_idx, i32x4, i32x4 -> u32x4,
+    test_vec_2! { test_vec_find_any_ne_idx_1, vec_find_any_ne_idx, i32x4, i32x4 -> i32x4,
         [1, 2, 3, 4],
         [1, 5, 3, 4],
         [0, 4, 0, 0]
     }
-    test_vec_2! { test_vec_find_any_ne_idx_2, vec_find_any_ne_idx, i32x4, i32x4 -> u32x4,
+    test_vec_2! { test_vec_find_any_ne_idx_2, vec_find_any_ne_idx, i32x4, i32x4 -> i32x4,
         [1, 2, 3, 4],
         [1, 2, 3, 4],
         [0, 16, 0, 0]
     }
 
-    test_vec_2! { test_vec_find_any_eq_or_0_idx_1, vec_find_any_eq_or_0_idx, i32x4, i32x4 -> u32x4,
+    test_vec_2! { test_vec_find_any_eq_or_0_idx_1, vec_find_any_eq_or_0_idx, i32x4, i32x4 -> i32x4,
         [1, 2, 0, 4],
         [5, 6, 7, 8],
         [0, 8, 0, 0]
     }
-    test_vec_2! { test_vec_find_any_ne_or_0_idx_1, vec_find_any_ne_or_0_idx, i32x4, i32x4 -> u32x4,
+    test_vec_2! { test_vec_find_any_ne_or_0_idx_1, vec_find_any_ne_or_0_idx, i32x4, i32x4 -> i32x4,
         [1, 2, 0, 4],
         [1, 2, 3, 4],
         [0, 8, 0, 0]

library/stdarch/crates/core_arch/src/wasm32/simd128.rs

@@ -86,10 +86,6 @@ pub(crate) const fn v128(self) -> v128 {
     fn llvm_i8x16_all_true(x: simd::i8x16) -> i32;
     #[link_name = "llvm.wasm.bitmask.v16i8"]
     fn llvm_bitmask_i8x16(a: simd::i8x16) -> i32;
-    #[link_name = "llvm.wasm.narrow.signed.v16i8.v8i16"]
-    fn llvm_narrow_i8x16_s(a: simd::i16x8, b: simd::i16x8) -> simd::i8x16;
-    #[link_name = "llvm.wasm.narrow.unsigned.v16i8.v8i16"]
-    fn llvm_narrow_i8x16_u(a: simd::i16x8, b: simd::i16x8) -> simd::i8x16;
     #[link_name = "llvm.wasm.avgr.unsigned.v16i8"]
     fn llvm_avgr_u_i8x16(a: simd::i8x16, b: simd::i8x16) -> simd::i8x16;
 
@@ -103,10 +99,6 @@ pub(crate) const fn v128(self) -> v128 {
     fn llvm_i16x8_all_true(x: simd::i16x8) -> i32;
     #[link_name = "llvm.wasm.bitmask.v8i16"]
     fn llvm_bitmask_i16x8(a: simd::i16x8) -> i32;
-    #[link_name = "llvm.wasm.narrow.signed.v8i16.v4i32"]
-    fn llvm_narrow_i16x8_s(a: simd::i32x4, b: simd::i32x4) -> simd::i16x8;
-    #[link_name = "llvm.wasm.narrow.unsigned.v8i16.v4i32"]
-    fn llvm_narrow_i16x8_u(a: simd::i32x4, b: simd::i32x4) -> simd::i16x8;
     #[link_name = "llvm.wasm.avgr.unsigned.v8i16"]
     fn llvm_avgr_u_i16x8(a: simd::i16x8, b: simd::i16x8) -> simd::i16x8;
 
@@ -2281,7 +2273,23 @@ pub fn i8x16_bitmask(a: v128) -> u16 {
 #[doc(alias("i8x16.narrow_i16x8_s"))]
 #[stable(feature = "wasm_simd", since = "1.54.0")]
 pub fn i8x16_narrow_i16x8(a: v128, b: v128) -> v128 {
-    unsafe { llvm_narrow_i8x16_s(a.as_i16x8(), b.as_i16x8()).v128() }
+    unsafe {
+        let v: simd::i16x16 = simd_shuffle!(
+            a.as_i16x8(),
+            b.as_i16x8(),
+            [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        );
+
+        let max = simd_splat(i16::from(i8::MAX));
+        let min = simd_splat(i16::from(i8::MIN));
+
+        let v = simd_select(simd_gt::<_, simd::i16x16>(v, max), max, v);
+        let v = simd_select(simd_lt::<_, simd::i16x16>(v, min), min, v);
+
+        let v: simd::i8x16 = simd_cast(v);
+
+        v.v128()
+    }
 }
 
 /// Converts two input vectors into a smaller lane vector by narrowing each
@@ -2295,7 +2303,23 @@ pub fn i8x16_narrow_i16x8(a: v128, b: v128) -> v128 {
 #[doc(alias("i8x16.narrow_i16x8_u"))]
 #[stable(feature = "wasm_simd", since = "1.54.0")]
 pub fn u8x16_narrow_i16x8(a: v128, b: v128) -> v128 {
-    unsafe { llvm_narrow_i8x16_u(a.as_i16x8(), b.as_i16x8()).v128() }
+    unsafe {
+        let v: simd::i16x16 = simd_shuffle!(
+            a.as_i16x8(),
+            b.as_i16x8(),
+            [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        );
+
+        let max = simd_splat(i16::from(u8::MAX));
+        let min = simd_splat(i16::from(u8::MIN));
+
+        let v = simd_select(simd_gt::<_, simd::i16x16>(v, max), max, v);
+        let v = simd_select(simd_lt::<_, simd::i16x16>(v, min), min, v);
+
+        let v: simd::u8x16 = simd_cast(v);
+
+        v.v128()
+    }
 }
 
 /// Shifts each lane to the left by the specified number of bits.
@@ -2593,7 +2617,19 @@ pub fn i16x8_bitmask(a: v128) -> u8 {
 #[doc(alias("i16x8.narrow_i32x4_s"))]
 #[stable(feature = "wasm_simd", since = "1.54.0")]
 pub fn i16x8_narrow_i32x4(a: v128, b: v128) -> v128 {
-    unsafe { llvm_narrow_i16x8_s(a.as_i32x4(), b.as_i32x4()).v128() }
+    unsafe {
+        let v: simd::i32x8 = simd_shuffle!(a, b, [0, 1, 2, 3, 4, 5, 6, 7]);
+
+        let max = simd_splat(i32::from(i16::MAX));
+        let min = simd_splat(i32::from(i16::MIN));
+
+        let v = simd_select(simd_gt::<_, simd::i32x8>(v, max), max, v);
+        let v = simd_select(simd_lt::<_, simd::i32x8>(v, min), min, v);
+
+        let v: simd::i16x8 = simd_cast(v);
+
+        v.v128()
+    }
 }
 
 /// Converts two input vectors into a smaller lane vector by narrowing each
@@ -2607,7 +2643,19 @@ pub fn i16x8_narrow_i32x4(a: v128, b: v128) -> v128 {
 #[doc(alias("i16x8.narrow_i32x4_u"))]
 #[stable(feature = "wasm_simd", since = "1.54.0")]
 pub fn u16x8_narrow_i32x4(a: v128, b: v128) -> v128 {
-    unsafe { llvm_narrow_i16x8_u(a.as_i32x4(), b.as_i32x4()).v128() }
+    unsafe {
+        let v: simd::i32x8 = simd_shuffle!(a, b, [0, 1, 2, 3, 4, 5, 6, 7]);
+
+        let max = simd_splat(i32::from(u16::MAX));
+        let min = simd_splat(i32::from(u16::MIN));
+
+        let v = simd_select(simd_gt::<_, simd::i32x8>(v, max), max, v);
+        let v = simd_select(simd_lt::<_, simd::i32x8>(v, min), min, v);
+
+        let v: simd::u16x8 = simd_cast(v);
+
+        v.v128()
+    }
 }
 
 /// Converts low half of the smaller lane vector to a larger lane

library/stdarch/crates/core_arch/src/x86/avx.rs

@@ -2426,7 +2426,6 @@ pub const fn _mm256_setzero_si256() -> __m256i {
 #[inline]
 #[target_feature(enable = "avx")]
 // This intrinsic has no corresponding instruction.
-#[cfg_attr(test, assert_instr(vinsertf128))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 #[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
 pub const fn _mm256_set_pd(a: f64, b: f64, c: f64, d: f64) -> __m256d {

library/stdarch/crates/core_arch/src/x86/avx2.rs

@@ -991,7 +991,21 @@ pub const fn _mm256_hadd_epi32(a: __m256i, b: __m256i) -> __m256i {
 #[cfg_attr(test, assert_instr(vphaddsw))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub fn _mm256_hadds_epi16(a: __m256i, b: __m256i) -> __m256i {
-    unsafe { transmute(phaddsw(a.as_i16x16(), b.as_i16x16())) }
+    let a = a.as_i16x16();
+    let b = b.as_i16x16();
+    unsafe {
+        let even: i16x16 = simd_shuffle!(
+            a,
+            b,
+            [0, 2, 4, 6, 16, 18, 20, 22, 8, 10, 12, 14, 24, 26, 28, 30]
+        );
+        let odd: i16x16 = simd_shuffle!(
+            a,
+            b,
+            [1, 3, 5, 7, 17, 19, 21, 23, 9, 11, 13, 15, 25, 27, 29, 31]
+        );
+        simd_saturating_add(even, odd).as_m256i()
+    }
 }
 
 /// Horizontally subtract adjacent pairs of 16-bit integers in `a` and `b`.
@@ -1047,7 +1061,21 @@ pub const fn _mm256_hsub_epi32(a: __m256i, b: __m256i) -> __m256i {
 #[cfg_attr(test, assert_instr(vphsubsw))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub fn _mm256_hsubs_epi16(a: __m256i, b: __m256i) -> __m256i {
-    unsafe { transmute(phsubsw(a.as_i16x16(), b.as_i16x16())) }
+    let a = a.as_i16x16();
+    let b = b.as_i16x16();
+    unsafe {
+        let even: i16x16 = simd_shuffle!(
+            a,
+            b,
+            [0, 2, 4, 6, 16, 18, 20, 22, 8, 10, 12, 14, 24, 26, 28, 30]
+        );
+        let odd: i16x16 = simd_shuffle!(
+            a,
+            b,
+            [1, 3, 5, 7, 17, 19, 21, 23, 9, 11, 13, 15, 25, 27, 29, 31]
+        );
+        simd_saturating_sub(even, odd).as_m256i()
+    }
 }
 
 /// Returns values from `slice` at offsets determined by `offsets * scale`,
@@ -3791,10 +3819,6 @@ pub const fn _mm256_extract_epi16<const INDEX: i32>(a: __m256i) -> i32 {
 
 #[allow(improper_ctypes)]
 unsafe extern "C" {
-    #[link_name = "llvm.x86.avx2.phadd.sw"]
-    fn phaddsw(a: i16x16, b: i16x16) -> i16x16;
-    #[link_name = "llvm.x86.avx2.phsub.sw"]
-    fn phsubsw(a: i16x16, b: i16x16) -> i16x16;
     #[link_name = "llvm.x86.avx2.pmadd.wd"]
     fn pmaddwd(a: i16x16, b: i16x16) -> i32x8;
     #[link_name = "llvm.x86.avx2.pmadd.ub.sw"]
@@ -4653,6 +4677,26 @@ fn test_mm256_madd_epi16() {
         assert_eq_m256i(r, e);
     }
 
+    #[target_feature(enable = "avx2")]
+    #[cfg_attr(test, assert_instr(vpmaddwd))]
+    unsafe fn test_mm256_madd_epi16_mul_one(v: __m256i) -> __m256i {
+        // This is a trick used in the adler32 algorithm to get a widening addition. The
+        // multiplication by 1 is trivial, but must not be optimized out because then the vpmaddwd
+        // instruction is no longer selected. The assert_instr verifies that this is the case.
+        let one_v = _mm256_set1_epi16(1);
+        _mm256_madd_epi16(v, one_v)
+    }
+
+    #[target_feature(enable = "avx2")]
+    #[cfg_attr(test, assert_instr(vpmaddwd))]
+    unsafe fn test_mm256_madd_epi16_shl(v: __m256i) -> __m256i {
+        // This is a trick used in the base64 algorithm to get a widening addition. Instead of a
+        // multiplication, a vector shl is used. In LLVM 22 that breaks the pattern recognition
+        // for the automatic optimization to vpmaddwd.
+        let shift_value = _mm256_set1_epi32(12i32);
+        _mm256_madd_epi16(v, shift_value)
+    }
+
     #[simd_test(enable = "avx2")]
     const fn test_mm256_inserti128_si256() {
         let a = _mm256_setr_epi64x(1, 2, 3, 4);

library/stdarch/crates/core_arch/src/x86/sse.rs

@@ -968,7 +968,7 @@ pub const fn _mm_set_ps1(a: f32) -> __m128 {
 /// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_set_ps)
 #[inline]
 #[target_feature(enable = "sse")]
-#[cfg_attr(test, assert_instr(unpcklps))]
+// This intrinsic has no corresponding instruction.
 #[stable(feature = "simd_x86", since = "1.27.0")]
 #[rustc_const_unstable(feature = "stdarch_const_x86", issue = "149298")]
 pub const fn _mm_set_ps(a: f32, b: f32, c: f32, d: f32) -> __m128 {

library/stdarch/crates/core_arch/src/x86/ssse3.rs

@@ -188,7 +188,13 @@ pub const fn _mm_hadd_epi16(a: __m128i, b: __m128i) -> __m128i {
 #[cfg_attr(test, assert_instr(phaddsw))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub fn _mm_hadds_epi16(a: __m128i, b: __m128i) -> __m128i {
-    unsafe { transmute(phaddsw128(a.as_i16x8(), b.as_i16x8())) }
+    let a = a.as_i16x8();
+    let b = b.as_i16x8();
+    unsafe {
+        let even: i16x8 = simd_shuffle!(a, b, [0, 2, 4, 6, 8, 10, 12, 14]);
+        let odd: i16x8 = simd_shuffle!(a, b, [1, 3, 5, 7, 9, 11, 13, 15]);
+        simd_saturating_add(even, odd).as_m128i()
+    }
 }
 
 /// Horizontally adds the adjacent pairs of values contained in 2 packed
@@ -240,7 +246,13 @@ pub const fn _mm_hsub_epi16(a: __m128i, b: __m128i) -> __m128i {
 #[cfg_attr(test, assert_instr(phsubsw))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
 pub fn _mm_hsubs_epi16(a: __m128i, b: __m128i) -> __m128i {
-    unsafe { transmute(phsubsw128(a.as_i16x8(), b.as_i16x8())) }
+    let a = a.as_i16x8();
+    let b = b.as_i16x8();
+    unsafe {
+        let even: i16x8 = simd_shuffle!(a, b, [0, 2, 4, 6, 8, 10, 12, 14]);
+        let odd: i16x8 = simd_shuffle!(a, b, [1, 3, 5, 7, 9, 11, 13, 15]);
+        simd_saturating_sub(even, odd).as_m128i()
+    }
 }
 
 /// Horizontally subtract the adjacent pairs of values contained in 2
@@ -337,12 +349,6 @@ pub fn _mm_sign_epi32(a: __m128i, b: __m128i) -> __m128i {
     #[link_name = "llvm.x86.ssse3.pshuf.b.128"]
     fn pshufb128(a: u8x16, b: u8x16) -> u8x16;
 
-    #[link_name = "llvm.x86.ssse3.phadd.sw.128"]
-    fn phaddsw128(a: i16x8, b: i16x8) -> i16x8;
-
-    #[link_name = "llvm.x86.ssse3.phsub.sw.128"]
-    fn phsubsw128(a: i16x8, b: i16x8) -> i16x8;
-
     #[link_name = "llvm.x86.ssse3.pmadd.ub.sw.128"]
     fn pmaddubsw128(a: u8x16, b: i8x16) -> i16x8;
 

library/stdarch/crates/stdarch-gen-arm/spec/neon/aarch64.spec.yml

@@ -8958,7 +8958,7 @@ intrinsics:
     arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}"]
     return_type: "{neon_type[2]}"
     attr:
-      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [mov, 'LANE1 = 0', 'LANE2 = 1']]}]]
+      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [mov, 'LANE1 = 0', 'LANE2 = 0']]}]]
       - FnCall: [rustc_legacy_const_generics, ['1', '3']]
       - FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]
     static_defs: ['const LANE1: i32, const LANE2: i32']
@@ -8983,7 +8983,7 @@ intrinsics:
     arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}"]
     return_type: "{neon_type[2]}"
     attr:
-      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [mov, 'LANE1 = 0', 'LANE2 = 1']]}]]
+      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [mov, 'LANE1 = 0', 'LANE2 = 0']]}]]
       - FnCall: [rustc_legacy_const_generics, ['1', '3']]
       - FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]
     static_defs: ['const LANE1: i32, const LANE2: i32']
@@ -9008,7 +9008,7 @@ intrinsics:
     arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}"]
     return_type: "{neon_type[2]}"
     attr:
-      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [mov, 'LANE1 = 0', 'LANE2 = 1']]}]]
+      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [mov, 'LANE1 = 0', 'LANE2 = 0']]}]]
       - FnCall: [rustc_legacy_const_generics, ['1', '3']]
       - FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]
     static_defs: ['const LANE1: i32, const LANE2: i32']
@@ -9037,7 +9037,7 @@ intrinsics:
     arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}"]
     return_type: "{neon_type[2]}"
     attr:
-      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [mov, 'LANE1 = 0', 'LANE2 = 1']]}]]
+      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [mov, 'LANE1 = 0', 'LANE2 = 0']]}]]
       - FnCall: [rustc_legacy_const_generics, ['1', '3']]
       - FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]
     static_defs: ['const LANE1: i32, const LANE2: i32']

library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml

@@ -2681,6 +2681,7 @@ intrinsics:
       - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1]]}]]
       - *neon-not-arm-stable
       - *neon-cfg-arm-unstable
+    big_endian_inverse: false
     safety:
       unsafe: [neon]
     types:
@@ -2740,6 +2741,7 @@ intrinsics:
       - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ld1]]}]]
       - *neon-not-arm-stable
       - *neon-cfg-arm-unstable
+    big_endian_inverse: false
     safety:
       unsafe: [neon]
     types:

library/stdarch/crates/stdarch-gen-arm/src/main.rs

@@ -139,6 +139,7 @@ fn parse_args() -> Vec<(PathBuf, Option<PathBuf>)> {
         .into_iter()
         .filter_map(Result::ok)
         .filter(|f| f.file_type().is_file())
+        .filter(|f| f.file_name().to_string_lossy().ends_with(".yml"))
         .map(|f| (f.into_path(), out_dir.clone()))
         .collect()
 }

library/stdarch/rust-version

@@ -1 +1 @@
-873d4682c7d285540b8f28bfe637006cef8918a6
+db3e99bbab28c6ca778b13222becdea54533d908

tests/rustdoc-gui/headers-color.goml

@@ -1,71 +0,0 @@
-// This test check for headings text and background colors for the different themes.
-
-include: "utils.goml"
-
-define-function: (
-    "check-colors",
-    [theme, color, code_header_color, focus_background_color, headings_color],
-    block {
-        go-to: "file://" + |DOC_PATH| + "/test_docs/struct.Foo.html"
-        // This is needed so that the text color is computed.
-        show-text: true
-        call-function: ("switch-theme", {"theme": |theme|})
-        assert-css: (
-            ".impl",
-            {"color": |color|, "background-color": "rgba(0, 0, 0, 0)"},
-            ALL,
-        )
-        assert-css: (
-            ".impl .code-header",
-            {"color": |code_header_color|, "background-color": "rgba(0, 0, 0, 0)"},
-            ALL,
-        )
-        go-to: "file://" + |DOC_PATH| + "/test_docs/struct.Foo.html#impl-Foo"
-        assert-css: (
-            "#impl-Foo",
-            {"color": |color|, "background-color": |focus_background_color|},
-        )
-        go-to: "file://" + |DOC_PATH| + "/test_docs/struct.Foo.html#method.must_use"
-        assert-css: (
-            "#method\.must_use",
-            {"color": |color|, "background-color": |focus_background_color|},
-            ALL,
-        )
-        go-to: "file://" + |DOC_PATH| + "/test_docs/index.html"
-        assert-css: (".section-header a", {"color": |color|}, ALL)
-        go-to: "file://" + |DOC_PATH| + "/test_docs/struct.HeavilyDocumentedStruct.html"
-        // We select headings (h2, h3, h...).
-        assert-css: (".docblock > :not(p) > a", {"color": |headings_color|}, ALL)
-    },
-)
-
-call-function: (
-    "check-colors",
-    {
-        "theme": "ayu",
-        "color": "#c5c5c5",
-        "code_header_color": "#e6e1cf",
-        "focus_background_color": "rgba(255, 236, 164, 0.06)",
-        "headings_color": "#c5c5c5",
-    },
-)
-call-function: (
-    "check-colors",
-    {
-        "theme": "dark",
-        "color": "#ddd",
-        "code_header_color": "#ddd",
-        "focus_background_color": "#494a3d",
-        "headings_color": "#ddd",
-    },
-)
-call-function: (
-    "check-colors",
-    {
-        "theme": "light",
-        "color": "black",
-        "code_header_color": "black",
-        "focus_background_color": "#fdffd3",
-        "headings_color": "black",
-    },
-)

tests/rustdoc-gui/notable-trait.goml

@@ -1,256 +0,0 @@
-// This test checks the position of the `i` for the notable traits.
-include: "utils.goml"
-go-to: "file://" + |DOC_PATH| + "/test_docs/struct.NotableStructWithLongName.html"
-show-text: true
-
-define-function: (
-    "check-notable-tooltip-position",
-    [x, i_x],
-    block {
-        // Checking they have the same y position.
-        compare-elements-position-near: (
-            "//*[@id='method.create_an_iterator_from_read']//a[normalize-space()='NotableStructWithLongName']",
-            "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']",
-            {"y": 1},
-        )
-        // Checking they don't have the same x position.
-        compare-elements-position-false: (
-            "//*[@id='method.create_an_iterator_from_read']//a[normalize-space()='NotableStructWithLongName']",
-            "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']",
-            ["x"],
-        )
-        // The `i` should be *after* the type.
-        assert-position: (
-            "//*[@id='method.create_an_iterator_from_read']//a[normalize-space()='NotableStructWithLongName']",
-            {"x": |x|},
-        )
-        assert-position: (
-            "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']",
-            {"x": |i_x|},
-        )
-    },
-)
-
-define-function: (
-    "check-notable-tooltip-position-complete",
-    [x, i_x, popover_x],
-    block {
-        call-function: ("check-notable-tooltip-position", {"x": |x|, "i_x": |i_x|})
-        assert-count: ("//*[@class='tooltip popover']", 0)
-        click: "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']"
-        assert-count: ("//*[@class='tooltip popover']", 1)
-        compare-elements-position-near: (
-            "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']",
-            "//*[@class='tooltip popover']",
-            {"y": 30}
-        )
-        compare-elements-position-false: (
-            "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']",
-            "//*[@class='tooltip popover']",
-            ["x"]
-        )
-        assert-position: (
-            "//*[@class='tooltip popover']",
-            {"x": |popover_x|}
-        )
-        click: "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']"
-        move-cursor-to: "//h1"
-        assert-count: ("//*[@class='tooltip popover']", 0)
-    },
-)
-
-// We start with a wide screen.
-set-window-size: (1100, 600)
-call-function: ("check-notable-tooltip-position-complete", {
-    "x": 682,
-    "i_x": 960,
-    "popover_x": 468,
-})
-
-// Now only the `i` should be on the next line.
-set-window-size: (1055, 600)
-compare-elements-position-false: (
-    "//*[@id='method.create_an_iterator_from_read']//a[normalize-space()='NotableStructWithLongName']",
-    "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']",
-    ["y", "x"],
-)
-
-// Now both the `i` and the struct name should be on the next line.
-set-window-size: (980, 600)
-call-function: ("check-notable-tooltip-position", {
-    "x": 250,
-    "i_x": 528,
-})
-
-go-to: "file://" + |DOC_PATH| + "/test_docs/struct.NotableStructWithLongName.html"
-// This is needed to ensure that the text color is computed.
-show-text: true
-
-// Now check the colors.
-define-function: (
-    "check-colors",
-    [theme, header_color, content_color, type_color, trait_color, link_color],
-    block {
-        call-function: ("switch-theme", {"theme": |theme|})
-
-        assert-css: (
-             "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']",
-             {"color": |content_color|},
-             ALL,
-        )
-
-        move-cursor-to: "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']"
-        wait-for-count: (".tooltip.popover", 1)
-
-        assert-css: (
-             "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']",
-             {"color": |link_color|},
-             ALL,
-        )
-
-        assert-css: (
-             ".tooltip.popover h3",
-             {"color": |header_color|},
-             ALL,
-        )
-        assert-css: (
-             ".tooltip.popover pre",
-             {"color": |content_color|},
-             ALL,
-        )
-        assert-css: (
-             ".tooltip.popover pre a.struct",
-             {"color": |type_color|},
-             ALL,
-        )
-        assert-css: (
-             ".tooltip.popover pre a.trait",
-             {"color": |trait_color|},
-             ALL,
-        )
-    },
-)
-
-call-function: (
-    "check-colors",
-    {
-        "theme": "ayu",
-        "link_color": "#39afd7",
-        "content_color": "#e6e1cf",
-        "header_color": "#fff",
-        "type_color": "#ffa0a5",
-        "trait_color": "#39afd7",
-    },
-)
-
-call-function: (
-    "check-colors",
-    {
-        "theme": "dark",
-        "link_color": "#d2991d",
-        "content_color": "#ddd",
-        "header_color": "#ddd",
-        "type_color": "#2dbfb8",
-        "trait_color": "#b78cf2",
-    },
-)
-
-call-function: (
-    "check-colors",
-    {
-        "theme": "light",
-        "link_color": "#3873ad",
-        "content_color": "black",
-        "header_color": "black",
-        "type_color": "#ad378a",
-        "trait_color": "#6e4fc9",
-    },
-)
-
-// Checking on mobile now.
-set-window-size: (650, 600)
-wait-for-size: ("body", {"width": 650})
-call-function: ("check-notable-tooltip-position-complete", {
-    "x": 26,
-    "i_x": 305,
-    "popover_x": 0,
-})
-
-reload:
-
-// Check that pressing escape works
-click: "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']"
-move-cursor-to: "//*[@class='tooltip popover']"
-assert-count: ("//*[@class='tooltip popover']", 1)
-press-key: "Escape"
-assert-count: ("//*[@class='tooltip popover']", 0)
-assert: "#method\.create_an_iterator_from_read .tooltip:focus"
-
-// Check that clicking outside works.
-click: "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']"
-assert-count: ("//*[@class='tooltip popover']", 1)
-click: ".main-heading h1"
-assert-count: ("//*[@class='tooltip popover']", 0)
-assert-false: "#method\.create_an_iterator_from_read .tooltip:focus"
-
-// Check that pressing tab over and over works.
-click: "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']"
-move-cursor-to: "//*[@class='tooltip popover']"
-assert-count: ("//*[@class='tooltip popover']", 1)
-press-key: "Tab"
-press-key: "Tab"
-press-key: "Tab"
-press-key: "Tab"
-press-key: "Tab"
-press-key: "Tab"
-press-key: "Tab"
-assert-count: ("//*[@class='tooltip popover']", 0)
-assert: "#method\.create_an_iterator_from_read .tooltip:focus"
-
-define-function: (
-    "setup-popup",
-    [],
-    block {
-        store-window-property: {"scrollY": scroll}
-        click: "#method\.create_an_iterator_from_read .fn"
-        // We ensure that the scroll position changed.
-        assert-window-property-false: {"scrollY": |scroll|}
-        // Store the new position.
-        store-window-property: {"scrollY": scroll}
-        click: "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']"
-        wait-for: "//*[@class='tooltip popover']"
-        click: ".main-heading h1"
-    }
-)
-
-// Now we check that the focus isn't given back to the wrong item when opening
-// another popover.
-call-function: ("setup-popup", {})
-click: ".main-heading h1"
-// We ensure we didn't come back to the previous focused item.
-assert-window-property-false: {"scrollY": |scroll|}
-
-// Same but with Escape handling.
-call-function: ("setup-popup", {})
-press-key: "Escape"
-// We ensure we didn't come back to the previous focused item.
-assert-window-property-false: {"scrollY": |scroll|}
-
-// Opening the mobile sidebar should close the popover.
-set-window-size: (650, 600)
-click: "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']"
-assert-count: ("//*[@class='tooltip popover']", 1)
-click: ".sidebar-menu-toggle"
-assert: "//*[@class='sidebar shown']"
-assert-count: ("//*[@class='tooltip popover']", 0)
-assert-false: "#method\.create_an_iterator_from_read .tooltip:focus"
-
-// Also check the focus handling for the settings button.
-set-window-size: (1100, 600)
-reload:
-assert-count: ("//*[@class='tooltip popover']", 0)
-click: "//*[@id='method.create_an_iterator_from_read']//*[@class='tooltip']"
-wait-for-count: ("//*[@class='tooltip popover']", 1)
-call-function: ("open-settings-menu", {})
-wait-for-count: ("//*[@class='tooltip popover']", 0)
-assert-false: "#method\.create_an_iterator_from_read .tooltip:focus"

tests/rustdoc-gui/search-filter.goml

@@ -1,86 +0,0 @@
-// Checks that the crate search filtering is handled correctly and changes the results.
-include: "utils.goml"
-go-to: "file://" + |DOC_PATH| + "/test_docs/index.html"
-show-text: true
-call-function: ("perform-search", {"query": "test"})
-assert-text: ("#results .externcrate", "test_docs")
-
-wait-for: "#crate-search"
-// We now want to change the crate filter.
-click: "#crate-search"
-// We select "lib2" option then press enter to change the filter.
-press-key: "ArrowDown"
-press-key: "ArrowDown"
-press-key: "ArrowDown"
-press-key: "ArrowDown"
-press-key: "ArrowDown"
-press-key: "Enter"
-// Waiting for the search results to appear...
-wait-for: "#search-tabs"
-wait-for-false: "#search-tabs .count.loading"
-assert-document-property: ({"URL": "&filter-crate="}, CONTAINS)
-// We check that there is no more "test_docs" appearing.
-assert-false: "#results .externcrate"
-// We also check that "lib2" is the filter crate.
-assert-property: ("#crate-search", {"value": "lib2"})
-
-// Now we check that leaving the search results and putting them back keeps the
-// crate filtering.
-press-key: "Escape"
-wait-for-css: ("#main-content", {"display": "block"})
-click: "#search-button"
-wait-for: ".search-input"
-wait-for-css: ("#main-content", {"display": "none"})
-// We check that there is no more "test_docs" appearing.
-assert-false: "#results .externcrate"
-assert-property: ("#crate-search", {"value": "lib2"})
-
-// Selecting back "All crates"
-click: "#crate-search"
-press-key: "ArrowUp"
-press-key: "ArrowUp"
-press-key: "ArrowUp"
-press-key: "ArrowUp"
-press-key: "ArrowUp"
-press-key: "Enter"
-// Waiting for the search results to appear...
-wait-for: "#search-tabs"
-wait-for-false: "#search-tabs .count.loading"
-assert-property: ("#crate-search", {"value": "all crates"})
-
-// Checking that the URL parameter is taken into account for crate filtering.
-go-to: "file://" + |DOC_PATH| + "/test_docs/index.html?search=test&filter-crate=lib2"
-wait-for: "#crate-search"
-assert-property: ("#crate-search", {"value": "lib2"})
-assert-false: "#results .externcrate"
-
-// Checking that the text for the "title" is correct (the "all crates" comes from the "<select>").
-assert-text: (".search-switcher", "Search results in all crates", STARTS_WITH)
-
-// Checking the display of the crate filter.
-// We start with the light theme.
-call-function: ("switch-theme", {"theme": "light"})
-
-set-timeout: 2000
-wait-for: "#crate-search"
-assert-css: ("#crate-search", {
-    "border": "1px solid #e0e0e0",
-    "color": "black",
-    "background-color": "white",
-})
-
-// We now check the dark theme.
-call-function: ("switch-theme", {"theme": "dark"})
-wait-for-css: ("#crate-search", {
-    "border": "1px solid #e0e0e0",
-    "color": "#ddd",
-    "background-color": "#353535",
-})
-
-// And finally we check the ayu theme.
-call-function: ("switch-theme", {"theme": "ayu"})
-wait-for-css: ("#crate-search", {
-    "border": "1px solid #5c6773",
-    "color": "#c5c5c5",
-    "background-color": "#0f1419",
-})

tests/rustdoc-gui/search-result-display.goml

@@ -1,114 +0,0 @@
-// ignore-tidy-linelength
-// Checks that the search results have the expected width.
-include: "utils.goml"
-go-to: "file://" + |DOC_PATH| + "/test_docs/index.html"
-set-window-size: (900, 1000)
-write-into: (".search-input", "test")
-// To be SURE that the search will be run.
-press-key: 'Enter'
-wait-for: "#crate-search"
-wait-for-false: "#search-tabs .count.loading"
-// The width is returned by "getComputedStyle" which returns the exact number instead of the
-// CSS rule which is "50%"...
-assert-size: (".search-results div.desc", {"width": 248})
-store-size: (".search-results .result-name .typename", {"width": width})
-set-window-size: (600, 100)
-// As counter-intuitive as it may seem, in this width, the width is "100%", which is why
-// when computed it's larger.
-assert-size: (".search-results div.desc", {"width": 566})
-
-// The result set is all on one line.
-compare-elements-position-near: (
-    ".search-results .result-name .typename",
-    ".search-results .result-name .path",
-    {"y": 2},
-)
-compare-elements-position-near-false: (
-    ".search-results .result-name .typename",
-    ".search-results .result-name .path",
-    {"x": 5},
-)
-// The width of the "typename" isn't fixed anymore in this display mode.
-store-size: (".search-results .result-name .typename", {"width": new_width})
-assert: |new_width| < |width| - 10
-
-// Check that if the search is too long on mobile, it'll go under the "typename".
-go-to: "file://" + |DOC_PATH| + "/test_docs/index.html?search=SuperIncrediblyLongLongLongLongLongLongLongGigaGigaGigaMegaLongLongLongStructName"
-wait-for: "#crate-search"
-wait-for-false: "#search-tabs .count.loading"
-compare-elements-position-near: (
-    ".search-results .result-name .typename",
-    ".search-results .result-name .path",
-    {"y": 2, "x": 0},
-)
-compare-elements-size-near: (
-    ".search-results .result-name",
-    ".search-results .result-name .path",
-    {"width": 8, "height": 8},
-)
-
-// Check that the crate filter `<select>` is correctly handled when it goes to next line.
-// To do so we need to update the length of one of its `<option>`.
-set-window-size: (900, 900)
-
-// First we check the current width, height and position.
-assert-css: ("#crate-search", {"width": "159px"})
-store-size: (".search-switcher", {
-    "height": search_results_title_height,
-    "width": search_results_title_width,
-})
-assert-css: ("#search", {"width": "640px"})
-
-// Then we update the text of one of the `<option>`.
-set-text: (
-    "#crate-search option",
-    "sdjfaksdjfaksjdbfkadsbfkjsadbfkdsbkfbsadkjfbkdsabfkadsfkjdsafa",
-)
-
-// Then we compare again to confirm the height didn't change.
-assert-size: ("#crate-search", {"width": 185})
-assert-size: (".search-switcher", {
-    "height": |search_results_title_height|,
-})
-assert-css: ("#search", {"width": "640px"})
-assert: |search_results_title_width| <= 640
-
-// Now checking that the crate filter is working as expected too.
-show-text: true
-define-function: (
-    "check-filter",
-    [theme, border, filter, hover_border, hover_filter],
-    block {
-        call-function: ("switch-theme", {"theme": |theme|})
-        wait-for: "#crate-search"
-        wait-for-false: "#search-tabs .count.loading"
-        assert-css: ("#crate-search", {"border": "1px solid " + |border|})
-        assert-css: ("#crate-search-div::after", {"filter": |filter|})
-        move-cursor-to: "#crate-search"
-        assert-css: ("#crate-search", {"border": "1px solid " + |hover_border|})
-        assert-css: ("#crate-search-div::after", {"filter": |hover_filter|})
-        move-cursor-to: ".search-input"
-    },
-)
-
-call-function: ("check-filter", {
-    "theme": "ayu",
-    "border": "#5c6773",
-    "filter": "invert(0.41) sepia(0.12) saturate(4.87) hue-rotate(171deg) brightness(0.94) contrast(0.94)",
-    "hover_border": "#e0e0e0",
-    "hover_filter": "invert(0.98) sepia(0.12) saturate(0.81) hue-rotate(343deg) brightness(1.13) contrast(0.76)",
-})
-call-function: ("check-filter", {
-    "theme": "dark",
-    "border": "#e0e0e0",
-    "filter": "invert(0.94) sepia(0) saturate(7.21) hue-rotate(255deg) brightness(0.9) contrast(0.9)",
-    "hover_border": "#2196f3",
-    "hover_filter": "invert(0.69) sepia(0.6) saturate(66.13) hue-rotate(184deg) brightness(1) contrast(0.91)",
-})
-call-function: ("check-filter", {
-    "theme": "light",
-    "border": "#e0e0e0",
-    "filter": "invert(1) sepia(0) saturate(42.23) hue-rotate(289deg) brightness(1.14) contrast(0.76)",
-    "hover_border": "#717171",
-    "hover_filter": "invert(0.44) sepia(0.18) saturate(0.23) hue-rotate(317deg) brightness(0.96) contrast(0.93)",
-})

tests/ui/asm/x86_64/global_asm_escape.rs

@@ -0,0 +1,17 @@
+//@ run-pass
+//@ only-x86_64-unknown-linux-gnu
+//@ ignore-backends: gcc
+
+// https://github.com/rust-lang/rust/issues/151950
+
+unsafe extern "C" {
+    #[link_name = "exit@GLIBC_2.2.5"]
+    safe fn exit(status: i32) -> !;
+    safe fn my_exit(status: i32) -> !;
+}
+
+core::arch::global_asm!(".global my_exit", "my_exit:", "jmp {}", sym exit);
+
+fn main() {
+    my_exit(0);
+}

tests/ui/asm/x86_64/naked_asm_escape.rs

@@ -0,0 +1,32 @@
+//@ build-fail
+//@ only-x86_64-unknown-linux-gnu
+//@ dont-check-compiler-stderr
+//@ dont-check-compiler-stdout
+//@ ignore-backends: gcc
+
+// https://github.com/rust-lang/rust/issues/151950
+
+unsafe extern "C" {
+    #[link_name = "memset]; mov eax, 1; #"]
+    unsafe fn inject();
+}
+
+#[unsafe(export_name = "memset]; mov eax, 1; #")]
+extern "C" fn inject_() {}
+
+#[unsafe(naked)]
+extern "C" fn print_0() -> usize {
+    core::arch::naked_asm!("lea rax, [{}]", "ret", sym inject)
+}
+
+#[unsafe(naked)]
+extern "C" fn print_1() -> usize {
+    core::arch::naked_asm!("lea rax, [{}]", "ret", sym inject_)
+}
+
+fn main() {
+    dbg!(print_0());
+    dbg!(print_1());
+}
+
+//~? ERROR linking

tests/ui/associated-types/issue-38821.rs

@@ -34,11 +34,11 @@ pub trait Column: Expression {}
 //~| ERROR the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
 //~| ERROR the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
 //~| ERROR the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
-//~| ERROR the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
-//~| ERROR the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
-//~| ERROR the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
 pub enum ColumnInsertValue<Col, Expr> where
 //~^ ERROR the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
+//~| ERROR the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
+//~| ERROR the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
+//~| ERROR the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
     Col: Column,
     Expr: Expression<SqlType=<Col::SqlType as IntoNullable>::Nullable>,
 //~^ ERROR the trait bound `<Col as Expression>::SqlType: IntoNullable` is not satisfied

tests/ui/associated-types/issue-38821.stderr

@@ -1,5 +1,5 @@
 error[E0277]: the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
-  --> $DIR/issue-38821.rs:40:1
+  --> $DIR/issue-38821.rs:37:1
    |
 LL | pub enum ColumnInsertValue<Col, Expr> where
    | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ the trait `NotNull` is not implemented for `<Col as Expression>::SqlType`
@@ -82,10 +82,13 @@ LL | impl<T: NotNull> IntoNullable for T {
    = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no`
 
 error[E0277]: the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
-  --> $DIR/issue-38821.rs:23:10
+  --> $DIR/issue-38821.rs:37:10
    |
 LL | #[derive(Debug, Copy, Clone)]
-   |          ^^^^^ the trait `NotNull` is not implemented for `<Col as Expression>::SqlType`
+   |          ----- in this derive macro expansion
+...
+LL | pub enum ColumnInsertValue<Col, Expr> where
+   |          ^^^^^^^^^^^^^^^^^ the trait `NotNull` is not implemented for `<Col as Expression>::SqlType`
    |
 note: required for `<Col as Expression>::SqlType` to implement `IntoNullable`
   --> $DIR/issue-38821.rs:9:18
@@ -95,13 +98,17 @@ LL | impl<T: NotNull> IntoNullable for T {
    |         |
    |         unsatisfied trait bound introduced here
 note: required for `ColumnInsertValue<Col, Expr>` to implement `Debug`
-  --> $DIR/issue-38821.rs:23:10
+  --> $DIR/issue-38821.rs:37:10
    |
 LL | #[derive(Debug, Copy, Clone)]
-   |          ^^^^^
+   |          ----- in this derive macro expansion
+...
+LL | pub enum ColumnInsertValue<Col, Expr> where
+   |          ^^^^^^^^^^^^^^^^^
 ...
 LL |     Expr: Expression<SqlType=<Col::SqlType as IntoNullable>::Nullable>,
-   |                      ------------------------------------------------ unsatisfied trait bound introduced in this `derive` macro
+   |                      ------------------------------------------------ unsatisfied trait bound
+   = help: consider manually implementing `Debug` to avoid undesired bounds
 help: consider further restricting the associated type
    |
 LL |     Expr: Expression<SqlType=<Col::SqlType as IntoNullable>::Nullable>, <Col as Expression>::SqlType: NotNull,
@@ -126,10 +133,13 @@ LL |     Expr: Expression<SqlType=<Col::SqlType as IntoNullable>::Nullable>, <Co
    |                                                                       +++++++++++++++++++++++++++++++++++++++
 
 error[E0277]: the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
-  --> $DIR/issue-38821.rs:23:17
+  --> $DIR/issue-38821.rs:37:10
    |
 LL | #[derive(Debug, Copy, Clone)]
-   |                 ^^^^ the trait `NotNull` is not implemented for `<Col as Expression>::SqlType`
+   |                 ---- in this derive macro expansion
+...
+LL | pub enum ColumnInsertValue<Col, Expr> where
+   |          ^^^^^^^^^^^^^^^^^ the trait `NotNull` is not implemented for `<Col as Expression>::SqlType`
    |
 note: required for `<Col as Expression>::SqlType` to implement `IntoNullable`
   --> $DIR/issue-38821.rs:9:18
@@ -139,13 +149,16 @@ LL | impl<T: NotNull> IntoNullable for T {
    |         |
    |         unsatisfied trait bound introduced here
 note: required for `ColumnInsertValue<Col, Expr>` to implement `Copy`
-  --> $DIR/issue-38821.rs:23:17
+  --> $DIR/issue-38821.rs:37:10
    |
 LL | #[derive(Debug, Copy, Clone)]
-   |                 ^^^^
+   |                 ---- in this derive macro expansion
+...
+LL | pub enum ColumnInsertValue<Col, Expr> where
+   |          ^^^^^^^^^^^^^^^^^
 ...
 LL |     Expr: Expression<SqlType=<Col::SqlType as IntoNullable>::Nullable>,
-   |                      ------------------------------------------------ unsatisfied trait bound introduced in this `derive` macro
+   |                      ------------------------------------------------ unsatisfied trait bound
 help: consider further restricting the associated type
    |
 LL |     Expr: Expression<SqlType=<Col::SqlType as IntoNullable>::Nullable>, <Col as Expression>::SqlType: NotNull,
@@ -199,10 +212,13 @@ LL | impl<T: NotNull> IntoNullable for T {
    = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no`
 
 error[E0277]: the trait bound `<Col as Expression>::SqlType: NotNull` is not satisfied
-  --> $DIR/issue-38821.rs:23:23
+  --> $DIR/issue-38821.rs:37:10
    |
 LL | #[derive(Debug, Copy, Clone)]
-   |                       ^^^^^ the trait `NotNull` is not implemented for `<Col as Expression>::SqlType`
+   |                       ----- in this derive macro expansion
+...
+LL | pub enum ColumnInsertValue<Col, Expr> where
+   |          ^^^^^^^^^^^^^^^^^ the trait `NotNull` is not implemented for `<Col as Expression>::SqlType`
    |
 note: required for `<Col as Expression>::SqlType` to implement `IntoNullable`
   --> $DIR/issue-38821.rs:9:18
@@ -212,13 +228,17 @@ LL | impl<T: NotNull> IntoNullable for T {
    |         |
    |         unsatisfied trait bound introduced here
 note: required for `ColumnInsertValue<Col, Expr>` to implement `Clone`
-  --> $DIR/issue-38821.rs:23:23
+  --> $DIR/issue-38821.rs:37:10
    |
 LL | #[derive(Debug, Copy, Clone)]
-   |                       ^^^^^
+   |                       ----- in this derive macro expansion
+...
+LL | pub enum ColumnInsertValue<Col, Expr> where
+   |          ^^^^^^^^^^^^^^^^^
 ...
 LL |     Expr: Expression<SqlType=<Col::SqlType as IntoNullable>::Nullable>,
-   |                      ------------------------------------------------ unsatisfied trait bound introduced in this `derive` macro
+   |                      ------------------------------------------------ unsatisfied trait bound
+   = help: consider manually implementing `Clone` to avoid undesired bounds
 help: consider further restricting the associated type
    |
 LL |     Expr: Expression<SqlType=<Col::SqlType as IntoNullable>::Nullable>, <Col as Expression>::SqlType: NotNull,

tests/ui/borrowck/derive-clone-implicit-bound.rs

@@ -0,0 +1,32 @@
+// Issue #108894
+
+use std::marker::PhantomData;
+
+#[derive(Clone, Copy)] //~ NOTE: derived `Clone` adds implicit bounds on type parameters
+pub struct TypedAddress<T>{
+//~^ NOTE: if all bounds were met, you could clone the value
+//~| NOTE: introduces an implicit `T: Clone` bound
+    inner: u64,
+    phantom: PhantomData<T>,
+}
+
+pub trait Memory {
+    fn write_value<T>(&self, offset: TypedAddress<T>, value: &T);
+    fn return_value<T>(&self, offset: TypedAddress<T>) -> T;
+    //~^ NOTE: consider changing this parameter type in method `return_value` to borrow instead if owning the value isn't necessary
+    //~| NOTE: in this method
+    //~| NOTE: this parameter takes ownership of the value
+    fn update_value<T, F>(&self, offset: TypedAddress<T>, update: F)
+    //~^ NOTE: move occurs because `offset` has type `TypedAddress<T>`, which does not implement the `Copy` trait
+        where F: FnOnce(T) -> T //~ HELP: consider further restricting type parameter `T`
+    {
+        let old = self.return_value(offset); //~ NOTE: value moved here
+        //~^ NOTE: you could clone this value
+        let new = update(old);
+        self.write_value(offset, &new); //~ ERROR: use of moved value: `offset`
+        //~^ NOTE: value used here after move
+        //~| HELP: consider manually implementing `Clone` to avoid undesired bounds
+    }
+}
+
+fn main() {}

tests/ui/borrowck/derive-clone-implicit-bound.stderr

@@ -0,0 +1,38 @@
+error[E0382]: use of moved value: `offset`
+  --> $DIR/derive-clone-implicit-bound.rs:26:26
+   |
+LL |     fn update_value<T, F>(&self, offset: TypedAddress<T>, update: F)
+   |                                  ------ move occurs because `offset` has type `TypedAddress<T>`, which does not implement the `Copy` trait
+...
+LL |         let old = self.return_value(offset);
+   |                                     ------ value moved here
+...
+LL |         self.write_value(offset, &new);
+   |                          ^^^^^^ value used here after move
+   |
+note: consider changing this parameter type in method `return_value` to borrow instead if owning the value isn't necessary
+  --> $DIR/derive-clone-implicit-bound.rs:15:39
+   |
+LL |     fn return_value<T>(&self, offset: TypedAddress<T>) -> T;
+   |        ------------ in this method    ^^^^^^^^^^^^^^^ this parameter takes ownership of the value
+note: if all bounds were met, you could clone the value
+  --> $DIR/derive-clone-implicit-bound.rs:6:1
+   |
+LL | #[derive(Clone, Copy)]
+   |          ----- derived `Clone` adds implicit bounds on type parameters
+LL | pub struct TypedAddress<T>{
+   | ^^^^^^^^^^^^^^^^^^^^^^^^-^
+   |                         |
+   |                         introduces an implicit `T: Clone` bound
+...
+LL |         let old = self.return_value(offset);
+   |                                     ------ you could clone this value
+   = help: consider manually implementing `Clone` to avoid undesired bounds
+help: consider further restricting type parameter `T` with trait `Copy`
+   |
+LL |         where F: FnOnce(T) -> T, T: Copy
+   |                                +++++++++
+
+error: aborting due to 1 previous error
+
+For more information about this error, try `rustc --explain E0382`.

tests/ui/closures/closure-move-use-after-move-diagnostic.rs

@@ -1,16 +1,16 @@
 //! regression test for <https://github.com/rust-lang/rust/issues/24357>
-struct NoCopy; //~ NOTE if `NoCopy` implemented `Clone`, you could clone the value
-//~^ NOTE consider implementing `Clone` for this type
+struct NoCopy; //~ NOTE: if `NoCopy` implemented `Clone`, you could clone the value
+//~^ NOTE: consider implementing `Clone` for this type
 fn main() {
     let x = NoCopy;
-    //~^ NOTE move occurs because `x` has type `NoCopy`
+    //~^ NOTE: move occurs because `x` has type `NoCopy`
     let f = move || {
-        //~^ NOTE value moved into closure here
+        //~^ NOTE: value moved into closure here
         let y = x;
-        //~^ NOTE variable moved due to use in closure
-        //~| NOTE you could clone this value
+        //~^ NOTE: variable moved due to use in closure
+        //~| NOTE: you could clone this value
     };
     let z = x;
-    //~^ ERROR use of moved value: `x`
-    //~| NOTE value used here after move
+    //~^ ERROR: use of moved value: `x`
+    //~| NOTE: value used here after move
 }

tests/ui/const-generics/adt_const_params/const_param_ty_impl_bad_field.rs

@@ -8,10 +8,10 @@
 struct CantParam(NotParam);
 
 impl std::marker::ConstParamTy_ for CantParam {}
-//~^ error: the trait `ConstParamTy_` cannot be implemented for this type
+//~^ ERROR: the trait `ConstParamTy_` cannot be implemented for this type
 
 #[derive(std::marker::ConstParamTy, Eq, PartialEq)]
-//~^ error: the trait `ConstParamTy_` cannot be implemented for this type
 struct CantParamDerive(NotParam);
+//~^ ERROR: the trait `ConstParamTy_` cannot be implemented for this type
 
 fn main() {}

tests/ui/const-generics/adt_const_params/const_param_ty_impl_bad_field.stderr

@@ -8,13 +8,12 @@ LL | impl std::marker::ConstParamTy_ for CantParam {}
    |                                     ^^^^^^^^^
 
 error[E0204]: the trait `ConstParamTy_` cannot be implemented for this type
-  --> $DIR/const_param_ty_impl_bad_field.rs:13:10
+  --> $DIR/const_param_ty_impl_bad_field.rs:14:8
    |
 LL | #[derive(std::marker::ConstParamTy, Eq, PartialEq)]
-   |          ^^^^^^^^^^^^^^^^^^^^^^^^^
-LL |
+   |          ------------------------- in this derive macro expansion
 LL | struct CantParamDerive(NotParam);
-   |                        -------- this field does not implement `ConstParamTy_`
+   |        ^^^^^^^^^^^^^^^ -------- this field does not implement `ConstParamTy_`
 
 error: aborting due to 2 previous errors
 

tests/ui/const-generics/adt_const_params/const_param_ty_impl_no_structural_eq.rs

@@ -8,13 +8,13 @@ impl std::marker::ConstParamTy_ for ImplementsConstParamTy {}
 struct CantParam(ImplementsConstParamTy);
 
 impl std::marker::ConstParamTy_ for CantParam {}
-//~^ error: the type `CantParam` does not `#[derive(PartialEq)]`
-//~| ERROR the trait bound `CantParam: Eq` is not satisfied
+//~^ ERROR: the type `CantParam` does not `#[derive(PartialEq)]`
+//~| ERROR: the trait bound `CantParam: Eq` is not satisfied
 
 #[derive(std::marker::ConstParamTy)]
-//~^ error: the type `CantParamDerive` does not `#[derive(PartialEq)]`
-//~| ERROR the trait bound `CantParamDerive: Eq` is not satisfied
 struct CantParamDerive(ImplementsConstParamTy);
+//~^ ERROR: the type `CantParamDerive` does not `#[derive(PartialEq)]`
+//~| ERROR: the trait bound `CantParamDerive: Eq` is not satisfied
 
 fn check<T: std::marker::ConstParamTy_>() {}
 

tests/ui/const-generics/adt_const_params/const_param_ty_impl_no_structural_eq.stderr

@@ -27,10 +27,12 @@ note: required by a bound in `ConstParamTy_`
   --> $SRC_DIR/core/src/marker.rs:LL:COL
 
 error[E0277]: the trait bound `CantParamDerive: Eq` is not satisfied
-  --> $DIR/const_param_ty_impl_no_structural_eq.rs:14:10
+  --> $DIR/const_param_ty_impl_no_structural_eq.rs:15:8
    |
 LL | #[derive(std::marker::ConstParamTy)]
-   |          ^^^^^^^^^^^^^^^^^^^^^^^^^ the trait `Eq` is not implemented for `CantParamDerive`
+   |          ------------------------- in this derive macro expansion
+LL | struct CantParamDerive(ImplementsConstParamTy);
+   |        ^^^^^^^^^^^^^^^ the trait `Eq` is not implemented for `CantParamDerive`
    |
 note: required by a bound in `ConstParamTy_`
   --> $SRC_DIR/core/src/marker.rs:LL:COL
@@ -41,13 +43,15 @@ LL | struct CantParamDerive(ImplementsConstParamTy);
    |
 
 error[E0277]: the type `CantParamDerive` does not `#[derive(PartialEq)]`
-  --> $DIR/const_param_ty_impl_no_structural_eq.rs:14:10
+  --> $DIR/const_param_ty_impl_no_structural_eq.rs:15:8
    |
 LL | #[derive(std::marker::ConstParamTy)]
-   |          ^^^^^^^^^^^^^^^^^^^^^^^^^ unsatisfied trait bound
+   |          ------------------------- in this derive macro expansion
+LL | struct CantParamDerive(ImplementsConstParamTy);
+   |        ^^^^^^^^^^^^^^^ unsatisfied trait bound
    |
 help: the nightly-only, unstable trait `StructuralPartialEq` is not implemented for `CantParamDerive`
-  --> $DIR/const_param_ty_impl_no_structural_eq.rs:17:1
+  --> $DIR/const_param_ty_impl_no_structural_eq.rs:15:1
    |
 LL | struct CantParamDerive(ImplementsConstParamTy);
    | ^^^^^^^^^^^^^^^^^^^^^^

tests/ui/const-generics/adt_const_params/nested_bad_const_param_ty.rs

@@ -4,15 +4,15 @@
 use std::marker::ConstParamTy;
 
 #[derive(ConstParamTy)]
-//~^ ERROR the trait `ConstParamTy_` cannot be implemented for this ty
 struct Foo([*const u8; 1]);
+//~^ ERROR the trait `ConstParamTy_` cannot be implemented for this ty
 
 #[derive(ConstParamTy)]
-//~^ ERROR the trait `ConstParamTy_` cannot be implemented for this ty
 struct Foo2([*mut u8; 1]);
+//~^ ERROR the trait `ConstParamTy_` cannot be implemented for this ty
 
 #[derive(ConstParamTy)]
-//~^ ERROR the trait `ConstParamTy_` cannot be implemented for this ty
 struct Foo3([fn(); 1]);
+//~^ ERROR the trait `ConstParamTy_` cannot be implemented for this ty
 
 fn main() {}

tests/ui/const-generics/adt_const_params/nested_bad_const_param_ty.stderr

@@ -1,44 +1,41 @@
 error[E0204]: the trait `ConstParamTy_` cannot be implemented for this type
-  --> $DIR/nested_bad_const_param_ty.rs:6:10
+  --> $DIR/nested_bad_const_param_ty.rs:7:8
    |
 LL | #[derive(ConstParamTy)]
-   |          ^^^^^^^^^^^^
-LL |
+   |          ------------ in this derive macro expansion
 LL | struct Foo([*const u8; 1]);
-   |            -------------- this field does not implement `ConstParamTy_`
+   |        ^^^ -------------- this field does not implement `ConstParamTy_`
    |
 note: the `ConstParamTy_` impl for `[*const u8; 1]` requires that `*const u8: ConstParamTy_`
-  --> $DIR/nested_bad_const_param_ty.rs:8:12
+  --> $DIR/nested_bad_const_param_ty.rs:7:12
    |
 LL | struct Foo([*const u8; 1]);
    |            ^^^^^^^^^^^^^^
 
 error[E0204]: the trait `ConstParamTy_` cannot be implemented for this type
-  --> $DIR/nested_bad_const_param_ty.rs:10:10
+  --> $DIR/nested_bad_const_param_ty.rs:11:8
    |
 LL | #[derive(ConstParamTy)]
-   |          ^^^^^^^^^^^^
-LL |
+   |          ------------ in this derive macro expansion
 LL | struct Foo2([*mut u8; 1]);
-   |             ------------ this field does not implement `ConstParamTy_`
+   |        ^^^^ ------------ this field does not implement `ConstParamTy_`
    |
 note: the `ConstParamTy_` impl for `[*mut u8; 1]` requires that `*mut u8: ConstParamTy_`
-  --> $DIR/nested_bad_const_param_ty.rs:12:13
+  --> $DIR/nested_bad_const_param_ty.rs:11:13
    |
 LL | struct Foo2([*mut u8; 1]);
    |             ^^^^^^^^^^^^
 
 error[E0204]: the trait `ConstParamTy_` cannot be implemented for this type
-  --> $DIR/nested_bad_const_param_ty.rs:14:10
+  --> $DIR/nested_bad_const_param_ty.rs:15:8
    |
 LL | #[derive(ConstParamTy)]
-   |          ^^^^^^^^^^^^
-LL |
+   |          ------------ in this derive macro expansion
 LL | struct Foo3([fn(); 1]);
-   |             --------- this field does not implement `ConstParamTy_`
+   |        ^^^^ --------- this field does not implement `ConstParamTy_`
    |
 note: the `ConstParamTy_` impl for `[fn(); 1]` requires that `fn(): ConstParamTy_`
-  --> $DIR/nested_bad_const_param_ty.rs:16:13
+  --> $DIR/nested_bad_const_param_ty.rs:15:13
    |
 LL | struct Foo3([fn(); 1]);
    |             ^^^^^^^^^

tests/ui/const-generics/adt_const_params/unsized_field-1.rs

@@ -6,18 +6,18 @@
 use std::marker::ConstParamTy;
 
 #[derive(ConstParamTy, Eq, PartialEq)]
-//~^ ERROR: the trait `ConstParamTy_` cannot be implemented for this type
 struct A([u8]);
+//~^ ERROR: the trait `ConstParamTy_` cannot be implemented for this type
 
 #[derive(ConstParamTy, Eq, PartialEq)]
-//~^ ERROR: the trait `ConstParamTy_` cannot be implemented for this type
 struct B(&'static [u8]);
+//~^ ERROR: the trait `ConstParamTy_` cannot be implemented for this type
 
 #[derive(ConstParamTy, Eq, PartialEq)]
 struct C(unsized_const_param::Foo);
 
 #[derive(std::marker::ConstParamTy, Eq, PartialEq)]
-//~^ ERROR: the trait `ConstParamTy_` cannot be implemented for this type
 struct D(unsized_const_param::GenericNotUnsizedParam<&'static [u8]>);
+//~^ ERROR: the trait `ConstParamTy_` cannot be implemented for this type
 
 fn main() {}

tests/ui/const-generics/adt_const_params/unsized_field-1.stderr

@@ -1,44 +1,41 @@
 error[E0204]: the trait `ConstParamTy_` cannot be implemented for this type
-  --> $DIR/unsized_field-1.rs:8:10
+  --> $DIR/unsized_field-1.rs:9:8
    |
 LL | #[derive(ConstParamTy, Eq, PartialEq)]
-   |          ^^^^^^^^^^^^
-LL |
+   |          ------------ in this derive macro expansion
 LL | struct A([u8]);
-   |          ---- this field does not implement `ConstParamTy_`
+   |        ^ ---- this field does not implement `ConstParamTy_`
    |
 note: the `ConstParamTy_` impl for `[u8]` requires that `feature(unsized_const_params) is enabled`
-  --> $DIR/unsized_field-1.rs:10:10
+  --> $DIR/unsized_field-1.rs:9:10
    |
 LL | struct A([u8]);
    |          ^^^^
 
 error[E0204]: the trait `ConstParamTy_` cannot be implemented for this type
-  --> $DIR/unsized_field-1.rs:12:10
+  --> $DIR/unsized_field-1.rs:13:8
    |
 LL | #[derive(ConstParamTy, Eq, PartialEq)]
-   |          ^^^^^^^^^^^^
-LL |
+   |          ------------ in this derive macro expansion
 LL | struct B(&'static [u8]);
-   |          ------------- this field does not implement `ConstParamTy_`
+   |        ^ ------------- this field does not implement `ConstParamTy_`
    |
 note: the `ConstParamTy_` impl for `&'static [u8]` requires that `feature(unsized_const_params) is enabled`
-  --> $DIR/unsized_field-1.rs:14:10
+  --> $DIR/unsized_field-1.rs:13:10
    |
 LL | struct B(&'static [u8]);
    |          ^^^^^^^^^^^^^
 
 error[E0204]: the trait `ConstParamTy_` cannot be implemented for this type
-  --> $DIR/unsized_field-1.rs:19:10
+  --> $DIR/unsized_field-1.rs:20:8
    |
 LL | #[derive(std::marker::ConstParamTy, Eq, PartialEq)]
-   |          ^^^^^^^^^^^^^^^^^^^^^^^^^
-LL |
+   |          ------------------------- in this derive macro expansion
 LL | struct D(unsized_const_param::GenericNotUnsizedParam<&'static [u8]>);
-   |          ---------------------------------------------------------- this field does not implement `ConstParamTy_`
+   |        ^ ---------------------------------------------------------- this field does not implement `ConstParamTy_`
    |
 note: the `ConstParamTy_` impl for `GenericNotUnsizedParam<&'static [u8]>` requires that `feature(unsized_const_params) is enabled`
-  --> $DIR/unsized_field-1.rs:21:10
+  --> $DIR/unsized_field-1.rs:20:10
    |
 LL | struct D(unsized_const_param::GenericNotUnsizedParam<&'static [u8]>);
    |          ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

tests/ui/const-generics/adt_const_params/unsizing-wfcheck-issue-126272.rs

@@ -6,8 +6,8 @@
 use std::marker::ConstParamTy;
 
 #[derive(Debug, PartialEq, Eq, ConstParamTy)]
-//~^ ERROR the trait `ConstParamTy_`
 struct Foo {
+//~^ ERROR the trait `ConstParamTy_`
     nested: &'static Bar<dyn std::fmt::Debug>,
     //~^ ERROR the size for values
     //~| ERROR the size for values

tests/ui/const-generics/adt_const_params/unsizing-wfcheck-issue-126272.stderr

@@ -19,11 +19,13 @@ LL | struct Bar<T>(T);
    |            this could be changed to `T: ?Sized`...
 
 error[E0204]: the trait `ConstParamTy_` cannot be implemented for this type
-  --> $DIR/unsizing-wfcheck-issue-126272.rs:8:32
+  --> $DIR/unsizing-wfcheck-issue-126272.rs:9:8
    |
 LL | #[derive(Debug, PartialEq, Eq, ConstParamTy)]
-   |                                ^^^^^^^^^^^^
-...
+   |                                ------------ in this derive macro expansion
+LL | struct Foo {
+   |        ^^^
+LL |
 LL |     nested: &'static Bar<dyn std::fmt::Debug>,
    |     ----------------------------------------- this field does not implement `ConstParamTy_`
    |
@@ -59,12 +61,13 @@ help: the trait `Debug` is implemented for `Bar<T>`
 LL | #[derive(Debug, PartialEq, Eq, ConstParamTy)]
    |          ^^^^^
 note: required for `Bar<(dyn Debug + 'static)>` to implement `Debug`
-  --> $DIR/unsizing-wfcheck-issue-126272.rs:19:10
+  --> $DIR/unsizing-wfcheck-issue-126272.rs:20:8
    |
 LL | #[derive(Debug, PartialEq, Eq, ConstParamTy)]
-   |          ^^^^^
+   |          ----- in this derive macro expansion
 LL | struct Bar<T>(T);
-   |            - unsatisfied trait bound introduced in this `derive` macro
+   |        ^^^ - unsatisfied trait bound
+   = help: consider manually implementing `Debug` to avoid undesired bounds
    = note: 2 redundant requirements hidden
    = note: required for `&&'static Bar<(dyn Debug + 'static)>` to implement `Debug`
    = note: required for the cast from `&&&'static Bar<(dyn Debug + 'static)>` to `&dyn Debug`
@@ -93,10 +96,13 @@ help: the trait `Eq` is implemented for `Bar<T>`
 LL | #[derive(Debug, PartialEq, Eq, ConstParamTy)]
    |                            ^^
 note: required for `Bar<dyn Debug>` to implement `Eq`
-  --> $DIR/unsizing-wfcheck-issue-126272.rs:19:28
+  --> $DIR/unsizing-wfcheck-issue-126272.rs:20:8
    |
 LL | #[derive(Debug, PartialEq, Eq, ConstParamTy)]
-   |                            ^^ unsatisfied trait bound introduced in this `derive` macro
+   |                            -- in this derive macro expansion
+LL | struct Bar<T>(T);
+   |        ^^^ - type parameter would need to implement `Eq`
+   = help: consider manually implementing `Eq` to avoid undesired bounds
    = note: 1 redundant requirement hidden
    = note: required for `&'static Bar<dyn Debug>` to implement `Eq`
 note: required by a bound in `std::cmp::AssertParamIsEq`

tests/ui/consts/const-blocks/trait-error.stderr

@@ -5,10 +5,12 @@ LL |     [Foo(String::new()); 4];
    |      ^^^^^^^^^^^^^^^^^^ the trait `Copy` is not implemented for `String`
    |
 note: required for `Foo<String>` to implement `Copy`
-  --> $DIR/trait-error.rs:1:10
+  --> $DIR/trait-error.rs:2:8
    |
 LL | #[derive(Copy, Clone)]
-   |          ^^^^ unsatisfied trait bound introduced in this `derive` macro
+   |          ---- in this derive macro expansion
+LL | struct Foo<T>(T);
+   |        ^^^ - type parameter would need to implement `Copy`
    = note: the `Copy` trait is required because this value will be copied for each element of the array
 help: create an inline `const` block
    |

tests/ui/derives/copy-drop-mutually-exclusive.rs

@@ -1,14 +1,14 @@
 //! Regression test for issue #20126: Copy and Drop traits are mutually exclusive
 
-#[derive(Copy, Clone)] //~ ERROR the trait `Copy` cannot be implemented
-struct Foo;
+#[derive(Copy, Clone)]
+struct Foo; //~ ERROR the trait `Copy` cannot be implemented
 
 impl Drop for Foo {
     fn drop(&mut self) {}
 }
 
-#[derive(Copy, Clone)] //~ ERROR the trait `Copy` cannot be implemented
-struct Bar<T>(::std::marker::PhantomData<T>);
+#[derive(Copy, Clone)]
+struct Bar<T>(::std::marker::PhantomData<T>); //~ ERROR the trait `Copy` cannot be implemented
 
 impl<T> Drop for Bar<T> {
     fn drop(&mut self) {}

tests/ui/derives/copy-drop-mutually-exclusive.stderr

@@ -1,14 +1,30 @@
 error[E0184]: the trait `Copy` cannot be implemented for this type; the type has a destructor
-  --> $DIR/copy-drop-mutually-exclusive.rs:3:10
+  --> $DIR/copy-drop-mutually-exclusive.rs:4:8
    |
 LL | #[derive(Copy, Clone)]
-   |          ^^^^ `Copy` not allowed on types with destructors
+   |          ---- in this derive macro expansion
+LL | struct Foo;
+   |        ^^^ `Copy` not allowed on types with destructors
+   |
+note: destructor declared here
+  --> $DIR/copy-drop-mutually-exclusive.rs:7:5
+   |
+LL |     fn drop(&mut self) {}
+   |     ^^^^^^^^^^^^^^^^^^
 
 error[E0184]: the trait `Copy` cannot be implemented for this type; the type has a destructor
-  --> $DIR/copy-drop-mutually-exclusive.rs:10:10
+  --> $DIR/copy-drop-mutually-exclusive.rs:11:8
    |
 LL | #[derive(Copy, Clone)]
-   |          ^^^^ `Copy` not allowed on types with destructors
+   |          ---- in this derive macro expansion
+LL | struct Bar<T>(::std::marker::PhantomData<T>);
+   |        ^^^ `Copy` not allowed on types with destructors
+   |
+note: destructor declared here
+  --> $DIR/copy-drop-mutually-exclusive.rs:14:5
+   |
+LL |     fn drop(&mut self) {}
+   |     ^^^^^^^^^^^^^^^^^^
 
 error: aborting due to 2 previous errors
 

tests/ui/derives/derive-assoc-type-not-impl.stderr

@@ -11,10 +11,13 @@ LL |     Bar::<NotClone> { x: 1 }.clone();
    |                              ^^^^^ method cannot be called on `Bar<NotClone>` due to unsatisfied trait bounds
    |
 note: trait bound `NotClone: Clone` was not satisfied
-  --> $DIR/derive-assoc-type-not-impl.rs:6:10
+  --> $DIR/derive-assoc-type-not-impl.rs:7:12
    |
 LL | #[derive(Clone)]
-   |          ^^^^^ unsatisfied trait bound introduced in this `derive` macro
+   |          ----- in this derive macro expansion
+LL | struct Bar<T: Foo> {
+   |            ^ type parameter would need to implement `Clone`
+   = help: consider manually implementing the trait to avoid undesired bounds
 help: consider annotating `NotClone` with `#[derive(Clone)]`
    |
 LL + #[derive(Clone)]

tests/ui/derives/deriving-copyclone.stderr

@@ -7,10 +7,12 @@ LL |     is_copy(B { a: 1, b: C });
    |     required by a bound introduced by this call
    |
 note: required for `B<C>` to implement `Copy`
-  --> $DIR/deriving-copyclone.rs:9:10
+  --> $DIR/deriving-copyclone.rs:10:8
    |
 LL | #[derive(Copy, Clone)]
-   |          ^^^^ unsatisfied trait bound introduced in this `derive` macro
+   |          ---- in this derive macro expansion
+LL | struct B<T> {
+   |        ^ - type parameter would need to implement `Copy`
 note: required by a bound in `is_copy`
   --> $DIR/deriving-copyclone.rs:18:15
    |
@@ -30,10 +32,13 @@ LL |     is_clone(B { a: 1, b: C });
    |     required by a bound introduced by this call
    |
 note: required for `B<C>` to implement `Clone`
-  --> $DIR/deriving-copyclone.rs:9:16
+  --> $DIR/deriving-copyclone.rs:10:8
    |
 LL | #[derive(Copy, Clone)]
-   |                ^^^^^ unsatisfied trait bound introduced in this `derive` macro
+   |                ----- in this derive macro expansion
+LL | struct B<T> {
+   |        ^ - type parameter would need to implement `Clone`
+   = help: consider manually implementing `Clone` to avoid undesired bounds
 note: required by a bound in `is_clone`
   --> $DIR/deriving-copyclone.rs:19:16
    |
@@ -53,10 +58,12 @@ LL |     is_copy(B { a: 1, b: D });
    |     required by a bound introduced by this call
    |
 note: required for `B<D>` to implement `Copy`
-  --> $DIR/deriving-copyclone.rs:9:10
+  --> $DIR/deriving-copyclone.rs:10:8
    |
 LL | #[derive(Copy, Clone)]
-   |          ^^^^ unsatisfied trait bound introduced in this `derive` macro
+   |          ---- in this derive macro expansion
+LL | struct B<T> {
+   |        ^ - type parameter would need to implement `Copy`
 note: required by a bound in `is_copy`
   --> $DIR/deriving-copyclone.rs:18:15
    |

tests/ui/derives/deriving-with-repr-packed-2.stderr

@@ -21,10 +21,14 @@ LL |     let x: Foo<NonCopy> = Foo(NonCopy, NonCopy, NonCopy);
 note: the following trait bounds were not satisfied:
       `NonCopy: Clone`
       `NonCopy: Copy`
-  --> $DIR/deriving-with-repr-packed-2.rs:5:16
+  --> $DIR/deriving-with-repr-packed-2.rs:7:16
    |
 LL | #[derive(Copy, Clone, Default, PartialEq, Eq)]
-   |                ^^^^^ unsatisfied trait bound introduced in this `derive` macro
+   |                ----- in this derive macro expansion
+LL | #[repr(packed)]
+LL | pub struct Foo<T>(T, T, T);
+   |                ^ type parameter would need to implement `Clone`
+   = help: consider manually implementing the trait to avoid undesired bounds
 help: consider annotating `NonCopy` with `#[derive(Clone, Copy)]`
    |
 LL + #[derive(Clone, Copy)]

tests/ui/derives/issue-97343.stderr

@@ -2,12 +2,11 @@ error[E0109]: type arguments are not allowed on type parameter `Irrelevant`
   --> $DIR/issue-97343.rs:4:23
    |
 LL | #[derive(Debug)]
-   |          -----
-   |          |
-   |          not allowed on type parameter `Irrelevant`
-   |          in this derive macro expansion
+   |          ----- in this derive macro expansion
 LL | pub struct Irrelevant<Irrelevant> {
-   |                       ^^^^^^^^^^ type argument not allowed
+   |            ---------- ^^^^^^^^^^ type argument not allowed
+   |            |
+   |            not allowed on type parameter `Irrelevant`
    |
 note: type parameter `Irrelevant` defined here
   --> $DIR/issue-97343.rs:4:23

tests/ui/duplicate/multiple-types-with-same-name-and-derive-default-133965.rs

@@ -3,12 +3,12 @@
 struct NonGeneric {}
 
 #[derive(Default)]
-//~^ ERROR struct takes 0 lifetime arguments but 1 lifetime argument was supplied
-//~^^ ERROR struct takes 0 lifetime arguments but 1 lifetime argument was supplied
-//~^^^ ERROR struct takes 0 generic arguments but 1 generic argument was supplied
-//~^^^^ ERROR struct takes 0 generic arguments but 1 generic argument was supplied
+//~^ ERROR: struct takes 0 lifetime arguments but 1 lifetime argument was supplied
+//~| ERROR: struct takes 0 generic arguments but 1 generic argument was supplied
 struct NonGeneric<'a, const N: usize> {}
-//~^ ERROR lifetime parameter `'a` is never used
-//~^^ ERROR the name `NonGeneric` is defined multiple times
+//~^ ERROR: struct takes 0 lifetime arguments but 1 lifetime argument was supplied
+//~| ERROR: struct takes 0 generic arguments but 1 generic argument was supplied
+//~| ERROR: lifetime parameter `'a` is never used
+//~| ERROR: the name `NonGeneric` is defined multiple times
 
 pub fn main() {}

tests/ui/duplicate/multiple-types-with-same-name-and-derive-default-133965.stderr

@@ -1,5 +1,5 @@
 error[E0428]: the name `NonGeneric` is defined multiple times
-  --> $DIR/multiple-types-with-same-name-and-derive-default-133965.rs:10:1
+  --> $DIR/multiple-types-with-same-name-and-derive-default-133965.rs:8:1
    |
 LL | struct NonGeneric {}
    | ----------------- previous definition of the type `NonGeneric` here
@@ -37,7 +37,7 @@ LL | struct NonGeneric {}
    |        ^^^^^^^^^^
 
 error[E0392]: lifetime parameter `'a` is never used
-  --> $DIR/multiple-types-with-same-name-and-derive-default-133965.rs:10:19
+  --> $DIR/multiple-types-with-same-name-and-derive-default-133965.rs:8:19
    |
 LL | struct NonGeneric<'a, const N: usize> {}
    |                   ^^ unused lifetime parameter
@@ -45,29 +45,26 @@ LL | struct NonGeneric<'a, const N: usize> {}
    = help: consider removing `'a`, referring to it in a field, or using a marker such as `PhantomData`
 
 error[E0107]: struct takes 0 lifetime arguments but 1 lifetime argument was supplied
-  --> $DIR/multiple-types-with-same-name-and-derive-default-133965.rs:5:10
+  --> $DIR/multiple-types-with-same-name-and-derive-default-133965.rs:8:8
    |
-LL | #[derive(Default)]
-   |          ^^^^^^^ expected 0 lifetime arguments
-...
 LL | struct NonGeneric<'a, const N: usize> {}
-   |                   -- help: remove the lifetime argument
+   |        ^^^^^^^^^^ -- help: remove the lifetime argument
+   |        |
+   |        expected 0 lifetime arguments
    |
 note: struct defined here, with 0 lifetime parameters
   --> $DIR/multiple-types-with-same-name-and-derive-default-133965.rs:3:8
    |
 LL | struct NonGeneric {}
    |        ^^^^^^^^^^
-   = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no`
 
 error[E0107]: struct takes 0 generic arguments but 1 generic argument was supplied
-  --> $DIR/multiple-types-with-same-name-and-derive-default-133965.rs:5:10
+  --> $DIR/multiple-types-with-same-name-and-derive-default-133965.rs:8:8
    |
-LL | #[derive(Default)]
-   |          ^^^^^^^ expected 0 generic arguments
-...
 LL | struct NonGeneric<'a, const N: usize> {}
-   |                             - help: remove the unnecessary generic argument
+   |        ^^^^^^^^^^           - help: remove the unnecessary generic argument
+   |        |
+   |        expected 0 generic arguments
    |
 note: struct defined here, with 0 generic parameters
   --> $DIR/multiple-types-with-same-name-and-derive-default-133965.rs:3:8

tests/ui/duplicate/multiple-types-with-same-name-and-derive.rs

@@ -8,12 +8,12 @@
 struct NotSM;
 
 #[derive(PartialEq, Eq)]
-//~^ ERROR struct takes 0 generic arguments
-//~| ERROR struct takes 0 generic arguments
-//~| ERROR struct takes 0 generic arguments
-//~| ERROR struct takes 0 generic arguments
+//~^ ERROR: struct takes 0 generic arguments
 struct NotSM<T>(T);
-//~^ ERROR the name `NotSM` is defined multiple times
-//~| ERROR no field `0`
+//~^ ERROR: struct takes 0 generic arguments
+//~| ERROR: struct takes 0 generic arguments
+//~| ERROR: struct takes 0 generic arguments
+//~| ERROR: the name `NotSM` is defined multiple times
+//~| ERROR: no field `0`
 
 fn main() {}

tests/ui/duplicate/multiple-types-with-same-name-and-derive.stderr

@@ -1,5 +1,5 @@
 error[E0428]: the name `NotSM` is defined multiple times
-  --> $DIR/multiple-types-with-same-name-and-derive.rs:15:1
+  --> $DIR/multiple-types-with-same-name-and-derive.rs:12:1
    |
 LL | struct NotSM;
    | ------------- previous definition of the type `NotSM` here
@@ -10,10 +10,10 @@ LL | struct NotSM<T>(T);
    = note: `NotSM` must be defined only once in the type namespace of this module
 
 error[E0107]: struct takes 0 generic arguments but 1 generic argument was supplied
-  --> $DIR/multiple-types-with-same-name-and-derive.rs:10:10
+  --> $DIR/multiple-types-with-same-name-and-derive.rs:12:8
    |
-LL | #[derive(PartialEq, Eq)]
-   |          ^^^^^^^^^ expected 0 generic arguments
+LL | struct NotSM<T>(T);
+   |        ^^^^^ expected 0 generic arguments
    |
 note: struct defined here, with 0 generic parameters
   --> $DIR/multiple-types-with-same-name-and-derive.rs:8:8
@@ -30,27 +30,27 @@ LL | #[derive(PartialEq, Eq)]
 note: struct defined here, with 0 generic parameters
   --> $DIR/multiple-types-with-same-name-and-derive.rs:8:8
    |
+LL | struct NotSM;
+   |        ^^^^^
+
+error[E0107]: struct takes 0 generic arguments but 1 generic argument was supplied
+  --> $DIR/multiple-types-with-same-name-and-derive.rs:12:8
+   |
+LL | struct NotSM<T>(T);
+   |        ^^^^^ expected 0 generic arguments
+   |
+note: struct defined here, with 0 generic parameters
+  --> $DIR/multiple-types-with-same-name-and-derive.rs:8:8
+   |
 LL | struct NotSM;
    |        ^^^^^
    = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no`
 
 error[E0107]: struct takes 0 generic arguments but 1 generic argument was supplied
-  --> $DIR/multiple-types-with-same-name-and-derive.rs:10:21
+  --> $DIR/multiple-types-with-same-name-and-derive.rs:12:8
    |
-LL | #[derive(PartialEq, Eq)]
-   |                     ^^ expected 0 generic arguments
-   |
-note: struct defined here, with 0 generic parameters
-  --> $DIR/multiple-types-with-same-name-and-derive.rs:8:8
-   |
-LL | struct NotSM;
-   |        ^^^^^
-
-error[E0107]: struct takes 0 generic arguments but 1 generic argument was supplied
-  --> $DIR/multiple-types-with-same-name-and-derive.rs:10:10
-   |
-LL | #[derive(PartialEq, Eq)]
-   |          ^^^^^^^^^ expected 0 generic arguments
+LL | struct NotSM<T>(T);
+   |        ^^^^^ expected 0 generic arguments
    |
 note: struct defined here, with 0 generic parameters
   --> $DIR/multiple-types-with-same-name-and-derive.rs:8:8
@@ -60,7 +60,7 @@ LL | struct NotSM;
    = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no`
 
 error[E0609]: no field `0` on type `&NotSM`
-  --> $DIR/multiple-types-with-same-name-and-derive.rs:15:17
+  --> $DIR/multiple-types-with-same-name-and-derive.rs:12:17
    |
 LL | struct NotSM<T>(T);
    |                 ^ unknown field

tests/ui/error-codes/E0184.rs

@@ -1,5 +1,5 @@
-#[derive(Copy)] //~ ERROR E0184
-struct Foo;
+#[derive(Copy)]
+struct Foo; //~ ERROR E0184
 
 impl Drop for Foo {
     fn drop(&mut self) {

tests/ui/error-codes/E0184.stderr

@@ -1,8 +1,16 @@
 error[E0184]: the trait `Copy` cannot be implemented for this type; the type has a destructor
-  --> $DIR/E0184.rs:1:10
+  --> $DIR/E0184.rs:2:8
    |
 LL | #[derive(Copy)]
-   |          ^^^^ `Copy` not allowed on types with destructors
+   |          ---- in this derive macro expansion
+LL | struct Foo;
+   |        ^^^ `Copy` not allowed on types with destructors
+   |
+note: destructor declared here
+  --> $DIR/E0184.rs:5:5
+   |
+LL |     fn drop(&mut self) {
+   |     ^^^^^^^^^^^^^^^^^^
 
 error: aborting due to 1 previous error
 

tests/ui/generic-associated-types/impl_bounds.stderr

@@ -29,10 +29,12 @@ LL |     type C = String where Self: Copy;
    |                                 ^^^^ the trait `Copy` is not implemented for `T`
    |
 note: required for `Fooy<T>` to implement `Copy`
-  --> $DIR/impl_bounds.rs:10:10
+  --> $DIR/impl_bounds.rs:11:8
    |
 LL | #[derive(Copy, Clone)]
-   |          ^^^^ unsatisfied trait bound introduced in this `derive` macro
+   |          ---- in this derive macro expansion
+LL | struct Fooy<T>(T);
+   |        ^^^^ - type parameter would need to implement `Copy`
 note: the requirement `Fooy<T>: Copy` appears on the `impl`'s associated type `C` but not on the corresponding trait's associated type
   --> $DIR/impl_bounds.rs:6:10
    |
@@ -53,10 +55,12 @@ LL |     fn d() where Self: Copy {}
    |                        ^^^^ the trait `Copy` is not implemented for `T`
    |
 note: required for `Fooy<T>` to implement `Copy`
-  --> $DIR/impl_bounds.rs:10:10
+  --> $DIR/impl_bounds.rs:11:8
    |
 LL | #[derive(Copy, Clone)]
-   |          ^^^^ unsatisfied trait bound introduced in this `derive` macro
+   |          ---- in this derive macro expansion
+LL | struct Fooy<T>(T);
+   |        ^^^^ - type parameter would need to implement `Copy`
 note: the requirement `Fooy<T>: Copy` appears on the `impl`'s associated function `d` but not on the corresponding trait's associated function
   --> $DIR/impl_bounds.rs:7:8
    |

tests/ui/issues/issue-27340.rs

@@ -1,7 +1,7 @@
 struct Foo;
 #[derive(Copy, Clone)]
-//~^ ERROR the trait `Copy` cannot be implemented for this type
 struct Bar(Foo);
-//~^ ERROR `Foo: Clone` is not satisfied
+//~^ ERROR: the trait `Copy` cannot be implemented for this type
+//~| ERROR: `Foo: Clone` is not satisfied
 
 fn main() {}

tests/ui/issues/issue-27340.stderr

@@ -1,18 +1,16 @@
 error[E0204]: the trait `Copy` cannot be implemented for this type
-  --> $DIR/issue-27340.rs:2:10
+  --> $DIR/issue-27340.rs:3:8
    |
 LL | #[derive(Copy, Clone)]
-   |          ^^^^
-LL |
+   |          ---- in this derive macro expansion
 LL | struct Bar(Foo);
-   |            --- this field does not implement `Copy`
+   |        ^^^ --- this field does not implement `Copy`
 
 error[E0277]: the trait bound `Foo: Clone` is not satisfied
-  --> $DIR/issue-27340.rs:4:12
+  --> $DIR/issue-27340.rs:3:12
    |
 LL | #[derive(Copy, Clone)]
    |                ----- in this derive macro expansion
-LL |
 LL | struct Bar(Foo);
    |            ^^^ the trait `Clone` is not implemented for `Foo`
    |

tests/ui/malformed/malformed-derive-entry.rs

@@ -1,14 +1,14 @@
 #[derive(Copy(Bad))]
-//~^ ERROR traits in `#[derive(...)]` don't accept arguments
-//~| ERROR the trait bound
+//~^ ERROR: traits in `#[derive(...)]` don't accept arguments
 struct Test1;
+//~^ ERROR: the trait bound
 
 #[derive(Copy="bad")]
-//~^ ERROR traits in `#[derive(...)]` don't accept values
-//~| ERROR the trait bound
+//~^ ERROR: traits in `#[derive(...)]` don't accept values
 struct Test2;
+//~^ ERROR: the trait bound
 
-#[derive] //~ ERROR malformed `derive` attribute input
+#[derive] //~ ERROR: malformed `derive` attribute input
 struct Test4;
 
 fn main() {}

tests/ui/malformed/malformed-derive-entry.stderr

@@ -17,10 +17,13 @@ LL | #[derive]
    | ^^^^^^^^^ help: must be of the form: `#[derive(Trait1, Trait2, ...)]`
 
 error[E0277]: the trait bound `Test1: Clone` is not satisfied
-  --> $DIR/malformed-derive-entry.rs:1:10
+  --> $DIR/malformed-derive-entry.rs:3:8
    |
 LL | #[derive(Copy(Bad))]
-   |          ^^^^ the trait `Clone` is not implemented for `Test1`
+   |          ---- in this derive macro expansion
+LL |
+LL | struct Test1;
+   |        ^^^^^ the trait `Clone` is not implemented for `Test1`
    |
 note: required by a bound in `Copy`
   --> $SRC_DIR/core/src/marker.rs:LL:COL
@@ -31,10 +34,13 @@ LL | struct Test1;
    |
 
 error[E0277]: the trait bound `Test2: Clone` is not satisfied
-  --> $DIR/malformed-derive-entry.rs:6:10
+  --> $DIR/malformed-derive-entry.rs:8:8
    |
 LL | #[derive(Copy="bad")]
-   |          ^^^^ the trait `Clone` is not implemented for `Test2`
+   |          ---- in this derive macro expansion
+LL |
+LL | struct Test2;
+   |        ^^^^^ the trait `Clone` is not implemented for `Test2`
    |
 note: required by a bound in `Copy`
   --> $SRC_DIR/core/src/marker.rs:LL:COL

tests/ui/moves/assignment-of-clone-call-on-ref-due-to-missing-bound.current.stderr

@@ -13,7 +13,8 @@ note: `HashSet<Day>` does not implement `Clone`, so `&HashSet<Day>` was cloned i
    |
 LL |             let mut x: HashSet<Day> = v.clone();
    |                                       ^
-   = help: `Clone` is not implemented because the trait bound `Day: Clone` is not satisfied
+help: `Clone` is not implemented because a trait bound is not satisfied
+  --> $SRC_DIR/std/src/collections/hash/set.rs:LL:COL
 help: consider annotating `Day` with `#[derive(Clone)]`
    |
 LL + #[derive(Clone)]

tests/ui/moves/assignment-of-clone-call-on-ref-due-to-missing-bound.next.stderr

@@ -13,7 +13,8 @@ note: `HashSet<Day>` does not implement `Clone`, so `&HashSet<Day>` was cloned i
    |
 LL |             let mut x: HashSet<Day> = v.clone();
    |                                       ^
-   = help: `Clone` is not implemented because the trait bound `Day: Clone` is not satisfied
+help: `Clone` is not implemented because a trait bound is not satisfied
+  --> $SRC_DIR/std/src/collections/hash/set.rs:LL:COL
 help: consider annotating `Day` with `#[derive(Clone)]`
    |
 LL + #[derive(Clone)]

tests/ui/moves/issue-72649-uninit-in-loop.rs

@@ -70,6 +70,7 @@ fn moved_loop_2() {
 fn uninit_1() {
     loop {
         let value: NonCopy; //~ NOTE declared here
+        //~^ HELP consider assigning a value
         let _used = value; //~ ERROR binding `value` isn't initialized
         //~^ NOTE `value` used here but it isn't initialized
     }
@@ -77,6 +78,7 @@ fn uninit_1() {
 
 fn uninit_2() {
     let mut value: NonCopy; //~ NOTE declared here
+    //~^ HELP consider assigning a value
     loop {
         let _used = value; //~ ERROR binding `value` isn't initialized
         //~^ NOTE `value` used here but it isn't initialized

tests/ui/moves/issue-72649-uninit-in-loop.stderr

@@ -83,10 +83,11 @@ LL |         let _used2 = value;
    |                      ----- you could clone this value
 
 error[E0381]: used binding `value` isn't initialized
-  --> $DIR/issue-72649-uninit-in-loop.rs:73:21
+  --> $DIR/issue-72649-uninit-in-loop.rs:74:21
    |
 LL |         let value: NonCopy;
    |             ----- binding declared here but left uninitialized
+LL |
 LL |         let _used = value;
    |                     ^^^^^ `value` used here but it isn't initialized
    |
@@ -96,11 +97,11 @@ LL |         let value: NonCopy = /* value */;
    |                            +++++++++++++
 
 error[E0381]: used binding `value` isn't initialized
-  --> $DIR/issue-72649-uninit-in-loop.rs:81:21
+  --> $DIR/issue-72649-uninit-in-loop.rs:83:21
    |
 LL |     let mut value: NonCopy;
    |         --------- binding declared here but left uninitialized
-LL |     loop {
+...
 LL |         let _used = value;
    |                     ^^^^^ `value` used here but it isn't initialized
    |

tests/ui/proc-macro/issue-104884-trait-impl-sugg-err.rs

@@ -12,12 +12,11 @@ struct PriorityQueueEntry<T> {
 }
 
 #[derive(PartialOrd, AddImpl)]
-//~^ ERROR can't compare `PriorityQueue<T>` with `PriorityQueue<T>`
-//~| ERROR the trait bound `PriorityQueue<T>: Eq` is not satisfied
-//~| ERROR can't compare `T` with `T`
-//~| ERROR no method named `cmp` found for struct `BinaryHeap<PriorityQueueEntry<T>>`
-//~| ERROR no field `height` on type `&PriorityQueue<T>`
-
+//~^ ERROR: the trait bound `PriorityQueue<T>: Eq` is not satisfied
+//~| ERROR: can't compare `T` with `T`
+//~| ERROR: no method named `cmp` found for struct `BinaryHeap<PriorityQueueEntry<T>>`
+//~| ERROR: no field `height` on type `&PriorityQueue<T>`
 struct PriorityQueue<T>(BinaryHeap<PriorityQueueEntry<T>>);
-//~^ ERROR can't compare `BinaryHeap<PriorityQueueEntry<T>>` with `_`
+//~^ ERROR: can't compare `PriorityQueue<T>` with `PriorityQueue<T>`
+//~| ERROR: can't compare `BinaryHeap<PriorityQueueEntry<T>>` with `_`
 fn main() {}

tests/ui/proc-macro/issue-104884-trait-impl-sugg-err.stderr

@@ -1,11 +1,14 @@
 error[E0277]: can't compare `PriorityQueue<T>` with `PriorityQueue<T>`
-  --> $DIR/issue-104884-trait-impl-sugg-err.rs:14:10
+  --> $DIR/issue-104884-trait-impl-sugg-err.rs:19:8
    |
 LL | #[derive(PartialOrd, AddImpl)]
-   |          ^^^^^^^^^^ no implementation for `PriorityQueue<T> == PriorityQueue<T>`
+   |          ---------- in this derive macro expansion
+...
+LL | struct PriorityQueue<T>(BinaryHeap<PriorityQueueEntry<T>>);
+   |        ^^^^^^^^^^^^^ no implementation for `PriorityQueue<T> == PriorityQueue<T>`
    |
 help: the trait `PartialEq` is not implemented for `PriorityQueue<T>`
-  --> $DIR/issue-104884-trait-impl-sugg-err.rs:21:1
+  --> $DIR/issue-104884-trait-impl-sugg-err.rs:19:1
    |
 LL | struct PriorityQueue<T>(BinaryHeap<PriorityQueueEntry<T>>);
    | ^^^^^^^^^^^^^^^^^^^^^^^
@@ -19,7 +22,7 @@ LL | #[derive(PartialOrd, AddImpl)]
    |                      ^^^^^^^ unsatisfied trait bound
    |
 help: the trait `Eq` is not implemented for `PriorityQueue<T>`
-  --> $DIR/issue-104884-trait-impl-sugg-err.rs:21:1
+  --> $DIR/issue-104884-trait-impl-sugg-err.rs:19:1
    |
 LL | struct PriorityQueue<T>(BinaryHeap<PriorityQueueEntry<T>>);
    | ^^^^^^^^^^^^^^^^^^^^^^^
@@ -34,15 +37,19 @@ LL | #[derive(PartialOrd, AddImpl)]
    |                      ^^^^^^^ no implementation for `T < T` and `T > T`
    |
 note: required for `PriorityQueue<T>` to implement `PartialOrd`
-  --> $DIR/issue-104884-trait-impl-sugg-err.rs:14:10
+  --> $DIR/issue-104884-trait-impl-sugg-err.rs:19:8
    |
 LL | #[derive(PartialOrd, AddImpl)]
-   |          ^^^^^^^^^^ unsatisfied trait bound introduced in this `derive` macro
+   |          ---------- in this derive macro expansion
+...
+LL | struct PriorityQueue<T>(BinaryHeap<PriorityQueueEntry<T>>);
+   |        ^^^^^^^^^^^^^ - type parameter would need to implement `PartialOrd`
+   = help: consider manually implementing `PartialOrd` to avoid undesired bounds
 note: required by a bound in `Ord`
   --> $SRC_DIR/core/src/cmp.rs:LL:COL
 
 error[E0277]: can't compare `BinaryHeap<PriorityQueueEntry<T>>` with `_`
-  --> $DIR/issue-104884-trait-impl-sugg-err.rs:21:25
+  --> $DIR/issue-104884-trait-impl-sugg-err.rs:19:25
    |
 LL | #[derive(PartialOrd, AddImpl)]
    |          ---------- in this derive macro expansion

tests/ui/range/range_traits-2.rs

@@ -1,6 +1,6 @@
 use std::ops::*;
 
-#[derive(Copy, Clone)] //~ ERROR Copy
-struct R(Range<usize>);
+#[derive(Copy, Clone)]
+struct R(Range<usize>); //~ ERROR Copy
 
 fn main() {}

tests/ui/range/range_traits-2.stderr

@@ -1,10 +1,10 @@
 error[E0204]: the trait `Copy` cannot be implemented for this type
-  --> $DIR/range_traits-2.rs:3:10
+  --> $DIR/range_traits-2.rs:4:8
    |
 LL | #[derive(Copy, Clone)]
-   |          ^^^^
+   |          ---- in this derive macro expansion
 LL | struct R(Range<usize>);
-   |          ------------ this field does not implement `Copy`
+   |        ^ ------------ this field does not implement `Copy`
 
 error: aborting due to 1 previous error
 

tests/ui/range/range_traits-3.rs

@@ -1,6 +1,6 @@
 use std::ops::*;
 
-#[derive(Copy, Clone)] //~ ERROR Copy
-struct R(RangeFrom<usize>);
+#[derive(Copy, Clone)]
+struct R(RangeFrom<usize>); //~ ERROR Copy
 
 fn main() {}

tests/ui/range/range_traits-3.stderr

@@ -1,10 +1,10 @@
 error[E0204]: the trait `Copy` cannot be implemented for this type
-  --> $DIR/range_traits-3.rs:3:10
+  --> $DIR/range_traits-3.rs:4:8
    |
 LL | #[derive(Copy, Clone)]
-   |          ^^^^
+   |          ---- in this derive macro expansion
 LL | struct R(RangeFrom<usize>);
-   |          ---------------- this field does not implement `Copy`
+   |        ^ ---------------- this field does not implement `Copy`
 
 error: aborting due to 1 previous error
 

tests/ui/range/range_traits-6.rs

@@ -1,6 +1,6 @@
 use std::ops::*;
 
-#[derive(Copy, Clone)] //~ ERROR Copy
-struct R(RangeInclusive<usize>);
+#[derive(Copy, Clone)]
+struct R(RangeInclusive<usize>); //~ ERROR Copy
 
 fn main() {}

tests/ui/range/range_traits-6.stderr

@@ -1,10 +1,10 @@
 error[E0204]: the trait `Copy` cannot be implemented for this type
-  --> $DIR/range_traits-6.rs:3:10
+  --> $DIR/range_traits-6.rs:4:8
    |
 LL | #[derive(Copy, Clone)]
-   |          ^^^^
+   |          ---- in this derive macro expansion
 LL | struct R(RangeInclusive<usize>);
-   |          --------------------- this field does not implement `Copy`
+   |        ^ --------------------- this field does not implement `Copy`
 
 error: aborting due to 1 previous error
 

tests/ui/span/E0204.rs

@@ -4,8 +4,8 @@ struct Foo {
 
 impl Copy for Foo { } //~ ERROR cannot be implemented for this type
 
-#[derive(Copy)] //~ ERROR cannot be implemented for this type
-struct Foo2<'a> {
+#[derive(Copy)]
+struct Foo2<'a> { //~ ERROR cannot be implemented for this type
     ty: &'a mut bool,
 }
 
@@ -16,8 +16,8 @@ enum EFoo {
 
 impl Copy for EFoo { } //~ ERROR cannot be implemented for this type
 
-#[derive(Copy)] //~ ERROR cannot be implemented for this type
-enum EFoo2<'a> {
+#[derive(Copy)]
+enum EFoo2<'a> { //~ ERROR cannot be implemented for this type
     Bar(&'a mut bool),
     Baz,
 }

tests/ui/span/E0204.stderr

@@ -8,11 +8,12 @@ LL | impl Copy for Foo { }
    |               ^^^
 
 error[E0204]: the trait `Copy` cannot be implemented for this type
-  --> $DIR/E0204.rs:7:10
+  --> $DIR/E0204.rs:8:8
    |
 LL | #[derive(Copy)]
-   |          ^^^^
+   |          ---- in this derive macro expansion
 LL | struct Foo2<'a> {
+   |        ^^^^
 LL |     ty: &'a mut bool,
    |     ---------------- this field does not implement `Copy`
 
@@ -26,11 +27,12 @@ LL | impl Copy for EFoo { }
    |               ^^^^
 
 error[E0204]: the trait `Copy` cannot be implemented for this type
-  --> $DIR/E0204.rs:19:10
+  --> $DIR/E0204.rs:20:6
    |
 LL | #[derive(Copy)]
-   |          ^^^^
+   |          ---- in this derive macro expansion
 LL | enum EFoo2<'a> {
+   |      ^^^^^
 LL |     Bar(&'a mut bool),
    |         ------------ this field does not implement `Copy`
 

tests/ui/suggestions/derive-clone-already-present-issue-146515.rs

@@ -2,8 +2,8 @@
 
 use std::rc::Rc;
 
-#[derive(Clone)]
-struct ContainsRc<T> {
+#[derive(Clone)] //~ NOTE in this expansion
+struct ContainsRc<T> { //~ NOTE derive introduces an implicit `T: Clone` bound
     value: Rc<T>,
 }
 
@@ -14,7 +14,6 @@ fn clone_me<T>(x: &ContainsRc<T>) -> ContainsRc<T> {
     //~| NOTE expected `ContainsRc<T>`, found `&ContainsRc<T>`
     //~| NOTE expected struct `ContainsRc<_>`
     //~| NOTE `ContainsRc<T>` does not implement `Clone`, so `&ContainsRc<T>` was cloned instead
-    //~| NOTE the trait `Clone` must be implemented
 }
 
 fn main() {}

tests/ui/suggestions/derive-clone-already-present-issue-146515.stderr

@@ -14,9 +14,14 @@ note: `ContainsRc<T>` does not implement `Clone`, so `&ContainsRc<T>` was cloned
    |
 LL |     x.clone()
    |     ^
-   = help: `Clone` is not implemented because the trait bound `T: Clone` is not satisfied
-note: the trait `Clone` must be implemented
-  --> $SRC_DIR/core/src/clone.rs:LL:COL
+help: `Clone` is not implemented because a trait bound is not satisfied
+  --> $DIR/derive-clone-already-present-issue-146515.rs:6:19
+   |
+LL | #[derive(Clone)]
+   |          ----- in this derive macro expansion
+LL | struct ContainsRc<T> {
+   |                   ^ derive introduces an implicit `T: Clone` bound
+   = help: consider manually implementing `Clone` to avoid the implicit type parameter bounds
 
 error: aborting due to 1 previous error
 

tests/ui/suggestions/derive-clone-for-eq.fixed

@@ -1,8 +1,8 @@
 //@ run-rustfix
 // https://github.com/rust-lang/rust/issues/79076
 
-#[derive(Clone, Eq)] //~ ERROR [E0277]
-pub struct Struct<T: std::clone::Clone>(T);
+#[derive(Clone, Eq)]
+pub struct Struct<T: std::clone::Clone>(T); //~ ERROR [E0277]
 
 impl<T: Clone, U> PartialEq<U> for Struct<T>
 where

tests/ui/suggestions/derive-clone-for-eq.rs

@@ -1,8 +1,8 @@
 //@ run-rustfix
 // https://github.com/rust-lang/rust/issues/79076
 
-#[derive(Clone, Eq)] //~ ERROR [E0277]
-pub struct Struct<T>(T);
+#[derive(Clone, Eq)]
+pub struct Struct<T>(T); //~ ERROR [E0277]
 
 impl<T: Clone, U> PartialEq<U> for Struct<T>
 where

tests/ui/suggestions/derive-clone-for-eq.stderr

@@ -1,8 +1,10 @@
 error[E0277]: the trait bound `T: Clone` is not satisfied
-  --> $DIR/derive-clone-for-eq.rs:4:17
+  --> $DIR/derive-clone-for-eq.rs:5:12
    |
 LL | #[derive(Clone, Eq)]
-   |                 ^^ the trait `Clone` is not implemented for `T`
+   |                 -- in this derive macro expansion
+LL | pub struct Struct<T>(T);
+   |            ^^^^^^ the trait `Clone` is not implemented for `T`
    |
 note: required for `Struct<T>` to implement `PartialEq`
   --> $DIR/derive-clone-for-eq.rs:7:19

tests/ui/suggestions/missing-bound-in-derive-copy-impl-2.stderr

@@ -24,12 +24,13 @@ LL |     pub loc: Vector2<K>,
    |     ^^^^^^^^^^^^^^^^^^^ the trait `Copy` is not implemented for `K`
    |
 note: required for `Vector2<K>` to implement `Debug`
-  --> $DIR/missing-bound-in-derive-copy-impl-2.rs:4:10
+  --> $DIR/missing-bound-in-derive-copy-impl-2.rs:5:12
    |
 LL | #[derive(Debug, Copy, Clone)]
-   |          ^^^^^
+   |          ----- in this derive macro expansion
 LL | pub struct Vector2<T: Debug + Copy + Clone> {
-   |                               ---- unsatisfied trait bound introduced in this `derive` macro
+   |            ^^^^^^^            ---- unsatisfied trait bound
+   = help: consider manually implementing `Debug` to avoid undesired bounds
    = note: required for the cast from `&Vector2<K>` to `&dyn Debug`
 help: consider further restricting type parameter `K` with trait `Copy`
    |
@@ -65,12 +66,13 @@ LL |     pub size: Vector2<K>,
    |     ^^^^^^^^^^^^^^^^^^^^ the trait `Copy` is not implemented for `K`
    |
 note: required for `Vector2<K>` to implement `Clone`
-  --> $DIR/missing-bound-in-derive-copy-impl-2.rs:4:23
+  --> $DIR/missing-bound-in-derive-copy-impl-2.rs:5:12
    |
 LL | #[derive(Debug, Copy, Clone)]
-   |                       ^^^^^
+   |                       ----- in this derive macro expansion
 LL | pub struct Vector2<T: Debug + Copy + Clone> {
-   |                               ---- unsatisfied trait bound introduced in this `derive` macro
+   |            ^^^^^^^            ---- unsatisfied trait bound
+   = help: consider manually implementing `Clone` to avoid undesired bounds
 help: consider further restricting type parameter `K` with trait `Copy`
    |
 LL | pub struct AABB<K: Debug + std::marker::Copy> {

tests/ui/suggestions/missing-bound-in-derive-copy-impl-3.fixed

@@ -7,8 +7,8 @@ pub struct Vector2<T: Debug + Copy + Clone>{
     pub y: T
 }
 
-#[derive(Debug, Copy, Clone)] //~ ERROR the trait `Copy` cannot be implemented for this type
-pub struct AABB<K: Copy + Debug + std::fmt::Debug>{
+#[derive(Debug, Copy, Clone)]
+pub struct AABB<K: Copy + Debug + std::fmt::Debug> { //~ ERROR the trait `Copy` cannot be implemented for this type
     pub loc: Vector2<K>, //~ ERROR `K` doesn't implement `Debug`
     //~^ ERROR `K` doesn't implement `Debug`
     pub size: Vector2<K> //~ ERROR `K` doesn't implement `Debug`

tests/ui/suggestions/missing-bound-in-derive-copy-impl-3.rs

@@ -7,8 +7,8 @@ pub struct Vector2<T: Debug + Copy + Clone>{
     pub y: T
 }
 
-#[derive(Debug, Copy, Clone)] //~ ERROR the trait `Copy` cannot be implemented for this type
-pub struct AABB<K: Copy>{
+#[derive(Debug, Copy, Clone)]
+pub struct AABB<K: Copy> { //~ ERROR the trait `Copy` cannot be implemented for this type
     pub loc: Vector2<K>, //~ ERROR `K` doesn't implement `Debug`
     //~^ ERROR `K` doesn't implement `Debug`
     pub size: Vector2<K> //~ ERROR `K` doesn't implement `Debug`

tests/ui/suggestions/missing-bound-in-derive-copy-impl-3.stderr

@@ -1,9 +1,10 @@
 error[E0204]: the trait `Copy` cannot be implemented for this type
-  --> $DIR/missing-bound-in-derive-copy-impl-3.rs:10:17
+  --> $DIR/missing-bound-in-derive-copy-impl-3.rs:11:12
    |
 LL | #[derive(Debug, Copy, Clone)]
-   |                 ^^^^
-LL | pub struct AABB<K: Copy>{
+   |                 ---- in this derive macro expansion
+LL | pub struct AABB<K: Copy> {
+   |            ^^^^
 LL |     pub loc: Vector2<K>,
    |     ------------------- this field does not implement `Copy`
    |
@@ -14,7 +15,7 @@ LL |     pub loc: Vector2<K>,
    |              ^^^^^^^^^^
 help: consider further restricting type parameter `K` with trait `Debug`
    |
-LL | pub struct AABB<K: Copy + Debug>{
+LL | pub struct AABB<K: Copy + Debug> {
    |                         +++++++
 
 error[E0277]: `K` doesn't implement `Debug`
@@ -30,7 +31,7 @@ LL | pub struct Vector2<T: Debug + Copy + Clone>{
    |                       ^^^^^ required by this bound in `Vector2`
 help: consider further restricting type parameter `K` with trait `Debug`
    |
-LL | pub struct AABB<K: Copy + std::fmt::Debug>{
+LL | pub struct AABB<K: Copy + std::fmt::Debug> {
    |                         +++++++++++++++++
 
 error[E0277]: `K` doesn't implement `Debug`
@@ -38,13 +39,13 @@ error[E0277]: `K` doesn't implement `Debug`
    |
 LL | #[derive(Debug, Copy, Clone)]
    |                       ----- in this derive macro expansion
-LL | pub struct AABB<K: Copy>{
+LL | pub struct AABB<K: Copy> {
 LL |     pub loc: Vector2<K>,
    |     ^^^^^^^^^^^^^^^^^^^ the trait `Debug` is not implemented for `K`
    |
 help: consider further restricting type parameter `K` with trait `Debug`
    |
-LL | pub struct AABB<K: Copy + std::fmt::Debug>{
+LL | pub struct AABB<K: Copy + std::fmt::Debug> {
    |                         +++++++++++++++++
 
 error[E0277]: `K` doesn't implement `Debug`
@@ -58,7 +59,7 @@ LL |     pub size: Vector2<K>
    |
 help: consider further restricting type parameter `K` with trait `Debug`
    |
-LL | pub struct AABB<K: Copy + std::fmt::Debug>{
+LL | pub struct AABB<K: Copy + std::fmt::Debug> {
    |                         +++++++++++++++++
 
 error: aborting due to 4 previous errors

tests/ui/suggestions/missing-bound-in-derive-copy-impl.rs

@@ -6,8 +6,8 @@ pub struct Vector2<T: Debug + Copy + Clone> {
     pub y: T,
 }
 
-#[derive(Debug, Copy, Clone)] //~ ERROR the trait `Copy` cannot be implemented for this type
-pub struct AABB<K> {
+#[derive(Debug, Copy, Clone)]
+pub struct AABB<K> { //~ ERROR the trait `Copy` cannot be implemented for this type
     pub loc: Vector2<K>,
     //~^ ERROR doesn't implement `Debug`
     //~| ERROR `K: Copy` is not satisfied

tests/ui/suggestions/missing-bound-in-derive-copy-impl.stderr

@@ -1,9 +1,10 @@
 error[E0204]: the trait `Copy` cannot be implemented for this type
-  --> $DIR/missing-bound-in-derive-copy-impl.rs:9:17
+  --> $DIR/missing-bound-in-derive-copy-impl.rs:10:12
    |
 LL | #[derive(Debug, Copy, Clone)]
-   |                 ^^^^
+   |                 ---- in this derive macro expansion
 LL | pub struct AABB<K> {
+   |            ^^^^
 LL |     pub loc: Vector2<K>,
    |     ------------------- this field does not implement `Copy`
    |
@@ -59,12 +60,13 @@ LL |     pub loc: Vector2<K>,
    |     ^^^^^^^^^^^^^^^^^^^ the trait `Copy` is not implemented for `K`
    |
 note: required for `Vector2<K>` to implement `Debug`
-  --> $DIR/missing-bound-in-derive-copy-impl.rs:3:10
+  --> $DIR/missing-bound-in-derive-copy-impl.rs:4:12
    |
 LL | #[derive(Debug, Copy, Clone)]
-   |          ^^^^^
+   |          ----- in this derive macro expansion
 LL | pub struct Vector2<T: Debug + Copy + Clone> {
-   |                               ---- unsatisfied trait bound introduced in this `derive` macro
+   |            ^^^^^^^            ---- unsatisfied trait bound
+   = help: consider manually implementing `Debug` to avoid undesired bounds
    = note: required for the cast from `&Vector2<K>` to `&dyn Debug`
 help: consider restricting type parameter `K` with trait `Copy`
    |
@@ -128,12 +130,13 @@ LL |     pub size: Vector2<K>,
    |     ^^^^^^^^^^^^^^^^^^^^ the trait `Copy` is not implemented for `K`
    |
 note: required for `Vector2<K>` to implement `Clone`
-  --> $DIR/missing-bound-in-derive-copy-impl.rs:3:23
+  --> $DIR/missing-bound-in-derive-copy-impl.rs:4:12
    |
 LL | #[derive(Debug, Copy, Clone)]
-   |                       ^^^^^
+   |                       ----- in this derive macro expansion
 LL | pub struct Vector2<T: Debug + Copy + Clone> {
-   |                               ---- unsatisfied trait bound introduced in this `derive` macro
+   |            ^^^^^^^            ---- unsatisfied trait bound
+   = help: consider manually implementing `Clone` to avoid undesired bounds
 help: consider restricting type parameter `K` with trait `Copy`
    |
 LL | pub struct AABB<K: std::marker::Copy> {

tests/ui/traits/derive-implicit-bound-on-clone.rs

@@ -0,0 +1,24 @@
+// Issue #146515
+use std::rc::Rc;
+
+#[derive(Clone)]
+struct ContainsRc<T, K> { //~ HELP `Clone` is not implemented
+    value: Rc<(T, K)>,
+}
+
+fn clone_me<T, K>(x: &ContainsRc<T, K>) -> ContainsRc<T, K> {
+    x.clone() //~ ERROR E0308
+    //~^ HELP consider manually implementing `Clone`
+}
+
+#[derive(Clone)]
+struct ContainsRcSingle<T> { //~ HELP `Clone` is not implemented
+    value: Rc<T>,
+}
+
+fn clone_me_single<T>(x: &ContainsRcSingle<T>) -> ContainsRcSingle<T> {
+    x.clone() //~ ERROR E0308
+    //~^ HELP consider manually implementing `Clone`
+}
+
+fn main() {}

tests/ui/traits/derive-implicit-bound-on-clone.stderr

@@ -0,0 +1,53 @@
+error[E0308]: mismatched types
+  --> $DIR/derive-implicit-bound-on-clone.rs:10:5
+   |
+LL | fn clone_me<T, K>(x: &ContainsRc<T, K>) -> ContainsRc<T, K> {
+   |                                            ---------------- expected `ContainsRc<T, K>` because of return type
+LL |     x.clone()
+   |     ^^^^^^^^^ expected `ContainsRc<T, K>`, found `&ContainsRc<T, K>`
+   |
+   = note: expected struct `ContainsRc<_, _>`
+           found reference `&ContainsRc<_, _>`
+note: `ContainsRc<T, K>` does not implement `Clone`, so `&ContainsRc<T, K>` was cloned instead
+  --> $DIR/derive-implicit-bound-on-clone.rs:10:5
+   |
+LL |     x.clone()
+   |     ^
+help: `Clone` is not implemented because the some trait bounds could not be satisfied
+  --> $DIR/derive-implicit-bound-on-clone.rs:5:19
+   |
+LL | #[derive(Clone)]
+   |          ----- in this derive macro expansion
+LL | struct ContainsRc<T, K> {
+   |                   ^  ^ derive introduces an implicit unsatisfied trait bound `K: Clone`
+   |                   |
+   |                   derive introduces an implicit unsatisfied trait bound `T: Clone`
+   = help: consider manually implementing `Clone` to avoid the implicit type parameter bounds
+
+error[E0308]: mismatched types
+  --> $DIR/derive-implicit-bound-on-clone.rs:20:5
+   |
+LL | fn clone_me_single<T>(x: &ContainsRcSingle<T>) -> ContainsRcSingle<T> {
+   |                                                   ------------------- expected `ContainsRcSingle<T>` because of return type
+LL |     x.clone()
+   |     ^^^^^^^^^ expected `ContainsRcSingle<T>`, found `&ContainsRcSingle<T>`
+   |
+   = note: expected struct `ContainsRcSingle<_>`
+           found reference `&ContainsRcSingle<_>`
+note: `ContainsRcSingle<T>` does not implement `Clone`, so `&ContainsRcSingle<T>` was cloned instead
+  --> $DIR/derive-implicit-bound-on-clone.rs:20:5
+   |
+LL |     x.clone()
+   |     ^
+help: `Clone` is not implemented because a trait bound is not satisfied
+  --> $DIR/derive-implicit-bound-on-clone.rs:15:25
+   |
+LL | #[derive(Clone)]
+   |          ----- in this derive macro expansion
+LL | struct ContainsRcSingle<T> {
+   |                         ^ derive introduces an implicit `T: Clone` bound
+   = help: consider manually implementing `Clone` to avoid the implicit type parameter bounds
+
+error: aborting due to 2 previous errors
+
+For more information about this error, try `rustc --explain E0308`.

tests/ui/traits/derive-implicit-bound.rs

@@ -0,0 +1,34 @@
+// Second case reported in issue #108894.
+
+use std::marker::PhantomData;
+
+#[derive(PartialEq, Eq)]
+pub struct Id<T>(PhantomData<T>);
+
+// manual implementation which would break the usage of const patterns
+// impl<T> PartialEq for Id<T> { fn eq(&self, _: &Id<T>) -> bool { true } }
+// impl<T> Eq for Id<T> {}
+
+// This derive is undesired but cannot be removed without
+// breaking the usages below
+// #[derive(PartialEq, Eq)]
+struct SomeNode();
+
+fn accept_eq(_: &impl PartialEq) { }
+
+fn main() {
+    let node = Id::<SomeNode>(PhantomData);
+
+    // this will only work if
+    // - `Partial/Eq` is implemented manually, or
+    // - `SomeNode` also needlessly(?) implements `Partial/Eq`
+    accept_eq(&node); //~ ERROR can't compare `SomeNode` with `SomeNode`
+
+    const CONST_ID: Id::<SomeNode> = Id::<SomeNode>(PhantomData);
+    // this will work only when `Partial/Eq` is being derived
+    // otherwise: error: to use a constant of type `Id<SomeNode>` in a pattern,
+    //   `Id<SomeNode>` must be annotated with `#[derive(PartialEq, Eq)]`
+    match node {
+        CONST_ID => {}
+    }
+}

tests/ui/traits/derive-implicit-bound.stderr

@@ -0,0 +1,31 @@
+error[E0277]: can't compare `SomeNode` with `SomeNode`
+  --> $DIR/derive-implicit-bound.rs:25:15
+   |
+LL |     accept_eq(&node);
+   |     --------- ^^^^^ no implementation for `SomeNode == SomeNode`
+   |     |
+   |     required by a bound introduced by this call
+   |
+   = help: the trait `PartialEq` is not implemented for `SomeNode`
+note: required for `Id<SomeNode>` to implement `PartialEq`
+  --> $DIR/derive-implicit-bound.rs:6:12
+   |
+LL | #[derive(PartialEq, Eq)]
+   |          --------- in this derive macro expansion
+LL | pub struct Id<T>(PhantomData<T>);
+   |            ^^ - type parameter would need to implement `PartialEq`
+   = help: consider manually implementing `PartialEq` to avoid undesired bounds
+note: required by a bound in `accept_eq`
+  --> $DIR/derive-implicit-bound.rs:17:23
+   |
+LL | fn accept_eq(_: &impl PartialEq) { }
+   |                       ^^^^^^^^^ required by this bound in `accept_eq`
+help: consider annotating `SomeNode` with `#[derive(PartialEq)]`
+   |
+LL + #[derive(PartialEq)]
+LL | struct SomeNode();
+   |
+
+error: aborting due to 1 previous error
+
+For more information about this error, try `rustc --explain E0277`.

tests/ui/traits/issue-106072.rs

@@ -1,6 +1,4 @@
-#[derive(Clone)]
-//~^ ERROR expected a type, found a trait
-//~| ERROR expected a type, found a trait
-struct Foo;
-trait Foo {} //~ ERROR the name `Foo` is defined multiple times
+#[derive(Clone)] //~ ERROR: expected a type, found a trait
+struct Foo; //~ ERROR: expected a type, found a trait
+trait Foo {} //~ ERROR: the name `Foo` is defined multiple times
 fn main() {}

tests/ui/traits/issue-106072.stderr

@@ -1,5 +1,5 @@
 error[E0428]: the name `Foo` is defined multiple times
-  --> $DIR/issue-106072.rs:5:1
+  --> $DIR/issue-106072.rs:3:1
    |
 LL | struct Foo;
    | ----------- previous definition of the type `Foo` here
@@ -9,18 +9,18 @@ LL | trait Foo {}
    = note: `Foo` must be defined only once in the type namespace of this module
 
 error[E0782]: expected a type, found a trait
-  --> $DIR/issue-106072.rs:1:10
+  --> $DIR/issue-106072.rs:2:8
    |
 LL | #[derive(Clone)]
-   |          ^^^^^
+   |          ----- in this derive macro expansion
+LL | struct Foo;
+   |        ^^^
 
 error[E0782]: expected a type, found a trait
   --> $DIR/issue-106072.rs:1:10
    |
 LL | #[derive(Clone)]
    |          ^^^^^
-   |
-   = note: duplicate diagnostic emitted due to `-Z deduplicate-diagnostics=no`
 
 error: aborting due to 3 previous errors
 

tests/ui/traits/issue-50480.rs

@@ -1,18 +1,17 @@
 #[derive(Clone, Copy)]
-//~^ ERROR the trait `Copy` cannot be implemented for this type
 struct Foo(N, NotDefined, <i32 as Iterator>::Item, Vec<i32>, String);
-//~^ ERROR cannot find type `NotDefined` in this scope
+//~^ ERROR the trait `Copy` cannot be implemented for this type
+//~| ERROR cannot find type `NotDefined` in this scope
 //~| ERROR cannot find type `NotDefined` in this scope
 //~| ERROR cannot find type `N` in this scope
 //~| ERROR cannot find type `N` in this scope
 //~| ERROR `i32` is not an iterator
 //~| ERROR `i32` is not an iterator
 
-#[derive(Clone, Copy)]
-//~^ ERROR the trait `Copy` cannot be implemented for this type
-//~| ERROR `i32` is not an iterator
+#[derive(Clone, Copy)] //~ ERROR `i32` is not an iterator
 struct Bar<T>(T, N, NotDefined, <i32 as Iterator>::Item, Vec<i32>, String);
-//~^ ERROR cannot find type `NotDefined` in this scope
+//~^ ERROR the trait `Copy` cannot be implemented for this type
+//~| ERROR cannot find type `NotDefined` in this scope
 //~| ERROR cannot find type `N` in this scope
 //~| ERROR `i32` is not an iterator
 //~| ERROR `i32` is not an iterator