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Rollup merge of #154094 - folkertdev:aarch64-arm-load-store, r=sayantn
add neon load/store assembly test I'm adding this test because it was requested for the beta backport of https://github.com/rust-lang/rust/issues/153336. We'd like to test this with Miri, but currently there is no load/store pair that roundtrips because one or the other still uses the platform-specific intrinsics. r? sayantn I believe test-various runs some arm and android tests? @bors try job=test-various
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@@ -213,6 +213,7 @@
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"only-apple",
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"only-arm",
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"only-arm64ec",
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"only-armv7-unknown-linux-gnueabihf",
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"only-avr",
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"only-beta",
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"only-bpf",
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@@ -0,0 +1,78 @@
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//@ assembly-output: emit-asm
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//
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//@ revisions: AARCH64
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//@[AARCH64] compile-flags: -Copt-level=3
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//@[AARCH64] only-aarch64-unknown-linux-gnu
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//
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//@ revisions: ARMV7
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//@[ARMV7] compile-flags: -Copt-level=3
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//@[ARMV7] only-armv7-unknown-linux-gnueabihf
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//@[ARMV7] ignore-thumb
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//@[ARMV7] ignore-android
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#![crate_type = "lib"]
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#![cfg_attr(target_arch = "arm", feature(arm_target_feature, stdarch_arm_neon_intrinsics))]
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#[cfg(target_arch = "aarch64")]
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use std::arch::aarch64::*;
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#[cfg(target_arch = "arm")]
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use std::arch::arm::*;
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// Loads of 3 are error-prone because a `repr(simd)` type's size is always rounded up to the next
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// power of 2. Hence, using `read_unaligned` and `write_unaligned` on such types is invalid, it
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// would go out of bounds.
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#[unsafe(no_mangle)]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "neon,v7"))]
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fn test_vld3q_f32(ptr: *const f32) -> float32x4x3_t {
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// AARCH64-LABEL: test_vld3q_f32
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// AARCH64: ld3 { v0.4s, v1.4s, v2.4s }, [x0]
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// AARCH64: stp q0, q1, [x8]
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// AARCH64: str q2, [x8, #32]
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// AARCH64: ret
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//
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// ARMV7-LABEL: test_vld3q_f32
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// ARMV7: vld3.32 {d16, d18, d20}, [r1]!
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// ARMV7: vld3.32 {d17, d19, d21}, [r1]
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// ARMV7: vst1.32 {d16, d17}, [r0]!
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// ARMV7: vst1.32 {d18, d19}, [r0]!
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// ARMV7: vst1.64 {d20, d21}, [r0]
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// ARMV7: bx lr
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unsafe { vld3q_f32(ptr) }
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}
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#[unsafe(no_mangle)]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "neon,v7"))]
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fn test_vld3q_s32(ptr: *const i32) -> int32x4x3_t {
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// AARCH64-LABEL: test_vld3q_s32
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// AARCH64: ld3 { v0.4s, v1.4s, v2.4s }, [x0]
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// AARCH64: stp q0, q1, [x8]
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// AARCH64: str q2, [x8, #32]
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// AARCH64: ret
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//
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// ARMV7-LABEL: test_vld3q_s32
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// ARMV7: vld3.32 {d16, d18, d20}, [r1]!
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// ARMV7: vld3.32 {d17, d19, d21}, [r1]
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// ARMV7: vst1.32 {d16, d17}, [r0]!
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// ARMV7: vst1.32 {d18, d19}, [r0]!
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// ARMV7: vst1.64 {d20, d21}, [r0]
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// ARMV7: bx lr
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unsafe { vld3q_s32(ptr) }
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}
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#[unsafe(no_mangle)]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "neon,v7"))]
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fn test_vld3q_u32(ptr: *const u32) -> uint32x4x3_t {
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// AARCH64-LABEL: test_vld3q_u32
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// AARCH64: ld3 { v0.4s, v1.4s, v2.4s }, [x0]
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// AARCH64: stp q0, q1, [x8]
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// AARCH64: str q2, [x8, #32]
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// AARCH64: ret
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//
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// ARMV7-LABEL: test_vld3q_u32
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// ARMV7: vld3.32 {d16, d18, d20}, [r1]!
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// ARMV7: vld3.32 {d17, d19, d21}, [r1]
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// ARMV7: vst1.32 {d16, d17}, [r0]!
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// ARMV7: vst1.32 {d18, d19}, [r0]!
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// ARMV7: vst1.64 {d20, d21}, [r0]
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// ARMV7: bx lr
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unsafe { vld3q_u32(ptr) }
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}
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