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Merge pull request #1956 from sayantn/fix-tests

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correct some `#[simd_test]` attributes
This commit is contained in:
Folkert de Vries
2025-11-16 23:00:42 +00:00
committed by GitHub
parent d84c69548d 8fe87e9623
commit 7f3fcb347b
8 changed files with 110 additions and 105 deletions
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library/stdarch/crates/core_arch/src/x86/avx2.rs
+1 -1
View File
@@ -5749,7 +5749,7 @@ unsafe fn test_mm256_mask_i64gather_pd() {
assert_eq_m256d(r, _mm256_setr_pd(0.0, 16.0, 64.0, 256.0));
}
#[simd_test(enable = "avx")]
#[simd_test(enable = "avx2")]
unsafe fn test_mm256_extract_epi8() {
#[rustfmt::skip]
let a = _mm256_setr_epi8(
library/stdarch/crates/core_arch/src/x86/avx512bw.rs
+66 -66
View File
@@ -13335,7 +13335,7 @@ unsafe fn test_mm512_max_epu16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_max_epu16() {
#[rustfmt::skip]
let a = _mm512_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13352,7 +13352,7 @@ unsafe fn test_mm512_mask_max_epu16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_maskz_max_epu16() {
#[rustfmt::skip]
let a = _mm512_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13369,7 +13369,7 @@ unsafe fn test_mm512_maskz_max_epu16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_max_epu16() {
let a = _mm256_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm256_set_epi16(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -13380,7 +13380,7 @@ unsafe fn test_mm256_mask_max_epu16() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_maskz_max_epu16() {
let a = _mm256_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm256_set_epi16(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -13391,7 +13391,7 @@ unsafe fn test_mm256_maskz_max_epu16() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_mask_max_epu16() {
let a = _mm_set_epi16(0, 1, 2, 3, 4, 5, 6, 7);
let b = _mm_set_epi16(7, 6, 5, 4, 3, 2, 1, 0);
@@ -13402,7 +13402,7 @@ unsafe fn test_mm_mask_max_epu16() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_maskz_max_epu16() {
let a = _mm_set_epi16(0, 1, 2, 3, 4, 5, 6, 7);
let b = _mm_set_epi16(7, 6, 5, 4, 3, 2, 1, 0);
@@ -13434,7 +13434,7 @@ unsafe fn test_mm512_max_epu8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_max_epu8() {
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13462,7 +13462,7 @@ unsafe fn test_mm512_mask_max_epu8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_maskz_max_epu8() {
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13489,7 +13489,7 @@ unsafe fn test_mm512_maskz_max_epu8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_max_epu8() {
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13506,7 +13506,7 @@ unsafe fn test_mm256_mask_max_epu8() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_maskz_max_epu8() {
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13523,7 +13523,7 @@ unsafe fn test_mm256_maskz_max_epu8() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_mask_max_epu8() {
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm_set_epi8(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -13534,7 +13534,7 @@ unsafe fn test_mm_mask_max_epu8() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_maskz_max_epu8() {
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm_set_epi8(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -13560,7 +13560,7 @@ unsafe fn test_mm512_max_epi16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_max_epi16() {
#[rustfmt::skip]
let a = _mm512_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13577,7 +13577,7 @@ unsafe fn test_mm512_mask_max_epi16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_maskz_max_epi16() {
#[rustfmt::skip]
let a = _mm512_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13594,7 +13594,7 @@ unsafe fn test_mm512_maskz_max_epi16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_max_epi16() {
let a = _mm256_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm256_set_epi16(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -13605,7 +13605,7 @@ unsafe fn test_mm256_mask_max_epi16() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_maskz_max_epi16() {
let a = _mm256_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm256_set_epi16(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -13616,7 +13616,7 @@ unsafe fn test_mm256_maskz_max_epi16() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_mask_max_epi16() {
let a = _mm_set_epi16(0, 1, 2, 3, 4, 5, 6, 7);
let b = _mm_set_epi16(7, 6, 5, 4, 3, 2, 1, 0);
@@ -13627,7 +13627,7 @@ unsafe fn test_mm_mask_max_epi16() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_maskz_max_epi16() {
let a = _mm_set_epi16(0, 1, 2, 3, 4, 5, 6, 7);
let b = _mm_set_epi16(7, 6, 5, 4, 3, 2, 1, 0);
@@ -13659,7 +13659,7 @@ unsafe fn test_mm512_max_epi8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_max_epi8() {
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13687,7 +13687,7 @@ unsafe fn test_mm512_mask_max_epi8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_maskz_max_epi8() {
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13714,7 +13714,7 @@ unsafe fn test_mm512_maskz_max_epi8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_max_epi8() {
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13731,7 +13731,7 @@ unsafe fn test_mm256_mask_max_epi8() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_maskz_max_epi8() {
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13748,7 +13748,7 @@ unsafe fn test_mm256_maskz_max_epi8() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_mask_max_epi8() {
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm_set_epi8(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -13759,7 +13759,7 @@ unsafe fn test_mm_mask_max_epi8() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_maskz_max_epi8() {
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm_set_epi8(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -13785,7 +13785,7 @@ unsafe fn test_mm512_min_epu16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_min_epu16() {
#[rustfmt::skip]
let a = _mm512_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13802,7 +13802,7 @@ unsafe fn test_mm512_mask_min_epu16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_maskz_min_epu16() {
#[rustfmt::skip]
let a = _mm512_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13819,7 +13819,7 @@ unsafe fn test_mm512_maskz_min_epu16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_min_epu16() {
let a = _mm256_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm256_set_epi16(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -13830,7 +13830,7 @@ unsafe fn test_mm256_mask_min_epu16() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_maskz_min_epu16() {
let a = _mm256_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm256_set_epi16(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -13841,7 +13841,7 @@ unsafe fn test_mm256_maskz_min_epu16() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_mask_min_epu16() {
let a = _mm_set_epi16(0, 1, 2, 3, 4, 5, 6, 7);
let b = _mm_set_epi16(7, 6, 5, 4, 3, 2, 1, 0);
@@ -13852,7 +13852,7 @@ unsafe fn test_mm_mask_min_epu16() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_maskz_min_epu16() {
let a = _mm_set_epi16(0, 1, 2, 3, 4, 5, 6, 7);
let b = _mm_set_epi16(7, 6, 5, 4, 3, 2, 1, 0);
@@ -13884,7 +13884,7 @@ unsafe fn test_mm512_min_epu8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_min_epu8() {
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13912,7 +13912,7 @@ unsafe fn test_mm512_mask_min_epu8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_maskz_min_epu8() {
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13939,7 +13939,7 @@ unsafe fn test_mm512_maskz_min_epu8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_min_epu8() {
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13956,7 +13956,7 @@ unsafe fn test_mm256_mask_min_epu8() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_maskz_min_epu8() {
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -13973,7 +13973,7 @@ unsafe fn test_mm256_maskz_min_epu8() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_mask_min_epu8() {
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm_set_epi8(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -13984,7 +13984,7 @@ unsafe fn test_mm_mask_min_epu8() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_maskz_min_epu8() {
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm_set_epi8(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -14010,7 +14010,7 @@ unsafe fn test_mm512_min_epi16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_min_epi16() {
#[rustfmt::skip]
let a = _mm512_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -14027,7 +14027,7 @@ unsafe fn test_mm512_mask_min_epi16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_maskz_min_epi16() {
#[rustfmt::skip]
let a = _mm512_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -14044,7 +14044,7 @@ unsafe fn test_mm512_maskz_min_epi16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_min_epi16() {
let a = _mm256_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm256_set_epi16(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -14055,7 +14055,7 @@ unsafe fn test_mm256_mask_min_epi16() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_maskz_min_epi16() {
let a = _mm256_set_epi16(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm256_set_epi16(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -14066,7 +14066,7 @@ unsafe fn test_mm256_maskz_min_epi16() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_mask_min_epi16() {
let a = _mm_set_epi16(0, 1, 2, 3, 4, 5, 6, 7);
let b = _mm_set_epi16(7, 6, 5, 4, 3, 2, 1, 0);
@@ -14077,7 +14077,7 @@ unsafe fn test_mm_mask_min_epi16() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_maskz_min_epi16() {
let a = _mm_set_epi16(0, 1, 2, 3, 4, 5, 6, 7);
let b = _mm_set_epi16(7, 6, 5, 4, 3, 2, 1, 0);
@@ -14109,7 +14109,7 @@ unsafe fn test_mm512_min_epi8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_min_epi8() {
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -14137,7 +14137,7 @@ unsafe fn test_mm512_mask_min_epi8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_maskz_min_epi8() {
#[rustfmt::skip]
let a = _mm512_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -14164,7 +14164,7 @@ unsafe fn test_mm512_maskz_min_epi8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_min_epi8() {
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -14181,7 +14181,7 @@ unsafe fn test_mm256_mask_min_epi8() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_maskz_min_epi8() {
#[rustfmt::skip]
let a = _mm256_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
@@ -14198,7 +14198,7 @@ unsafe fn test_mm256_maskz_min_epi8() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_mask_min_epi8() {
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm_set_epi8(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -14209,7 +14209,7 @@ unsafe fn test_mm_mask_min_epi8() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_maskz_min_epi8() {
let a = _mm_set_epi8(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
let b = _mm_set_epi8(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
@@ -16326,7 +16326,7 @@ unsafe fn test_mm_storeu_epi8() {
assert_eq_m128i(r, a);
}
#[simd_test(enable = "avx512f,avx512bw")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_loadu_epi16() {
let src = _mm512_set1_epi16(42);
let a = &[
@@ -16344,7 +16344,7 @@ unsafe fn test_mm512_mask_loadu_epi16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f,avx512bw")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_maskz_loadu_epi16() {
let a = &[
1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
@@ -16361,7 +16361,7 @@ unsafe fn test_mm512_maskz_loadu_epi16() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f,avx512bw")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_storeu_epi16() {
let mut r = [42_i16; 32];
let a = &[
@@ -16379,7 +16379,7 @@ unsafe fn test_mm512_mask_storeu_epi16() {
assert_eq_m512i(_mm512_loadu_epi16(r.as_ptr()), e);
}
#[simd_test(enable = "avx512f,avx512bw")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_loadu_epi8() {
let src = _mm512_set1_epi8(42);
let a = &[
@@ -16399,7 +16399,7 @@ unsafe fn test_mm512_mask_loadu_epi8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f,avx512bw")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_maskz_loadu_epi8() {
let a = &[
1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
@@ -16418,7 +16418,7 @@ unsafe fn test_mm512_maskz_loadu_epi8() {
assert_eq_m512i(r, e);
}
#[simd_test(enable = "avx512f,avx512bw")]
#[simd_test(enable = "avx512bw")]
unsafe fn test_mm512_mask_storeu_epi8() {
let mut r = [42_i8; 64];
let a = &[
@@ -16438,7 +16438,7 @@ unsafe fn test_mm512_mask_storeu_epi8() {
assert_eq_m512i(_mm512_loadu_epi8(r.as_ptr()), e);
}
#[simd_test(enable = "avx512f,avx512bw,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_loadu_epi16() {
let src = _mm256_set1_epi16(42);
let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16];
@@ -16452,7 +16452,7 @@ unsafe fn test_mm256_mask_loadu_epi16() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512bw,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_maskz_loadu_epi16() {
let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16];
let p = a.as_ptr();
@@ -16463,7 +16463,7 @@ unsafe fn test_mm256_maskz_loadu_epi16() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512bw,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_storeu_epi16() {
let mut r = [42_i16; 16];
let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16];
@@ -16477,7 +16477,7 @@ unsafe fn test_mm256_mask_storeu_epi16() {
assert_eq_m256i(_mm256_loadu_epi16(r.as_ptr()), e);
}
#[simd_test(enable = "avx512f,avx512bw,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_loadu_epi8() {
let src = _mm256_set1_epi8(42);
let a = &[
@@ -16495,7 +16495,7 @@ unsafe fn test_mm256_mask_loadu_epi8() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512bw,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_maskz_loadu_epi8() {
let a = &[
1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
@@ -16512,7 +16512,7 @@ unsafe fn test_mm256_maskz_loadu_epi8() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f,avx512bw,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm256_mask_storeu_epi8() {
let mut r = [42_i8; 32];
let a = &[
@@ -16530,7 +16530,7 @@ unsafe fn test_mm256_mask_storeu_epi8() {
assert_eq_m256i(_mm256_loadu_epi8(r.as_ptr()), e);
}
#[simd_test(enable = "avx512f,avx512bw,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_mask_loadu_epi16() {
let src = _mm_set1_epi16(42);
let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8];
@@ -16542,7 +16542,7 @@ unsafe fn test_mm_mask_loadu_epi16() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f,avx512bw,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_maskz_loadu_epi16() {
let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8];
let p = a.as_ptr();
@@ -16553,7 +16553,7 @@ unsafe fn test_mm_maskz_loadu_epi16() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f,avx512bw,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_mask_storeu_epi16() {
let mut r = [42_i16; 8];
let a = &[1_i16, 2, 3, 4, 5, 6, 7, 8];
@@ -16565,7 +16565,7 @@ unsafe fn test_mm_mask_storeu_epi16() {
assert_eq_m128i(_mm_loadu_epi16(r.as_ptr()), e);
}
#[simd_test(enable = "avx512f,avx512bw,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_mask_loadu_epi8() {
let src = _mm_set1_epi8(42);
let a = &[1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16];
@@ -16579,7 +16579,7 @@ unsafe fn test_mm_mask_loadu_epi8() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f,avx512bw,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_maskz_loadu_epi8() {
let a = &[1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16];
let p = a.as_ptr();
@@ -16590,7 +16590,7 @@ unsafe fn test_mm_maskz_loadu_epi8() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f,avx512bw,avx512vl")]
#[simd_test(enable = "avx512bw,avx512vl")]
unsafe fn test_mm_mask_storeu_epi8() {
let mut r = [42_i8; 16];
let a = &[1_i8, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16];
library/stdarch/crates/core_arch/src/x86/avx512f.rs
+7 -7
View File
@@ -56076,7 +56076,7 @@ unsafe fn test_kxnor_mask16() {
assert_eq!(r, e);
}
#[simd_test(enable = "avx512dq")]
#[simd_test(enable = "avx512f")]
unsafe fn test_kortest_mask16_u8() {
let a: __mmask16 = 0b0110100101101001;
let b: __mmask16 = 0b1011011010110110;
@@ -56086,7 +56086,7 @@ unsafe fn test_kortest_mask16_u8() {
assert_eq!(all_ones, 1);
}
#[simd_test(enable = "avx512dq")]
#[simd_test(enable = "avx512f")]
unsafe fn test_kortestc_mask16_u8() {
let a: __mmask16 = 0b0110100101101001;
let b: __mmask16 = 0b1011011010110110;
@@ -56094,7 +56094,7 @@ unsafe fn test_kortestc_mask16_u8() {
assert_eq!(r, 1);
}
#[simd_test(enable = "avx512dq")]
#[simd_test(enable = "avx512f")]
unsafe fn test_kortestz_mask16_u8() {
let a: __mmask16 = 0b0110100101101001;
let b: __mmask16 = 0b1011011010110110;
@@ -56102,7 +56102,7 @@ unsafe fn test_kortestz_mask16_u8() {
assert_eq!(r, 0);
}
#[simd_test(enable = "avx512dq")]
#[simd_test(enable = "avx512f")]
unsafe fn test_kshiftli_mask16() {
let a: __mmask16 = 0b1001011011000011;
let r = _kshiftli_mask16::<3>(a);
@@ -56122,7 +56122,7 @@ unsafe fn test_kshiftli_mask16() {
assert_eq!(r, e);
}
#[simd_test(enable = "avx512dq")]
#[simd_test(enable = "avx512f")]
unsafe fn test_kshiftri_mask16() {
let a: __mmask16 = 0b1010100100111100;
let r = _kshiftri_mask16::<3>(a);
@@ -57383,7 +57383,7 @@ unsafe fn test_mm256_mask_set1_epi32() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512f,avx512vl")]
unsafe fn test_mm256_maskz_set1_epi32() {
let a: i32 = 11;
let r = _mm256_maskz_set1_epi32(0, a);
@@ -57404,7 +57404,7 @@ unsafe fn test_mm_mask_set1_epi32() {
assert_eq_m128i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512f,avx512vl")]
unsafe fn test_mm_maskz_set1_epi32() {
let a: i32 = 11;
let r = _mm_maskz_set1_epi32(0, a);
library/stdarch/crates/core_arch/src/x86/avx512fp16.rs
+20 -20
View File
@@ -20766,7 +20766,7 @@ unsafe fn test_mm_fmsub_round_sh() {
assert_eq_m128h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm_mask_fmsub_round_sh() {
let a = _mm_setr_ph(1.0, 10., 11., 12., 13., 14., 15., 16.);
let b = _mm_setr_ph(2.0, 20., 21., 22., 23., 24., 25., 26.);
@@ -20783,7 +20783,7 @@ unsafe fn test_mm_mask_fmsub_round_sh() {
assert_eq_m128h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm_mask3_fmsub_round_sh() {
let a = _mm_setr_ph(1.0, 10., 11., 12., 13., 14., 15., 16.);
let b = _mm_setr_ph(2.0, 20., 21., 22., 23., 24., 25., 26.);
@@ -20800,7 +20800,7 @@ unsafe fn test_mm_mask3_fmsub_round_sh() {
assert_eq_m128h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm_maskz_fmsub_round_sh() {
let a = _mm_setr_ph(1.0, 10., 11., 12., 13., 14., 15., 16.);
let b = _mm_setr_ph(2.0, 20., 21., 22., 23., 24., 25., 26.);
@@ -24529,7 +24529,7 @@ unsafe fn test_mm512_cvtepi32_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_mask_cvtepi32_ph() {
let a = _mm512_set_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let src = _mm256_set_ph(
@@ -24542,7 +24542,7 @@ unsafe fn test_mm512_mask_cvtepi32_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_maskz_cvtepi32_ph() {
let a = _mm512_set_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let r = _mm512_maskz_cvtepi32_ph(0b0101010101010101, a);
@@ -24552,7 +24552,7 @@ unsafe fn test_mm512_maskz_cvtepi32_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_cvt_roundepi32_ph() {
let a = _mm512_set_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let r = _mm512_cvt_roundepi32_ph::<{ _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC }>(a);
@@ -24562,7 +24562,7 @@ unsafe fn test_mm512_cvt_roundepi32_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_mask_cvt_roundepi32_ph() {
let a = _mm512_set_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let src = _mm256_set_ph(
@@ -24579,7 +24579,7 @@ unsafe fn test_mm512_mask_cvt_roundepi32_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_maskz_cvt_roundepi32_ph() {
let a = _mm512_set_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let r = _mm512_maskz_cvt_roundepi32_ph::<{ _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC }>(
@@ -24658,7 +24658,7 @@ unsafe fn test_mm256_maskz_cvtepu32_ph() {
assert_eq_m128h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_cvtepu32_ph() {
let a = _mm512_set_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let r = _mm512_cvtepu32_ph(a);
@@ -24668,7 +24668,7 @@ unsafe fn test_mm512_cvtepu32_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_mask_cvtepu32_ph() {
let a = _mm512_set_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let src = _mm256_set_ph(
@@ -24681,7 +24681,7 @@ unsafe fn test_mm512_mask_cvtepu32_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_maskz_cvtepu32_ph() {
let a = _mm512_set_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let r = _mm512_maskz_cvtepu32_ph(0b0101010101010101, a);
@@ -24691,7 +24691,7 @@ unsafe fn test_mm512_maskz_cvtepu32_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_cvt_roundepu32_ph() {
let a = _mm512_set_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let r = _mm512_cvt_roundepu32_ph::<{ _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC }>(a);
@@ -24701,7 +24701,7 @@ unsafe fn test_mm512_cvt_roundepu32_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_mask_cvt_roundepu32_ph() {
let a = _mm512_set_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let src = _mm256_set_ph(
@@ -24719,7 +24719,7 @@ unsafe fn test_mm512_mask_cvt_roundepu32_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_maskz_cvt_roundepu32_ph() {
let a = _mm512_set_epi32(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
let r = _mm512_maskz_cvt_roundepu32_ph::<{ _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC }>(
@@ -25006,7 +25006,7 @@ unsafe fn test_mm256_maskz_cvtxps_ph() {
assert_eq_m128h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_cvtxps_ph() {
let a = _mm512_set_ps(
1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0,
@@ -25018,7 +25018,7 @@ unsafe fn test_mm512_cvtxps_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_mask_cvtxps_ph() {
let a = _mm512_set_ps(
1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0,
@@ -25033,7 +25033,7 @@ unsafe fn test_mm512_mask_cvtxps_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_maskz_cvtxps_ph() {
let a = _mm512_set_ps(
1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0,
@@ -25045,7 +25045,7 @@ unsafe fn test_mm512_maskz_cvtxps_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_cvtx_roundps_ph() {
let a = _mm512_set_ps(
1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0,
@@ -25057,7 +25057,7 @@ unsafe fn test_mm512_cvtx_roundps_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_mask_cvtx_roundps_ph() {
let a = _mm512_set_ps(
1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0,
@@ -25077,7 +25077,7 @@ unsafe fn test_mm512_mask_cvtx_roundps_ph() {
assert_eq_m256h(r, e);
}
#[simd_test(enable = "avx512fp16")]
#[simd_test(enable = "avx512fp16,avx512vl")]
unsafe fn test_mm512_maskz_cvtx_roundps_ph() {
let a = _mm512_set_ps(
1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0,
library/stdarch/crates/core_arch/src/x86/rdtsc.rs
+6 -6
View File
@@ -64,16 +64,16 @@ mod tests {
use crate::core_arch::x86::*;
use stdarch_test::simd_test;
#[simd_test(enable = "sse2")]
unsafe fn test_rdtsc() {
let r = _rdtsc();
#[test]
fn test_rdtsc() {
let r = unsafe { _rdtsc() };
assert_ne!(r, 0); // The chances of this being 0 are infinitesimal
}
#[simd_test(enable = "sse2")]
unsafe fn test_rdtscp() {
#[test]
fn test_rdtscp() {
let mut aux = 0;
let r = __rdtscp(&mut aux);
let r = unsafe { __rdtscp(&mut aux) };
assert_ne!(r, 0); // The chances of this being 0 are infinitesimal
}
}
library/stdarch/crates/core_arch/src/x86/sse.rs
+3 -2
View File
@@ -3052,8 +3052,9 @@ unsafe fn test_mm_setzero_ps() {
assert_eq_m128(r, _mm_set1_ps(0.0));
}
#[simd_test(enable = "sse")]
unsafe fn test_MM_SHUFFLE() {
#[test]
#[allow(non_snake_case)]
fn test_MM_SHUFFLE() {
assert_eq!(_MM_SHUFFLE(0, 1, 1, 3), 0b00_01_01_11);
assert_eq!(_MM_SHUFFLE(3, 1, 1, 0), 0b11_01_01_00);
assert_eq!(_MM_SHUFFLE(1, 2, 2, 1), 0b01_10_10_01);
library/stdarch/crates/core_arch/src/x86_64/amx.rs
+2 -2
View File
@@ -937,7 +937,7 @@ unsafe fn test_tile_dphf8ps() {
assert_eq!(res, [[128.0_f32; 16]; 16]);
}
#[simd_test(enable = "amx-tile")]
#[simd_test(enable = "amx-movrs")]
unsafe fn test_tile_loaddrs() {
_init_amx();
let mut config = __tilecfg::default();
@@ -954,7 +954,7 @@ unsafe fn test_tile_loaddrs() {
assert_eq!(out, [[1; 64]; 16]);
}
#[simd_test(enable = "amx-tile")]
#[simd_test(enable = "amx-movrs")]
unsafe fn test_tile_stream_loaddrs() {
_init_amx();
let mut config = __tilecfg::default();
library/stdarch/crates/core_arch/src/x86_64/avx512f.rs
+5 -1
View File
@@ -6453,6 +6453,7 @@ unsafe fn test_mm512_setzero_pd() {
assert_eq_m512d(_mm512_setzero_pd(), _mm512_set1_pd(0.));
}
#[simd_test(enable = "avx512f")]
unsafe fn test_mm512_set1_epi64() {
let r = _mm512_set_epi64(2, 2, 2, 2, 2, 2, 2, 2);
assert_eq_m512i(r, _mm512_set1_epi64(2));
@@ -6464,6 +6465,7 @@ unsafe fn test_mm512_set1_pd() {
assert_eq_m512d(expected, _mm512_set1_pd(2.));
}
#[simd_test(enable = "avx512f")]
unsafe fn test_mm512_set4_epi64() {
let r = _mm512_set_epi64(4, 3, 2, 1, 4, 3, 2, 1);
assert_eq_m512i(r, _mm512_set4_epi64(4, 3, 2, 1));
@@ -6475,6 +6477,7 @@ unsafe fn test_mm512_set4_pd() {
assert_eq_m512d(r, _mm512_set4_pd(4., 3., 2., 1.));
}
#[simd_test(enable = "avx512f")]
unsafe fn test_mm512_setr4_epi64() {
let r = _mm512_set_epi64(4, 3, 2, 1, 4, 3, 2, 1);
assert_eq_m512i(r, _mm512_setr4_epi64(1, 2, 3, 4));
@@ -7335,6 +7338,7 @@ unsafe fn test_mm512_setr_epi64() {
assert_eq_m512i(r, _mm512_setr_epi64(7, 6, 5, 4, 3, 2, 1, 0))
}
#[simd_test(enable = "avx512f")]
unsafe fn test_mm512_cmpneq_epi64_mask() {
let a = _mm512_set_epi64(0, 1, -1, 13, i64::MAX, i64::MIN, 100, -100);
let b = _mm512_set_epi64(0, 1, 13, 42, i64::MAX, i64::MIN, 100, -100);
@@ -9685,7 +9689,7 @@ unsafe fn test_mm256_mask_permutex_epi64() {
assert_eq_m256i(r, e);
}
#[simd_test(enable = "avx512f")]
#[simd_test(enable = "avx512f,avx512vl")]
unsafe fn test_mm256_maskz_permutex_epi64() {
let a = _mm256_set_epi64x(3, 2, 1, 0);
let r = _mm256_maskz_permutex_epi64::<0b11_11_11_11>(0, a);