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https://github.com/rust-lang/rust.git
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feat - FEAT_FAMINMAX neon intrinsics
This commit is contained in:
James Barford-Evans
committed by
Amanieu d'Antras
Amanieu d'Antras
parent
694214b200
commit
1088aae289
@@ -821,6 +821,114 @@ pub fn vaddvq_u64(a: uint64x2_t) -> u64 {
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}
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unsafe { _vaddvq_u64(a) }
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}
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#[doc = "Multi-vector floating-point absolute maximum"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamax_f32)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[target_feature(enable = "neon,faminmax")]
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#[cfg_attr(test, assert_instr(famax))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub unsafe fn vamax_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.famax.v2f32"
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)]
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fn _vamax_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t;
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}
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_vamax_f32(a, b)
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}
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#[doc = "Multi-vector floating-point absolute maximum"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamaxq_f32)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[target_feature(enable = "neon,faminmax")]
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#[cfg_attr(test, assert_instr(famax))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub unsafe fn vamaxq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.famax.v4f32"
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)]
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fn _vamaxq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t;
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}
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_vamaxq_f32(a, b)
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}
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#[doc = "Multi-vector floating-point absolute maximum"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamaxq_f64)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[target_feature(enable = "neon,faminmax")]
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#[cfg_attr(test, assert_instr(famax))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub unsafe fn vamaxq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.famax.v2f64"
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)]
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fn _vamaxq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t;
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}
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_vamaxq_f64(a, b)
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}
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#[doc = "Multi-vector floating-point absolute minimum"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vamin_f32)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[target_feature(enable = "neon,faminmax")]
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#[cfg_attr(test, assert_instr(famin))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub unsafe fn vamin_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.famin.v2f32"
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)]
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fn _vamin_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t;
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}
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_vamin_f32(a, b)
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}
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#[doc = "Multi-vector floating-point absolute minimum"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaminq_f32)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[target_feature(enable = "neon,faminmax")]
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#[cfg_attr(test, assert_instr(famin))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub unsafe fn vaminq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.famin.v4f32"
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)]
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fn _vaminq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t;
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}
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_vaminq_f32(a, b)
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}
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#[doc = "Multi-vector floating-point absolute minimum"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaminq_f64)"]
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#[doc = "## Safety"]
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#[doc = " * Neon instrinsic unsafe"]
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#[inline]
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#[target_feature(enable = "neon,faminmax")]
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#[cfg_attr(test, assert_instr(famin))]
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#[stable(feature = "neon_intrinsics", since = "1.59.0")]
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pub unsafe fn vaminq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t {
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unsafe extern "unadjusted" {
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#[cfg_attr(
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any(target_arch = "aarch64", target_arch = "arm64ec"),
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link_name = "llvm.aarch64.neon.famin.v2f64"
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)]
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fn _vaminq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t;
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}
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_vaminq_f64(a, b)
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}
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#[doc = "Bit clear and exclusive OR"]
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#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbcaxq_s8)"]
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#[inline]
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@@ -13973,3 +13973,45 @@ intrinsics:
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- - r
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- a
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- FnCall: ["vdup{neon_type[1].N}", [{FnCall: [simd_extract!, [b, 'LANE as u32']]}]]
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- name: "vamax{neon_type.no}"
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doc: "Multi-vector floating-point absolute maximum"
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arguments: ["a: {neon_type}", "b: {neon_type}"]
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return_type: "{neon_type}"
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attr:
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- FnCall: [target_feature, ['enable = "neon,faminmax"']]
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- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [famax]]}]]
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- FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]
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safety:
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unsafe: [neon]
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types:
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- float32x2_t
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- float32x4_t
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- float64x2_t
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compose:
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- LLVMLink:
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name: "_vamax{neon_type.no}"
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links:
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- link: "llvm.aarch64.neon.famax.{neon_type}"
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arch: aarch64,arm64ec
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- name: "vamin{neon_type.no}"
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doc: "Multi-vector floating-point absolute minimum"
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arguments: ["a: {neon_type}", "b: {neon_type}"]
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return_type: "{neon_type}"
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attr:
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- FnCall: [target_feature, ['enable = "neon,faminmax"']]
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- FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [famin]]}]]
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- FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]
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safety:
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unsafe: [neon]
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types:
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- float32x2_t
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- float32x4_t
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- float64x2_t
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compose:
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- LLVMLink:
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name: "_vamin{neon_type.no}"
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links:
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- link: "llvm.aarch64.neon.famin.{neon_type}"
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arch: aarch64,arm64ec
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@@ -118681,5 +118681,167 @@
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"ZIP2"
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]
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]
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},
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{
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"SIMD_ISA": "Neon",
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"name": "vamin_f32",
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"arguments": [
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"float32x2_t a",
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"float32x2_t b"
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],
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"return_type": {
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"value": "float32x2_t"
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},
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"Arguments_Preparation": {
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"a": {
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"register": "Vn.2S"
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},
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"b": {
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"register": "Vm.2S"
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}
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},
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"Architectures": [
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"A64"
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],
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"instructions": [
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[
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"FAMIN"
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]
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]
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},
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{
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"SIMD_ISA": "Neon",
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"name": "vaminq_f32",
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"arguments": [
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"float32x4_t a",
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"float32x4_t b"
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],
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"return_type": {
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"value": "float32x4_t"
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},
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"Arguments_Preparation": {
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"a": {
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"register": "Vn.4S"
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},
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"b": {
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"register": "Vm.4S"
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}
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},
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"Architectures": [
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"A64"
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],
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"instructions": [
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[
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"FAMIN"
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]
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]
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},
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{
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"SIMD_ISA": "Neon",
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"name": "vaminq_f64",
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"arguments": [
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"float64x2_t a",
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"float64x2_t b"
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],
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"return_type": {
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"value": "float64x2_t"
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},
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"Arguments_Preparation": {
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"a": {
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"register": "Vn.2D"
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},
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"b": {
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"register": "Vm.2D"
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}
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},
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"Architectures": [
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"A64"
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],
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"instructions": [
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[
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"FAMIN"
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]
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]
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},
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{
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"SIMD_ISA": "Neon",
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"name": "vamax_f32",
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"arguments": [
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"float32x2_t a",
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"float32x2_t b"
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],
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"return_type": {
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"value": "float32x2_t"
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},
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"Arguments_Preparation": {
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"a": {
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"register": "Vn.2S"
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},
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"b": {
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"register": "Vm.2S"
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}
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},
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"Architectures": [
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"A64"
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],
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"instructions": [
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[
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"FAMAX"
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]
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]
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},
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{
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"SIMD_ISA": "Neon",
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"name": "vamaxq_f32",
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"arguments": [
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"float32x4_t a",
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"float32x4_t b"
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],
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"return_type": {
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"value": "float32x4_t"
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},
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"Arguments_Preparation": {
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"a": {
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"register": "Vn.4S"
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},
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"b": {
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"register": "Vm.4S"
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}
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},
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"Architectures": [
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"A64"
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],
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"instructions": [
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[
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"FAMAX"
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]
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]
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},
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{
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"SIMD_ISA": "Neon",
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"name": "vamaxq_f64",
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"arguments": [
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"float64x2_t a",
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"float64x2_t b"
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],
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"return_type": {
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"value": "float64x2_t"
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},
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"Arguments_Preparation": {
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"a": {
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"register": "Vn.2D"
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},
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"b": {
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"register": "Vm.2D"
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}
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},
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"Architectures": [
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"A64"
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],
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"instructions": [
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[
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"FAMAX"
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]
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]
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}
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]
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