mirror of
https://codeberg.org/ziglang/zig.git
synced 2026-05-04 00:32:40 +03:00
Alex Rønne Petersen
66d97267c7
This excludes all headers in /usr/include/dev because that directory is bonkers huge (18M). We can add these on an as-needed basis.
649 lines
19 KiB
C
Vendored
649 lines
19 KiB
C
Vendored
/* $OpenBSD: bus.h,v 1.38 2024/10/22 22:01:58 jsg Exp $ */
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/* $NetBSD: bus.h,v 1.31 2001/09/21 15:30:41 wiz Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1997-1999, 2001 Eduardo E. Horvath. All rights reserved.
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* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _MACHINE_BUS_H_
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#define _MACHINE_BUS_H_
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#include <sys/atomic.h>
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#ifdef _KERNEL
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/*
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* Debug hooks
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*/
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#define BSDB_ACCESS 0x01
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#define BSDB_MAP 0x02
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#define BSDB_ASSERT 0x04
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#define BSDB_MAPDETAIL 0x08
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#define BSDB_ALL_ACCESS 0x10
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extern int bus_space_debug;
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#define BSHDB_ACCESS 0x01
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#define BSHDB_NO_ACCESS 0x02
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#if defined(BUS_SPACE_DEBUG)
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#include <sys/systm.h>
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#define BUS_SPACE_PRINTF(l, s) do { \
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if(bus_space_debug & (l)) printf s; \
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} while(0)
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#define BUS_SPACE_TRACE(t, h, s) do { \
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if ( (((bus_space_debug & BSDB_ALL_ACCESS) != 0) && \
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(((h).bh_flags & BSHDB_NO_ACCESS) == 0)) || \
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(((bus_space_debug & BSDB_ACCESS) != 0) && \
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(((h).bh_flags & BSHDB_ACCESS) != 0))) \
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printf s; \
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} while(0)
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#define BUS_SPACE_SET_FLAGS(t, h, f) ((h).bh_flags |= (f))
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#define BUS_SPACE_CLEAR_FLAGS(t, h, f) ((h).bh_flags &= ~(f))
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#define BUS_SPACE_FLAG_DECL(s) int s
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#define BUS_SPACE_SAVE_FLAGS(t, h, s) (s = (h).bh_flags)
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#define BUS_SPACE_RESTORE_FLAGS(t, h, s) (s = (h).bh_flags)
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#define BUS_SPACE_ASSERT(t, h, o, n) do { \
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if (bus_space_debug & BSDB_ASSERT) \
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bus_space_assert(t, &(h), o, n); \
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} while(0)
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#else /* BUS_SPACE_DEBUG */
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#define BUS_SPACE_PRINTF(l, s)
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#define BUS_SPACE_TRACE(t, h, s)
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#define BUS_SPACE_SET_FLAGS(t, h, f)
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#define BUS_SPACE_CLEAR_FLAGS(t, h, f)
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#define BUS_SPACE_FLAG_DECL(s)
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#define BUS_SPACE_SAVE_FLAGS(t, h, s)
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#define BUS_SPACE_RESTORE_FLAGS(t, h, s)
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#define BUS_SPACE_ASSERT(t, h, o, n)
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#endif /* BUS_SPACE_DEBUG */
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/*
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* UPA and SBus spaces are non-cached and big endian
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* (except for RAM and PROM)
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*
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* PCI spaces are non-cached and little endian
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*/
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enum sparc_bus_type {
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UPA_BUS_SPACE,
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SBUS_BUS_SPACE,
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PCI_CONFIG_BUS_SPACE,
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PCI_IO_BUS_SPACE,
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PCI_MEMORY_BUS_SPACE,
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LAST_BUS_SPACE
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};
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/* For backwards compatibility */
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#define SPARC_BUS_SPACE UPA_BUS_SPACE
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/*
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* Bus address and size types
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*/
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typedef const struct sparc_bus_space_tag *bus_space_tag_t;
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typedef u_long bus_addr_t;
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typedef u_long bus_size_t;
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typedef struct _bus_space_handle {
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paddr_t bh_ptr;
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#ifdef BUS_SPACE_DEBUG
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bus_space_tag_t bh_tag;
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bus_size_t bh_size;
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int bh_flags;
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#endif
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} bus_space_handle_t;
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/* For buses which have an iospace. */
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#define BUS_ADDR_IOSPACE(x) ((x)>>32)
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#define BUS_ADDR_PADDR(x) ((x)&0xffffffff)
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#define BUS_ADDR(io, pa) ((((bus_addr_t)io)<<32)|(pa))
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/*
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* Access methods for bus resources and address space.
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*/
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struct sparc_bus_space_tag {
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void *cookie;
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bus_space_tag_t parent;
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enum sparc_bus_type default_type;
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u_int8_t asi;
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u_int8_t sasi;
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char name[32];
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int (*sparc_bus_alloc)(bus_space_tag_t,
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bus_space_tag_t,
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bus_addr_t, bus_addr_t,
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bus_size_t, bus_size_t, bus_size_t,
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int, bus_addr_t *, bus_space_handle_t *);
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void (*sparc_bus_free)(bus_space_tag_t,
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bus_space_tag_t,
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bus_space_handle_t, bus_size_t);
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int (*sparc_bus_map)(bus_space_tag_t,
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bus_space_tag_t,
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bus_addr_t, bus_size_t,
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int, bus_space_handle_t *);
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int (*sparc_bus_protect)(bus_space_tag_t,
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bus_space_tag_t,
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bus_space_handle_t, bus_size_t, int);
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int (*sparc_bus_unmap)(bus_space_tag_t,
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bus_space_tag_t,
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bus_space_handle_t, bus_size_t);
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int (*sparc_bus_subregion)(bus_space_tag_t,
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bus_space_tag_t,
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bus_space_handle_t, bus_size_t,
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bus_size_t, bus_space_handle_t *);
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paddr_t (*sparc_bus_mmap)(bus_space_tag_t,
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bus_space_tag_t,
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bus_addr_t, off_t, int, int);
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void *(*sparc_intr_establish)(bus_space_tag_t,
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bus_space_tag_t,
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int, int, int,
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int (*)(void *), void *,
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const char *);
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void *(*sparc_intr_establish_cpu)(bus_space_tag_t,
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bus_space_tag_t,
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int, int, int,
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struct cpu_info *,
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int (*)(void *), void *,
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const char *);
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bus_addr_t (*sparc_bus_addr)(bus_space_tag_t,
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bus_space_tag_t, bus_space_handle_t);
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};
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/*
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* Bus space function prototypes.
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*/
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int bus_space_alloc(
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bus_space_tag_t,
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bus_addr_t, /* reg start */
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bus_addr_t, /* reg end */
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bus_size_t, /* size */
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bus_size_t, /* alignment */
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bus_size_t, /* boundary */
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int, /* flags */
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bus_addr_t *,
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bus_space_handle_t *);
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void bus_space_free(
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bus_space_tag_t,
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bus_space_handle_t,
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bus_size_t);
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int bus_space_map(
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bus_space_tag_t,
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bus_addr_t,
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bus_size_t,
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int, /*flags*/
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bus_space_handle_t *);
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int bus_space_protect(
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bus_space_tag_t,
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bus_space_handle_t,
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bus_size_t,
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int); /*flags*/
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int bus_space_unmap(
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bus_space_tag_t,
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bus_space_handle_t,
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bus_size_t);
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int bus_space_subregion(
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bus_space_tag_t,
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bus_space_handle_t,
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bus_size_t,
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bus_size_t,
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bus_space_handle_t *);
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static void bus_space_barrier(
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bus_space_tag_t,
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bus_space_handle_t,
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bus_size_t,
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bus_size_t,
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int);
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paddr_t bus_space_mmap(
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bus_space_tag_t,
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bus_addr_t, /*addr*/
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off_t, /*offset*/
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int, /*prot*/
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int); /*flags*/
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void *bus_intr_establish(
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bus_space_tag_t,
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int, /*bus-specific intr*/
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int, /*device class level,
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see machine/intr.h*/
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int, /*flags*/
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int (*)(void *), /*handler*/
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void *, /*handler arg*/
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const char *); /*what*/
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void *bus_intr_establish_cpu(
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bus_space_tag_t,
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int, /*bus-specific intr*/
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int, /*device class level,
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see machine/intr.h*/
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int, /*flags*/
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struct cpu_info *, /*cpu*/
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int (*)(void *), /*handler*/
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void *, /*handler arg*/
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const char *); /*what*/
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void *bus_intr_allocate(
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bus_space_tag_t,
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int (*)(void *), /*handler*/
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void *, /*handler arg*/
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int, /*number*/
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int, /*pil*/
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volatile u_int64_t *, /*map*/
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volatile u_int64_t *, /*clr*/
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const char *); /*what*/
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void bus_intr_free(void *);
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void bus_space_render_tag(
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bus_space_tag_t,
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char *,
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size_t);
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void *bus_space_vaddr(
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bus_space_tag_t,
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bus_space_handle_t);
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#ifdef BUS_SPACE_DEBUG
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void bus_space_assert(bus_space_tag_t,
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const bus_space_handle_t *,
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bus_size_t, int);
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void bus_space_render_tag(bus_space_tag_t, char*, size_t);
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#endif /* BUS_SPACE_DEBUG */
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#define _BS_PRECALL(t,f) \
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while (t->f == NULL) \
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t = t->parent;
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#define _BS_POSTCALL
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#define _BS_CALL(t,f) \
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(*(t)->f)
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/* flags for bus_space_barrier() */
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#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
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#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
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static inline void
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bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
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bus_size_t s, int f)
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{
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#ifdef notyet
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switch (f) {
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case (BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE):
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__membar("#LoadLoad|#StoreStore");
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break;
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case BUS_SPACE_BARRIER_READ:
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membar("#LoadLoad");
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break;
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case BUS_SPACE_BARRIER_WRITE:
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membar("#StoreStore");
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break;
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default:
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break;
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}
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#else
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__membar("#Sync");
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#endif
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}
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#include <sparc64/sparc64/busop.h>
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/* flags for bus space map functions */
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#define BUS_SPACE_MAP_CACHEABLE 0x0001
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#define BUS_SPACE_MAP_LINEAR 0x0002
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#define BUS_SPACE_MAP_READONLY 0x0004
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#define BUS_SPACE_MAP_PREFETCHABLE 0x0008
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#define BUS_SPACE_MAP_PROMADDRESS 0x0010
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#define BUS_SPACE_MAP_BUS1 0x0100 /* placeholders for bus functions... */
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#define BUS_SPACE_MAP_BUS2 0x0200
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#define BUS_SPACE_MAP_BUS3 0x0400
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#define BUS_SPACE_MAP_BUS4 0x0800
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/* flags for bus_intr_establish() */
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#define BUS_INTR_ESTABLISH_MPSAFE 0x0001
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#define BUS_INTR_ESTABLISH_SOFTINTR 0x0002
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/*
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* Flags used in various bus DMA methods.
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*/
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#define BUS_DMA_WAITOK 0x0000 /* safe to sleep (pseudo-flag) */
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#define BUS_DMA_NOWAIT 0x0001 /* not safe to sleep */
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#define BUS_DMA_ALLOCNOW 0x0002 /* perform resource allocation now */
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#define BUS_DMA_COHERENT 0x0004 /* hint: map memory DMA coherent */
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#define BUS_DMA_NOWRITE 0x0008 /* I suppose the following two should default on */
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#define BUS_DMA_BUS1 0x0010 /* placeholders for bus functions... */
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#define BUS_DMA_BUS2 0x0020
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#define BUS_DMA_BUS3 0x0040
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#define BUS_DMA_BUS4 0x0080
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#define BUS_DMA_STREAMING 0x0100 /* hint: sequential, unidirectional */
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#define BUS_DMA_READ 0x0200 /* mapping is device -> memory only */
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#define BUS_DMA_WRITE 0x0400 /* mapping is memory -> device only */
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#define BUS_DMA_ZERO 0x0800 /* zero memory in dmamem_alloc */
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#define BUS_DMA_OVERRUN 0x1000 /* tolerate DMA overruns */
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#define BUS_DMA_64BIT 0x2000 /* device handles 64bit dva */
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#define BUS_DMA_NOCACHE BUS_DMA_BUS1
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#define BUS_DMA_DVMA BUS_DMA_BUS2 /* Don't bother with alignment */
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#define BUS_DMA_24BIT BUS_DMA_BUS3 /* 24bit device */
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#define BUS_DMA_RAW BUS_DMA_STREAMING
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/* Forwards needed by prototypes below. */
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struct mbuf;
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struct uio;
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/*
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* Operations performed by bus_dmamap_sync().
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*/
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#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
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#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
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#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
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#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
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typedef struct sparc_bus_dma_tag *bus_dma_tag_t;
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typedef struct sparc_bus_dmamap *bus_dmamap_t;
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/*
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* bus_dma_segment_t
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*
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* Describes a single contiguous DMA transaction. Values
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* are suitable for programming into DMA registers.
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*/
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struct sparc_bus_dma_segment {
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bus_addr_t ds_addr; /* DVMA address */
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bus_size_t ds_len; /* length of transfer */
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/*
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* The following is to support bus_dmamem_alloc()'s
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* odd interface. Only the values in the first
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* segment are used. This means that 3/5ths of
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* most segments are useless space (and mbufs use 1024
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* segments).
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*/
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bus_size_t _ds_boundary; /* don't cross this */
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bus_size_t _ds_align; /* align to this */
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void *_ds_mlist; /* XXX - dmamap_alloc'ed pages */
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};
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typedef struct sparc_bus_dma_segment bus_dma_segment_t;
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/*
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* bus_dma_tag_t
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*
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* A machine-dependent opaque type describing the implementation of
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* DMA for a given bus.
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*/
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struct sparc_bus_dma_tag {
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void *_cookie; /* cookie used in the guts */
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struct sparc_bus_dma_tag* _parent;
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/*
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* DMA mapping methods.
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*/
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int (*_dmamap_create)(bus_dma_tag_t, bus_dma_tag_t, bus_size_t,
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int, bus_size_t, bus_size_t, int, bus_dmamap_t *);
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void (*_dmamap_destroy)(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t);
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int (*_dmamap_load)(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t,
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void *, bus_size_t, struct proc *, int);
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int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dma_tag_t,
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bus_dmamap_t, struct mbuf *, int);
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int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t,
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struct uio *, int);
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int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t,
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bus_dma_segment_t *, int, bus_size_t, int);
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void (*_dmamap_unload)(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t);
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void (*_dmamap_sync)(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t,
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bus_addr_t, bus_size_t, int);
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/*
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* DMA memory utility functions.
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*/
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int (*_dmamem_alloc)(bus_dma_tag_t, bus_dma_tag_t, bus_size_t,
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bus_size_t, bus_size_t, bus_dma_segment_t *, int, int *,
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int);
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void (*_dmamem_free)(bus_dma_tag_t, bus_dma_tag_t,
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bus_dma_segment_t *, int);
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int (*_dmamem_map)(bus_dma_tag_t, bus_dma_tag_t,
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bus_dma_segment_t *, int, size_t, caddr_t *, int);
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void (*_dmamem_unmap)(bus_dma_tag_t, bus_dma_tag_t, caddr_t,
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size_t);
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paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_tag_t,
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bus_dma_segment_t *, int, off_t, int, int);
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};
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#define _BD_PRECALL(t,f) \
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while (t->f == NULL) { \
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t = t->_parent; \
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}
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#define _BD_CALL(t,f) \
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(*(t)->f)
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#define _BD_POSTCALL
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static inline int
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bus_dmamap_create(bus_dma_tag_t t, bus_size_t s, int n, bus_size_t m,
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bus_size_t b, int f, bus_dmamap_t *p)
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{
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int r;
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const bus_dma_tag_t t0 = t;
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_BD_PRECALL(t, _dmamap_create);
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r = _BD_CALL(t, _dmamap_create)(t, t0, s, n, m, b, f, p);
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_BD_POSTCALL;
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return (r);
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}
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static inline void
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bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t p)
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{
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const bus_dma_tag_t t0 = t;
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_BD_PRECALL(t, _dmamap_destroy);
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_BD_CALL(t, _dmamap_destroy)(t, t0, p);
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_BD_POSTCALL;
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}
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static inline int
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bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t m, void *b, bus_size_t s,
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struct proc *p, int f)
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{
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const bus_dma_tag_t t0 = t;
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int r;
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_BD_PRECALL(t, _dmamap_load);
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r = _BD_CALL(t, _dmamap_load)(t, t0, m, b, s, p, f);
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_BD_POSTCALL;
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return (r);
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}
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static inline int
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bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t m, struct mbuf *b,
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int f)
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{
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const bus_dma_tag_t t0 = t;
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int r;
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_BD_PRECALL(t, _dmamap_load_mbuf);
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r = _BD_CALL(t, _dmamap_load_mbuf)(t, t0, m, b, f);
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_BD_POSTCALL;
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return (r);
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}
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static inline int
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bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t m, struct uio * u, int f)
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{
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const bus_dma_tag_t t0 = t;
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int r;
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_BD_PRECALL(t, _dmamap_load_uio);
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r = _BD_CALL(t, _dmamap_load_uio)(t, t0, m, u, f);
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_BD_POSTCALL;
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return (r);
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}
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static inline int
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bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t m, bus_dma_segment_t *sg,
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int n, bus_size_t s, int f)
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{
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const bus_dma_tag_t t0 = t;
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int r;
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_BD_PRECALL(t, _dmamap_load_raw);
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r = _BD_CALL(t, _dmamap_load_raw)(t, t0, m, sg, n, s, f);
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_BD_POSTCALL;
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return (r);
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}
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static inline void
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bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t p)
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{
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const bus_dma_tag_t t0 = t;
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_BD_PRECALL(t, _dmamap_unload);
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_BD_CALL(t, _dmamap_unload)(t, t0, p);
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_BD_POSTCALL;
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}
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static inline void
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bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t p, bus_addr_t o, bus_size_t l,
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int ops)
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|
{
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const bus_dma_tag_t t0 = t;
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_BD_PRECALL(t, _dmamap_sync);
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_BD_CALL(t, _dmamap_sync)(t, t0, p, o, l, ops);
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_BD_POSTCALL;
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}
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static inline int
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bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t s, bus_size_t a, bus_size_t b,
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bus_dma_segment_t *sg, int n, int *r, int f)
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|
{
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const bus_dma_tag_t t0 = t;
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int ret;
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_BD_PRECALL(t, _dmamem_alloc);
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ret = _BD_CALL(t, _dmamem_alloc)(t, t0, s, a, b, sg, n, r, f);
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_BD_POSTCALL;
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return (ret);
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|
}
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static inline void
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bus_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *sg, int n)
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|
{
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|
const bus_dma_tag_t t0 = t;
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_BD_PRECALL(t, _dmamem_free);
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|
_BD_CALL(t, _dmamem_free)(t, t0, sg, n);
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|
_BD_POSTCALL;
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|
}
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static inline int
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|
bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *sg, int n, size_t s,
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|
caddr_t *k, int f)
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|
{
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|
const bus_dma_tag_t t0 = t;
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|
int r;
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|
_BD_PRECALL(t, _dmamem_map);
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|
r = _BD_CALL(t, _dmamem_map)(t, t0, sg, n, s, k, f);
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|
_BD_POSTCALL;
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return (r);
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|
}
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static inline void
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|
bus_dmamem_unmap(bus_dma_tag_t t, caddr_t k, size_t s)
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|
{
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|
const bus_dma_tag_t t0 = t;
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|
_BD_PRECALL(t, _dmamem_unmap);
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|
_BD_CALL(t, _dmamem_unmap)(t, t0, k, s);
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|
_BD_POSTCALL;
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|
}
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|
static inline paddr_t
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|
bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *sg, int n, off_t o, int p,
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|
int f)
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|
{
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|
const bus_dma_tag_t t0 = t;
|
|
int r;
|
|
_BD_PRECALL(t, _dmamem_mmap);
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|
r = _BD_CALL(t, _dmamem_mmap)(t, t0, sg, n, o, p, f);
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|
_BD_POSTCALL;
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|
return (r);
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|
}
|
|
|
|
/*
|
|
* bus_dmamap_t
|
|
*
|
|
* Describes a DMA mapping.
|
|
*/
|
|
struct sparc_bus_dmamap {
|
|
/*
|
|
* PRIVATE MEMBERS: not for use by machine-independent code.
|
|
*/
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|
bus_addr_t _dm_dvmastart; /* start and size of allocated */
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|
bus_size_t _dm_dvmasize; /* DVMA segment for this map */
|
|
|
|
bus_size_t _dm_size; /* largest DMA transfer mappable */
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|
bus_size_t _dm_maxsegsz; /* largest possible segment */
|
|
bus_size_t _dm_boundary; /* don't cross this */
|
|
int _dm_segcnt; /* number of segs this map can map */
|
|
int _dm_flags; /* misc. flags */
|
|
#define _DM_TYPE_LOAD 0
|
|
#define _DM_TYPE_SEGS 1
|
|
#define _DM_TYPE_UIO 2
|
|
#define _DM_TYPE_MBUF 3
|
|
int _dm_type; /* mapping type: raw, uio, mbuf, etc */
|
|
void *_dm_source; /* source mbuf/uio/etc. for unload */
|
|
|
|
void *_dm_cookie; /* cookie for bus-specific functions */
|
|
|
|
/*
|
|
* PUBLIC MEMBERS: these are used by machine-independent code.
|
|
*/
|
|
bus_size_t dm_mapsize; /* size of the mapping */
|
|
int dm_nsegs; /* # valid segments in mapping */
|
|
|
|
bus_dma_segment_t dm_segs[1]; /* segments; variable length */
|
|
};
|
|
|
|
#endif /* _KERNEL */
|
|
|
|
#endif /* _MACHINE_BUS_H_ */ |