mirror of
https://codeberg.org/ziglang/zig.git
synced 2026-04-28 19:47:08 +03:00
Alex Rønne Petersen
66d97267c7
This excludes all headers in /usr/include/dev because that directory is bonkers huge (18M). We can add these on an as-needed basis.
292 lines
6.8 KiB
C
Vendored
292 lines
6.8 KiB
C
Vendored
/* $OpenBSD: atomic.h,v 1.3 2022/08/29 02:01:18 jsg Exp $ */
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/*
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* Copyright (c) 2015 Martin Pieuchot
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _MACHINE_ATOMIC_H_
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#define _MACHINE_ATOMIC_H_
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#if defined(_KERNEL)
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static __inline void
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atomic_setbits_int(volatile unsigned int *uip, unsigned int v)
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{
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unsigned int tmp;
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__asm volatile (
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"1: lwarx %0, 0, %2 \n"
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" or %0, %1, %0 \n"
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" stwcx. %0, 0, %2 \n"
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" bne- 1b \n"
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" sync" : "=&r" (tmp) : "r" (v), "r" (uip) : "cc", "memory");
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}
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static __inline void
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atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
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{
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unsigned int tmp;
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__asm volatile (
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"1: lwarx %0, 0, %2 \n"
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" andc %0, %0, %1 \n"
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" stwcx. %0, 0, %2 \n"
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" bne- 1b \n"
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" sync" : "=&r" (tmp) : "r" (v), "r" (uip) : "cc", "memory");
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}
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#endif /* defined(_KERNEL) */
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static inline unsigned int
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_atomic_cas_uint(volatile unsigned int *p, unsigned int o, unsigned int n)
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{
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unsigned int rv;
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__asm volatile (
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"1: lwarx %0, 0, %2 \n"
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" cmpw 0, %0, %4 \n"
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" bne- 2f \n"
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" stwcx. %3, 0, %2 \n"
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" bne- 1b \n"
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"2: \n"
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: "=&r" (rv), "+m" (*p)
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: "r" (p), "r" (n), "r" (o)
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: "cc");
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return (rv);
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}
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#define atomic_cas_uint(_p, _o, _n) _atomic_cas_uint((_p), (_o), (_n))
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static inline unsigned long
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_atomic_cas_ulong(volatile unsigned long *p, unsigned long o, unsigned long n)
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{
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unsigned long rv;
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__asm volatile (
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"1: ldarx %0, 0, %2 \n"
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" cmpd 0, %0, %4 \n"
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" bne- 2f \n"
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" stdcx. %3, 0, %2 \n"
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" bne- 1b \n"
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"2: \n"
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: "=&r" (rv), "+m" (*p)
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: "r" (p), "r" (n), "r" (o)
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: "cc");
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return (rv);
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}
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#define atomic_cas_ulong(_p, _o, _n) _atomic_cas_ulong((_p), (_o), (_n))
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static inline void *
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_atomic_cas_ptr(volatile void *pp, void *o, void *n)
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{
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void * volatile *p = pp;
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void *rv;
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__asm volatile (
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"1: ldarx %0, 0, %2 \n"
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" cmpd 0, %0, %4 \n"
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" bne- 2f \n"
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" stdcx. %3, 0, %2 \n"
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" bne- 1b \n"
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"2: \n"
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: "=&r" (rv), "+m" (*p)
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: "r" (p), "r" (n), "r" (o)
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: "cc");
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return (rv);
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}
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#define atomic_cas_ptr(_p, _o, _n) _atomic_cas_ptr((_p), (_o), (_n))
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static inline unsigned int
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_atomic_swap_uint(volatile unsigned int *p, unsigned int v)
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{
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unsigned int rv;
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__asm volatile (
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"1: lwarx %0, 0, %2 \n"
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" stwcx. %3, 0, %2 \n"
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" bne- 1b \n"
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: "=&r" (rv), "+m" (*p)
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: "r" (p), "r" (v)
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: "cc");
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return (rv);
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}
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#define atomic_swap_uint(_p, _v) _atomic_swap_uint((_p), (_v))
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static inline unsigned long
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_atomic_swap_ulong(volatile unsigned long *p, unsigned long v)
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{
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unsigned long rv;
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__asm volatile (
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"1: ldarx %0, 0, %2 \n"
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" stdcx. %3, 0, %2 \n"
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" bne- 1b \n"
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: "=&r" (rv), "+m" (*p)
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: "r" (p), "r" (v)
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: "cc");
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return (rv);
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}
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#define atomic_swap_ulong(_p, _v) _atomic_swap_ulong((_p), (_v))
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static inline void *
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_atomic_swap_ptr(volatile void *pp, void *v)
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{
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void * volatile *p = pp;
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void *rv;
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__asm volatile (
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"1: ldarx %0, 0, %2 \n"
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" stdcx. %3, 0, %2 \n"
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" bne- 1b \n"
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: "=&r" (rv), "+m" (*p)
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: "r" (p), "r" (v)
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: "cc");
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return (rv);
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}
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#define atomic_swap_ptr(_p, _v) _atomic_swap_ptr((_p), (_v))
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static inline unsigned int
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_atomic_add_int_nv(volatile unsigned int *p, unsigned int v)
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{
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unsigned int rv;
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__asm volatile (
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"1: lwarx %0, 0, %2 \n"
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" add %0, %3, %0 \n"
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" stwcx. %0, 0, %2 \n"
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" bne- 1b \n"
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: "=&r" (rv), "+m" (*p)
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: "r" (p), "r" (v)
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: "cc", "xer");
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return (rv);
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}
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#define atomic_add_int_nv(_p, _v) _atomic_add_int_nv((_p), (_v))
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static inline unsigned long
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_atomic_add_long_nv(volatile unsigned long *p, unsigned long v)
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{
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unsigned long rv;
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__asm volatile (
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"1: ldarx %0, 0, %2 \n"
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" add %0, %3, %0 \n"
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" stdcx. %0, 0, %2 \n"
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" bne- 1b \n"
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: "=&r" (rv), "+m" (*p)
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: "r" (p), "r" (v)
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: "cc", "xer");
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return (rv);
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}
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#define atomic_add_long_nv(_p, _v) _atomic_add_long_nv((_p), (_v))
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static inline unsigned int
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_atomic_sub_int_nv(volatile unsigned int *p, unsigned int v)
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{
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unsigned int rv;
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__asm volatile (
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"1: lwarx %0, 0, %2 \n"
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" subf %0, %3, %0 \n"
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" stwcx. %0, 0, %2 \n"
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" bne- 1b \n"
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: "=&r" (rv), "+m" (*p)
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: "r" (p), "r" (v)
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: "cc", "xer");
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return (rv);
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}
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#define atomic_sub_int_nv(_p, _v) _atomic_sub_int_nv((_p), (_v))
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static inline unsigned long
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_atomic_sub_long_nv(volatile unsigned long *p, unsigned long v)
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{
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unsigned long rv;
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__asm volatile (
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"1: ldarx %0, 0, %2 \n"
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" subf %0, %3, %0 \n"
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" stdcx. %0, 0, %2 \n"
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" bne- 1b \n"
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: "=&r" (rv), "+m" (*p)
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: "r" (p), "r" (v)
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: "cc", "xer");
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return (rv);
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}
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#define atomic_sub_long_nv(_p, _v) _atomic_sub_long_nv((_p), (_v))
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static inline unsigned int
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_atomic_addic_int_nv(volatile unsigned int *p, unsigned int v)
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{
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unsigned int rv;
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__asm volatile (
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"1: lwarx %0, 0, %2 \n"
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" addic %0, %0, %3 \n"
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" stwcx. %0, 0, %2 \n"
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" bne- 1b \n"
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: "=&r" (rv), "+m" (*p)
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: "r" (p), "i" (v)
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: "cc", "xer");
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return (rv);
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}
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#define atomic_inc_int_nv(_p) _atomic_addic_int_nv((_p), 1)
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#define atomic_dec_int_nv(_p) _atomic_addic_int_nv((_p), -1)
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static inline unsigned long
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_atomic_addic_long_nv(volatile unsigned long *p, unsigned long v)
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{
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unsigned long rv;
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__asm volatile (
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"1: ldarx %0, 0, %2 \n"
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" addic %0, %0, %3 \n"
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" stdcx. %0, 0, %2 \n"
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" bne- 1b \n"
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: "=&r" (rv), "+m" (*p)
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: "r" (p), "i" (v)
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: "cc", "xer");
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return (rv);
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}
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#define atomic_inc_long_nv(_p) _atomic_addic_long_nv((_p), 1)
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#define atomic_dec_long_nv(_p) _atomic_addic_long_nv((_p), -1)
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#define __membar(_f) do { __asm volatile(_f ::: "memory"); } while (0)
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#if defined(MULTIPROCESSOR) || !defined(_KERNEL)
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#define membar_enter() __membar("isync")
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#define membar_exit() __membar("sync")
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#define membar_producer() __membar("sync")
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#define membar_consumer() __membar("isync")
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#define membar_sync() __membar("sync")
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#else
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#define membar_enter() __membar("")
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#define membar_exit() __membar("")
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#define membar_producer() __membar("")
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#define membar_consumer() __membar("")
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#define membar_sync() __membar("")
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#endif
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#endif /* _MACHINE_ATOMIC_H_ */ |