mirror of
https://codeberg.org/ziglang/zig.git
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Alex Rønne Petersen
66d97267c7
This excludes all headers in /usr/include/dev because that directory is bonkers huge (18M). We can add these on an as-needed basis.
103 lines
4.2 KiB
C
Vendored
103 lines
4.2 KiB
C
Vendored
/* $OpenBSD: cpu.h,v 1.8 2017/07/30 16:05:24 visa Exp $ */
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/*-
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Ralph Campbell and Rick Macklem.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Copyright (C) 1989 Digital Equipment Corporation.
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* Permission to use, copy, modify, and distribute this software and
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* its documentation for any purpose and without fee is hereby granted,
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* provided that the above copyright notice appears in all copies.
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* Digital Equipment Corporation makes no representations about the
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* suitability of this software for any purpose. It is provided "as is"
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* without express or implied warranty.
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*
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* from: @(#)cpu.h 8.4 (Berkeley) 1/4/94
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*/
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#ifdef _KERNEL
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#if defined(MULTIPROCESSOR) && !defined(_LOCORE)
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#define MAXCPUS 4
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struct cpu_info;
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struct cpu_info *hw_getcurcpu(void);
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void hw_setcurcpu(struct cpu_info *);
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void hw_cpu_boot_secondary(struct cpu_info *);
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void hw_cpu_hatch(struct cpu_info *);
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void hw_cpu_spinup_trampoline(struct cpu_info *);
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int hw_ipi_intr_establish(int (*)(void *), u_long);
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void hw_ipi_intr_set(u_long);
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void hw_ipi_intr_clear(u_long);
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#endif /* MULTIPROCESSOR && !_LOCORE */
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#if defined(CPU_LOONGSON2) && !defined(CPU_LOONGSON3)
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#define Mips_SyncCache(ci) \
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Loongson2_SyncCache((ci))
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#define Mips_InvalidateICache(ci, va, l) \
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Loongson2_InvalidateICache((ci), (va), (l))
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#define Mips_InvalidateICachePage(ci, va) \
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Loongson2_InvalidateICachePage((ci), (va))
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#define Mips_SyncICache(ci) \
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Loongson2_SyncICache((ci))
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#define Mips_SyncDCachePage(ci, va, pa) \
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Loongson2_SyncDCachePage((ci), (va), (pa))
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#define Mips_HitSyncDCachePage(ci, va, pa) \
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Loongson2_SyncDCachePage((ci), (va), (pa))
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#define Mips_HitSyncDCache(ci, va, l) \
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Loongson2_HitSyncDCache((ci), (va), (l))
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#define Mips_IOSyncDCache(ci, va, l, h) \
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Loongson2_IOSyncDCache((ci), (va), (l), (h))
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#define Mips_HitInvalidateDCache(ci, va, l) \
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Loongson2_HitInvalidateDCache((ci), (va), (l))
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#endif
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#if defined(CPU_LOONGSON3) && !defined(CPU_LOONGSON2)
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#define Mips_SyncCache(ci) \
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Loongson3_SyncCache((ci))
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#define Mips_InvalidateICache(ci, va, l) \
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Loongson3_InvalidateICache((ci), (va), (l))
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#define Mips_InvalidateICachePage(ci, va) \
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Loongson3_InvalidateICachePage((ci), (va))
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#define Mips_SyncICache(ci) \
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Loongson3_SyncICache((ci))
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#define Mips_SyncDCachePage(ci, va, pa) \
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Loongson3_SyncDCachePage((ci), (va), (pa))
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#define Mips_HitSyncDCachePage(ci, va, pa) \
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Loongson3_SyncDCachePage((ci), (va), (pa))
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#define Mips_HitSyncDCache(ci, va, l) \
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Loongson3_HitSyncDCache((ci), (va), (l))
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#define Mips_IOSyncDCache(ci, va, l, h) \
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Loongson3_IOSyncDCache((ci), (va), (l), (h))
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#define Mips_HitInvalidateDCache(ci, va, l) \
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Loongson3_HitInvalidateDCache((ci), (va), (l))
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#endif
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#endif /* _KERNEL */
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#include <mips64/cpu.h> |