Andrew Kelley 2a96209c40 Merge pull request #12574 from Vexu/remove-bit-op-type-param ...

stage2+stage1: remove type parameter from bit builtins

2022-08-24 15:57:44 -04:00

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big

stage2+stage1: remove type parameter from bit builtins

2022-08-22 11:19:20 +03:00

complex

Simplify Copysign

2022-05-17 21:55:22 +01:00

acos.zig

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acosh.zig

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asin.zig

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asinh.zig

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atan2.zig

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atan.zig

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atanh.zig

Simplify Copysign

2022-05-17 21:55:22 +01:00

big.zig

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cbrt.zig

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complex.zig

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copysign.zig

stage2: lower float negation explicitly

2022-06-30 00:02:00 -07:00

cosh.zig

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expm1.zig

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expo2.zig

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float.zig

Sema: fix parameter of type 'T' must be comptime error

2022-08-22 11:16:36 +03:00

frexp.zig

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hypot.zig

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ilogb.zig

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isfinite.zig

std.math: simpler error handling

2022-05-17 22:04:12 +01:00

isinf.zig

std.math: add inline to some functions

2022-07-13 11:14:46 -07:00

isnan.zig

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isnormal.zig

std.math: simpler error handling

2022-05-17 22:04:12 +01:00

ldexp.zig

std.math: simpler error handling

2022-05-17 22:04:12 +01:00

ln.zig

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log1p.zig

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log2.zig

std.math: Add O(log N) implementation of log2(x) for comptime_int

2022-06-07 20:07:40 -04:00

log10.zig

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log.zig

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modf.zig

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nan.zig

stage2: fix recent LLVM backend code

2022-04-27 14:18:34 -07:00

pow.zig

Simplify Copysign

2022-05-17 21:55:22 +01:00

powi.zig

std.math.powi: use standard definition of underflow/overflow, implement u0, i0, i1 edge case (#11499)

2022-05-16 18:28:20 -04:00

scalbn.zig

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signbit.zig

stage2: lower float negation explicitly

2022-06-30 00:02:00 -07:00

sinh.zig

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sqrt.zig

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tanh.zig

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