joachimschmidt557 b2254023e4 stage2: Implement setReg, call, ret, asm for ARM ...

These changes enable a Hello World example. However, all implemented
codegen is not yet feature-complete.

- asm only supports 'svc #0' at the moment
- call only supports leaf functions at the moment
- setReg uses a naive method at the moment

2020-08-23 22:33:47 +02:00

..

spu-mk2

stage2: clean up SPU Mk II code

2020-08-22 13:36:08 -07:00

arm.zig

stage2: Implement setReg, call, ret, asm for ARM

2020-08-23 22:33:47 +02:00

c.zig

CBE: minor doc change

2020-08-16 20:32:50 -04:00

riscv64.zig

Cleaned up RISC-V instruction creation, added 32-bit immediates (#6077)

2020-08-18 00:30:00 -04:00

spu-mk2.zig

stage2: clean up SPU Mk II code

2020-08-22 13:36:08 -07:00

wasm.zig

stage2/wasm: implement function calls

2020-08-19 02:05:13 +02:00

x86_64.zig

stage2: basic support for parameters .debug_info

2020-08-11 22:23:32 -07:00

x86.zig

stage2: basic support for parameters .debug_info

2020-08-11 22:23:32 -07:00