Commit Graph

1441 Commits

Author SHA1 Message Date
Valentin Anger d448c3d38a Add support for code model selection 2020-01-29 16:09:07 -05:00
Andrew Kelley e0000c47bd fix regression of storing optional with 0-bit payload 2020-01-28 12:32:39 -05:00
Andrew Kelley c58633ef17 fix assertion with var debug loc not initialized 2020-01-27 20:56:24 -05:00
Andrew Kelley c0fee9dfc7 fix nested bitcast passed as tuple element 2020-01-27 17:30:39 -05:00
Andrew Kelley e2778c03e0 Merge branch 'master' into ir-clean-up-vars 2020-01-27 13:32:39 -05:00
Andrew Kelley 9dffc369f1 Merge remote-tracking branch 'origin/master' into layneson-cpus_and_features 2020-01-25 23:25:29 -05:00
Andrew Kelley 4e9b1f5479 Merge pull request #4290 from ziglang/split-ir-structs
split IrInstruction into IrInst, IrInstSrc, IrInstGen
2020-01-25 23:24:41 -05:00
Andrew Kelley 6aac423964 split IrInstruction into IrInst, IrInstSrc, IrInstGen
This makes it so that less memory is used for IR instructions, as well
as catching bugs when one expected one kind of instruction and received
the other.
2020-01-25 21:49:32 -05:00
Michael Dusan aa75df36df Merge pull request #4279 from mikdusan/create-global-cache
stage1: make sure to create native_libc.txt dir
2020-01-24 00:31:18 -05:00
Tadeo Kondrak 3d8328abce Don't include stdbool.h for void and unreachable
Fixes https://github.com/ziglang/zig/issues/4272
2020-01-23 23:24:45 -05:00
Michael Dusan b54040d394 stage1: make sure to create native_libc.txt dir
- fix regression from #4186
2020-01-23 21:59:28 -05:00
Andrew Kelley 9845264a0b aarch64: less feature-full baseline CPU 2020-01-22 18:40:34 -05:00
Andrew Kelley 3227aec848 fix not respecting sub-arch feature 2020-01-22 17:35:57 -05:00
Andrew Kelley 48c7e6c48b std.Target.CpuFeatures is now a struct with both CPU and feature set
Previously it was a tagged union which was one of:
 * baseline
 * a specific CPU
 * a set of features

Now, it's possible to have a CPU but also modify the CPU's feature set
on top of that. This is closer to what LLVM does.

This is more correct because Zig's notion of CPUs (and LLVM's) is not
exact CPU models. For example "skylake" is not one very specific model;
there are several different pieces of hardware that match "skylake" that
have different feature sets enabled.
2020-01-22 17:13:31 -05:00
Andrew Kelley 830e0ba2d2 enable native CPU feature for windows; disable failing tests
See #508. These can be re-enabled when we upgrade to LLVM 10.
2020-01-21 21:46:06 -05:00
Andrew Kelley 6e6ec3d71d put hack back in to disable windows native cpu features
See #508. This can be removed when we upgrade to LLVM 10.
2020-01-21 21:01:36 -05:00
Andrew Kelley 92559cd02c hit a comptime limitation with computing dense sets 2020-01-21 19:40:44 -05:00
Andrew Kelley 1f7babbc80 properly forward baseline target cpu features to llvm 2020-01-21 03:01:20 -05:00
Andrew Kelley a867b43366 progress towards merging
see BRANCH_TODO file
2020-01-19 20:54:04 -05:00
Layne Gustafson c15623428e Pass target_details to child CodeGens 2020-01-19 20:53:20 -05:00
Layne Gustafson 62e4cc06fe Pass target details to c compiler 2020-01-19 20:53:20 -05:00
Layne Gustafson fd17a9962b Add defaut feature support 2020-01-19 20:53:20 -05:00
Layne Gustafson 03dd376b55 Add builtin.zig support 2020-01-19 20:53:19 -05:00
Layne Gustafson c61856ebcf Add TargetDetails abstraction 2020-01-19 20:53:19 -05:00
Layne Gustafson b3324f1901 Add cpu/feature to cache hash 2020-01-19 20:53:19 -05:00
Layne Gustafson bd6ef21f85 Add cpu/feature specification to cmndline 2020-01-19 20:53:19 -05:00
Andrew Kelley b5ac079f88 Merge pull request #4191 from Vexu/non-exhaustive-enums
Implement non-exhaustive enums
2020-01-17 14:26:12 -05:00
Andrew Kelley 8bf425957b fix regressions double implicit casting return ptr 2020-01-16 21:58:52 -05:00
Andrew Kelley fbcee58cfc zig ir.cpp details: remove the mem_slot mechanism
Previously, there was hacky code to deal with result locations and how
they work with regards to comptime values and runtime values. In
addition, there was a hacky "mem_slot" mechanism that managed the memory
for local variables, and acted differently depending on comptime vs
runtime situations. All that is deleted in this commit, and as a result,
result locations code has one less complication.

Importantly, this means that a comptime result location is now passed to
a function when it is evaluated at comptime.

This test causes many regressions, and some of the behavior tests are
disabled (commented out) in this commit. Future commits will re-enable
the tests before merging the branch.
2020-01-16 21:58:47 -05:00
Vexu df03fcf5f0 implement @bitSizeOf 2020-01-16 13:13:45 -05:00
Vexu d84569895c turn panics into compile errors, require at least 1 field in non-exhaustive enum 2020-01-16 09:04:11 +02:00
Vexu 5c2238fc4a small fixes
* error for '_' prong on exhaustive enum
* todo panic for `@tagName`  on non-exhaustive enum
* don't require '_' field on tagged unions
2020-01-15 22:09:19 +02:00
Michael Dusan 0a41051955 stage1: move local native_libc.txt to global
Automatic creation of `native_libc.txt` now occurs only in global
cache. Manual creation/placement into local cache is supported.

closes #3975
2020-01-15 13:42:12 -05:00
Vexu 6fd0dddf18 implement non-exhaustive enums 2020-01-15 20:24:59 +02:00
LemonBoy 505b9db909 Fix codegen error for some union initializers
Closes #3377
2020-01-14 14:57:03 -05:00
LemonBoy cae93c860b Allow switching on pointer types
Closes #4074
2020-01-13 22:18:49 +01:00
LemonBoy 95619ecb8c Stop dropping errors from clang
* Refactor the error-writing code to be more compact and flexible
2020-01-11 15:48:32 -05:00
LemonBoy 84e98405de Inform the debugger about the effective type sizes
Makes every debugger happy and closes #2685
2020-01-10 16:42:49 -05:00
LemonBoy 5ab5de89c0 New @export() handling
Use a struct as second parameter to be future proof (and also allows to
specify default values for the parameters)

Closes #2679 as it was just a matter of a few lines of code.
2020-01-09 13:43:06 -05:00
Andrew Kelley af390b75db cleanups related to --eh-frame-hdr 2020-01-07 16:02:38 -05:00
David Cao 8e57dd57ca add --eh-frame-hdr conditionally 2020-01-07 15:58:40 -05:00
Andrew Kelley 5951b79af4 remove stdcallcc, extern, nakedcc from stage1; zig fmt rewrites 2020-01-06 15:23:05 -05:00
Andrew Kelley 0a9daeb37e Merge branch 'cc-work' of https://github.com/LemonBoy/zig into LemonBoy-cc-work 2020-01-06 14:07:56 -05:00
Andrew Kelley 14fcfe2981 translate-c supports --cache on
this will be used to provide a zig build step
2020-01-03 22:11:19 -05:00
Andrew Kelley 213ff939f1 fix comptime vector float ops and add test coverage
also rename `@ln` to `@log` to match libc convention.
2020-01-02 14:01:48 -05:00
LemonBoy 435528a7c5 Use the LLVM C++ API 2020-01-02 18:57:09 +01:00
LemonBoy 0ccac79c8e Implement Thiscall CC 2020-01-02 18:57:08 +01:00
LemonBoy 271fc6a247 Catch more errors during the type resolution phase
Returning the uninitialized/stale error condition made the compiler turn
a blind eye to some problems.
2020-01-02 18:53:20 +01:00
LemonBoy 563d9ebfe5 Implement the callconv() annotation 2020-01-02 18:53:16 +01:00
Andrew Kelley cb56b26900 fix float ops with respect to vectors
also remove the redundant type parameter
2020-01-01 23:27:43 -05:00