Commit Graph

468 Commits

Author SHA1 Message Date
Ali Chraghi ca27055cda all: rename @maximum to @max and @minimum to @min 2022-10-18 14:15:16 +03:00
Andrew Kelley a1486e1e1e stage2: allow comptime expressions for inline asm
It is not yet determined whether the Zig language will land on
text-based string concatenation for inline assembly, as Zig 0.9.1
allows, and as this commit allows, or whether it will introduce a new
assembly syntax more integrated with the rest of the language. Until
this decision is made, this commit relaxes the restriction which was
preventing inline assembly expressions from using comptime expressions
for the assembly source code.
2022-10-17 16:31:23 -04:00
Robin Voetter 5d429b03e3 stage2: add @addrSpaceCast builtin 2022-10-12 20:36:12 +02:00
Veikka Tuominen b316c25cc6 Merge pull request #13075 from Vexu/stage2-fixes
Stage2 misc fixes
2022-10-10 23:27:17 +02:00
Veikka Tuominen 29ae6515f3 AstGen: use 'shadows' instead of 'redeclaration' when names are in different scopes
Closes #8532
2022-10-07 11:04:02 +03:00
Veikka Tuominen 0b1dd845d9 stage2: add error for non-void error union payload being ignored
See https://github.com/ziglang/zig/pull/6060#discussion_r471032912
2022-10-06 15:39:06 +03:00
Andrew Kelley ff534d2267 Merge pull request #12979 from Vexu/inline-switch
Implement inline switch cases
2022-10-03 23:43:09 -04:00
Veikka Tuominen 3122601242 AstGen: do not set decl_line for containers
Previously AstGen would set decl_line for containers so that
declarations inside them would be relative to the start of the
container but Sema was not aware of the line offset of the container
and would make them relative to the containers parent decl which
would then break for generic structs.

In the future when working on incremental compilation it will likely
be better to communicate the line delta to Sema but for now this
is a simpler fix that correctly handles the non-incremental case.

Closes #12725
Closes #12818
2022-09-30 00:09:24 +03:00
Veikka Tuominen 0e77259f44 add inline switch union tag captures 2022-09-27 18:33:23 +03:00
Veikka Tuominen cccc4c3827 AstGen: analyze inline switch cases 2022-09-27 18:05:08 +03:00
Veikka Tuominen 07a7c2f7c8 stage2: remove redundant is_ref flag from SwitchBlock.Bits 2022-09-27 18:05:08 +03:00
Veikka Tuominen b4d81857f3 stage1+2: parse inline switch cases 2022-09-27 18:05:08 +03:00
Veikka Tuominen c4400e8aa5 AstGen: reset anon_name_strategy for sub expressions
Closes  #12910
2022-09-24 16:30:37 +03:00
kkHAIKE 4961044ce8 AstGen: store void to ptr result loc when there is no else branch 2022-09-21 20:21:02 +03:00
kkHAIKE 183127733c AstGen: make loop body's ResultLoc .none
Fixes #12555
Fixes #12551
Fixes #12455
2022-09-21 20:20:05 +03:00
Andrew Kelley 85e3204344 stage2: free up 2 ZIR tags
cmpxchg_weak and cmpxchg_strong are not very common; demote them to
extended operations to make some headroom.

This commit does not change any behavior, only memory layout of the
compiler.
2022-09-21 03:54:37 -04:00
Veikka Tuominen 8f2e82dbf6 safety: show error return trace when unwrapping error in switch 2022-09-20 19:05:00 -07:00
Veikka Tuominen 5e37da6ade Sema: check_comptime_control_flow needs to check runtime_index 2022-09-15 00:50:18 +03:00
Veikka Tuominen 349d78a443 validate number literals in AstGen 2022-09-13 20:26:04 -04:00
Andrew Kelley f16855b9d7 remove pointless discards 2022-09-12 18:13:24 -07:00
Veikka Tuominen e323cf1264 stage2: change how defers are stored in Zir
Storing defers this way has the benefits that the defer doesn't get
analyzed multiple times in AstGen, it takes up less space, and it
makes Sema aware of defers allowing for 'unreachable else prong'
error on error sets in generic code.

The disadvantage is that it is a bit more complex and errdefers with
payloads now emit a placeholder instruction (but those are rare).

Sema.zig before:
  Total ZIR bytes:    3.7794370651245117MiB
  Instructions:       238996 (2.051319122314453MiB)
  String Table Bytes: 89.2802734375KiB
  Extra Data Items:   430144 (1.640869140625MiB)
Sema.zig after:
  Total ZIR bytes:    3.3344192504882812MiB
  Instructions:       211829 (1.8181428909301758MiB)
  String Table Bytes: 89.2802734375KiB
  Extra Data Items:   374611 (1.4290275573730469MiB)
2022-09-12 01:52:44 -04:00
Veikka Tuominen 1c4c68e6ba AstGen: use reachableExpr for try operand
Closes #12248
2022-09-02 17:57:10 +03:00
Veikka Tuominen d3b4b2edf1 Sema: shift of comptime int with runtime value
Closes #12290
2022-08-30 12:22:07 -07:00
Veikka Tuominen fc213e2d61 AstGen: add error for named function type
Closes #12660
2022-08-28 15:41:21 +03:00
Andrew Kelley 7a881435ed Merge pull request #12623 from Vexu/stage2-fixes
Stage2 fixes
2022-08-24 15:59:46 -04:00
Veikka Tuominen d515d37934 AstGen: make root decls relative to beginning of file
Closes #12610
2022-08-24 15:26:49 +03:00
Veikka Tuominen 62ff8871ed stage2+stage1: remove type parameter from bit builtins
Closes #12529
Closes #12511
Closes #6835
2022-08-22 11:19:20 +03:00
zooster 4055e6055b AstGen: disallow leading zeroes in int literals and int types
This makes `0123` and `u0123` etc. illegal.

I'm now confident that this is a good change because
I actually caught two C header translation mistakes in `haiku.zig` with this.
Clearly, `0123` being octal in C (TIL) can cause confusion, and we make this easier to read by
requiring `0o` as the prefix and now also disallowing leading zeroes in integers.

For consistency and because it looks weird, we disallow it for integer types too (e.g. `u0123`).

Fixes #11963
Fixes #12417
2022-08-18 19:54:51 +03:00
Veikka Tuominen 233049503a Sema: allow empty enums and unions 2022-08-17 23:03:04 +03:00
Veikka Tuominen 9d4561ef00 AstGen: detect declarations shadowing locals
Closes #9355
2022-08-16 20:35:03 +03:00
Cody Tapscott 7e07f3d4f9 stage2 astgen: Use rl semantics for @Type
Resolves #12430.
2022-08-13 09:22:25 +03:00
Isaac Freund 0d32b73078 stage2: Implement explicit backing integers for packed structs
Now the backing integer of a packed struct type may be explicitly
specified with e.g. `packed struct(u32) { ... }`.
2022-08-10 19:54:45 +02:00
Veikka Tuominen 0fd90749d1 stage2: generate call arguments in separate blocks 2022-08-09 16:19:55 +03:00
Andrew Kelley 85a3f9b054 Merge pull request #12383 from ziglang/stage2-stack-traces
several improvements to error return tracing in the self-hosted compiler
2022-08-09 02:11:58 -07:00
Veikka Tuominen c76b5c1a31 stage2: correct node offset of nested declarations 2022-08-09 11:59:10 +03:00
Andrew Kelley feb90f6ed4 AstGen: emit debug stmt for try
This improves the following test case:

```zig
pub fn main() !void {
    try foo();
}

fn foo() !void {
    return error.Bad;
}
```

The error return trace now points to the `try` token instead of pointing
to the foo() function call, matching stage1.

Closes #12308.
2022-08-08 21:12:04 -07:00
Andrew Kelley 0648177ed7 AstGen: avoid multiple dbg_stmt instructions in a row
This is purely an optimization to emit fewer ZIR instructions.
2022-08-08 20:43:05 -07:00
Andrew Kelley 3389890709 stage2: error return tracing handles ret better
Sema: insert an error return trace frame when appropriate when analyzing
ret_load. Also optimize the instructions to avoid an unnecessary block
sent to the backends.

AstGen: always emit a dbg_stmt for return expressions, in between the
defer instructions and the return instruction.

This improves the following test case:

```zig
pub fn main() !void {
    return foo();
}

fn foo() !void {
    return error.Bad;
}
```

The error return trace now points to the return token instead of
pointing to the foo() function call, matching stage1.
2022-08-08 20:43:05 -07:00
Veikka Tuominen d769fd0102 stage2: pass anon name strategy to reify 2022-08-08 18:28:39 -07:00
Veikka Tuominen 3e2defd36c stage2: add a helpful error for when async is used 2022-08-06 14:51:20 -07:00
Veikka Tuominen b79929b2ea AstGen: better source location for if/while condition unwrapping 2022-08-03 16:45:33 +03:00
Veikka Tuominen d1d24b426d AstGen: check loop bodies and else branches for unused result 2022-08-03 16:45:33 +03:00
Veikka Tuominen 02112f8836 AstGen: add error for break/continue out of defer expression 2022-08-03 16:45:33 +03:00
Veikka Tuominen f1768b40b2 stage2: better source location for var decls 2022-08-01 23:37:01 +03:00
Veikka Tuominen fdaf9c40d6 stage2: handle tuple init edge cases 2022-07-29 10:12:36 +03:00
Veikka Tuominen 9e0a930ce3 stage2: add error for comptime control flow in runtime block 2022-07-29 10:08:35 +03:00
Andrew Kelley 6a4df2778e AstGen: fix ref instruction injection for functions
For the expressions regarding return type, alignment,
parameter type, etc.
2022-07-27 16:19:23 -07:00
Veikka Tuominen e4a36a4cec AstGen: add dbg_stmts for unreachable and @panic
Closes #12249
2022-07-27 17:11:46 +03:00
Veikka Tuominen a463dc7d6c AstGen: disable null bytes and empty stings in some places
Namely:
 * test names
 * identifiers
 * library names
 * import strings
2022-07-26 12:14:59 +03:00
Meghan dea437edfb stage2: implement noinline fn 2022-07-24 11:56:33 +03:00