Commit Graph

70 Commits

Author SHA1 Message Date
Andrew Kelley 5c6f5e6cf2 test runner: avoid spawning progress thread when instrumented
because it causes unwanted concurrent accesses to pc tracking
2024-08-01 13:47:09 -07:00
David Rubin 1a7d89a84d riscv: clean up and unify encoding logic 2024-07-26 04:19:13 -07:00
David Rubin 8d30fc45c4 riscv: implement more operators
we can run `std.debug.print` now, with both run-time strings and integers!
2024-07-26 04:05:39 -07:00
Andrew Kelley 90dfd86ebe test runner: always report fuzz tests
This way they can be smoke tested.
2024-07-25 18:52:21 -07:00
Andrew Kelley 7366b4b9e2 test runner: handle start_fuzzing message 2024-07-25 18:52:21 -07:00
Andrew Kelley 047640383e add --fuzz CLI argument to zig build
This flag makes the build runner rebuild unit tests after the pipeline
finishes, if it finds any unit tests.

I did not make this integrate with file system watching yet.

The test runner is updated to detect which tests are fuzz tests.

Run step is updated to track which test indexes are fuzz tests.
2024-07-25 18:52:20 -07:00
Andrew Kelley 6f3767862d implement std.testing.fuzzInput
For now this returns a dummy fuzz input.
2024-07-25 18:52:20 -07:00
Andrew Kelley 33c7984183 add std.testing.random_seed
closes #17609
2024-07-23 11:43:12 -07:00
Andrew Kelley 5f78e28899 test runner: disable stderr printing for riscv64
Make it a little easier for contributors to see CI failures in the logs.
2024-07-20 19:16:00 -07:00
David Rubin 3530308476 test: refactor mainSimple
added some comments to make it easier for future contributors.
2024-06-13 02:24:39 -07:00
David Rubin 6603a9c26c testing: fix test runner 2024-06-13 02:20:48 -07:00
David Rubin 39c95e8930 riscv: switch the test runner to mainSimple 2024-06-13 02:20:47 -07:00
Andrew Kelley 795c5791a9 test runner: update to new std.Progress API 2024-05-27 20:56:48 -07:00
David Rubin d9e0cafe64 riscv: add stage2_riscv to test matrix and bypass failing tests 2024-05-11 02:17:24 -07:00
David Rubin e622485df8 riscv: actually working test runner 2024-05-11 02:17:11 -07:00
David Rubin 6740c1f084 riscv: big rewrite to use latest liveness
this one is even harder to document then the last large overhaul.

TLDR;
- split apart Emit.zig into an Emit.zig and a Lower.zig
- created seperate files for the encoding, and now adding a new instruction
is as simple as just adding it to a couple of switch statements and providing the encoding.
- relocs are handled in a more sane maner, and we have a clear defining boundary between
lea_symbol and load_symbol now.
- a lot of different abstractions for things like the stack, memory, registers, and others.
- we're using x86_64's FrameIndex now, which simplifies a lot of the tougher design process.
- a lot more that I don't have the energy to document. at this point, just read the commit itself :p
2024-05-11 02:17:11 -07:00
David Rubin 8ac239ebce riscv: add enough components to get a test runner working 2024-05-11 02:17:11 -07:00
David Rubin 3ccf0fd4c2 riscv: basic struct field access
the current implementation only works when the struct is in a register. we use some shifting magic
to get the field into the LSB, and from there, given the type provenance, the generated code should
never reach into the bits beyond the bit size of the type and interact with the rest of the struct.
2024-05-11 02:17:11 -07:00
Carl Åstholm 2465c328aa Use @TypeOf instead of std.meta in test_runner.zig
This might fix a CI failure for powerpc64le-linux-musl.
2024-04-07 21:16:29 +02:00
Andrew Kelley dfe430e9f4 move lazily compiled source files to lib/compiler/ 2024-02-26 23:43:56 -07:00