Commit Graph

116 Commits

Author SHA1 Message Date
Alex Rønne Petersen 67fa822300 test: disable switch on pointer type behavior test with LLVM
See: https://github.com/llvm/llvm-project/issues/176634

ref https://github.com/ziglang/zig/issues/23509
2026-04-25 21:54:48 +02:00
Pavel Verigo 07e3e50fd2 stage2-wasm: enabling bigint blocked tests + final fixes 2026-04-09 00:14:09 +02:00
Justus Klausecker c10089d060 test: enable 'switch arbitrary int size' behavior test for cbe
was disabled in b25d93e7d9
2026-03-18 16:57:40 +01:00
Justus Klausecker 0b857eebeb test: disable 'switch on large types' behavior tests for wasm backend
The self-hosted wasm backend doesn't properly support very large integers yet.
2026-03-18 15:49:14 +01:00
Justus Klausecker dbe787a984 Revert "test: disable switch behavior test switching on type >64bits for cbe"
This reverts commit e91654b1e7.
2026-03-18 15:49:14 +01:00
Justus Klausecker 047df44d71 cbe: fix switch statements on large types
`switch` statements on types >128bits are now lowered to conditionals.
This is necessary because Zig lowers integers with more than 128 bits to
bigints, which are not 'native' integers and thus cannot be used as case
values.
128-bit integers get special treatment because Zig will emit actual 128bit
ints if they are supported by the target. They still *may* be lowered to
bigints though, e.g. for 32-bit targets or MSVC. To solve this, this commit
adds a bunch of switch macros to `zig.h` which will either resolve to an
actual `switch` statement or to conditionals. The `if` statements this
approach can generate are not as optimal as they could be but I think this
is a good trade-off since the generated `switch` statements are still the
same as the ones generated for smaller integers. Also the macros result
in pretty readable code.
2026-03-18 15:47:18 +01:00
Justus Klausecker e91654b1e7 test: disable switch behavior test switching on type >64bits for cbe
workaround for #31467
2026-03-11 21:14:43 +01:00
Justus Klausecker 28886ca9ec Sema: implement switch for packed structs/unions
Since packed containers are now represented by `bitpack` and can't include
pointers anymore this has become a very easy change to make. This commit
largely just reuses the logic already in place for integers.

Also fixes a small bug where captures-by-ref of errors wouldn't cause a
compile error for regular switch statements. There was already an astgen
error in place for error handling switch statements (`switch_block_err_union`)
capturing their error by reference.
2026-03-11 21:04:04 +01:00
Matthew Lugg 09d0b1f87a behavior: misc fixes
They compile now! They don't *pass*, but they *compile*!
2026-03-10 10:26:11 +00:00
Justus Klausecker 044ba3e0b0 Sema: fix single-range switch prong capture (for real this time)
e2338edb47 didn't *quite* do it, the call sites of all switch prong related
functions now have to do their part too and be a little more precise about
what kind of prong they're currently analyzing.

Also removes some unused/unnecessary stuff.
2026-01-13 06:03:07 +01:00
Justus Klausecker e2338edb47 Sema: fix single-range switch prong capture
This kind of capture cannot always be comptime-known, assuming so caused
access of undefined memory during payload capture analysis!
2026-01-11 20:22:32 +01:00
Matthew Lugg 01546e68cd compiler: handle switch rewrite review feedback 2026-01-11 14:37:28 +00:00
Justus Klausecker 2e99c3042e test: add some more switch regression tests
switch evaluation order, switch lazy value resolution
2026-01-11 11:37:18 +00:00
Justus Klausecker b79bd31356 Sema: rework switch_block[_ref/_err_union] logic
This commit aims to simplify and de-duplicate the logic required for
semantically analyzing `switch` expressions.

The core logic has been moved to `analyzeSwitchBlock`, `resolveSwitchBlock`
and `finishSwitchBlock` and has been rewritten around the new iterator-based
API exposed by `Zir.UnwrappedSwitchBlock`.

All validation logic and switch prong item resolution have been moved to
`validateSwitchBlock`, which produces a `ValidatedSwitchBlock` containing
all the necessary information for further analysis.

`Zir.UnwrappedSwitchBlock`, `ValidatedSwitchBlock` and `SwitchOperand`
replace `SwitchProngAnalysis` while adding more flexibility, mainly for
better integration with `switch_block_err_union`.

`analyzeSwitchBlock` has an explicit code path for OPV types which lowers
them to either a `block`-`br` or a `loop`-`repeat` construct instead of a
switch. Backends expect `switch` to actually have an operand that exists
at runtime, so this is a bug fix and avoids further special cases in the
rest of the switch logic.
`resolveSwitchBlock` and `finishSwitchBr` exclusively deal with operands
which can have more than one value, at comptime and at runtime respectively.

This commit also reworks `RangeSet` to be an unmanaged container and adds
`Air.SwitchBr.BranchHints` to offload some complexity from Sema to there
and save a few bytes of memory in the process.

Additionally, some new features have been implemented:
- decl literals and everything else requiring a result type (`@enumFromInt`!)
  may now be used as switch prong items
- union tag captures are now allowed for all prongs, not just `inline` ones
- switch prongs may contain errors which are not in the error set being
  switched on, if these prongs contain `=> comptime unreachable`

and some bugs have been fixed:
- lots of issues with switching on OPV types are now fixed
- the rules around unreachable `else` prongs when switching on errors now
  apply to *any* switch on an error, not just to `switch_block_err_union`,
  and are applied properly based on the AST
- switching on `void` no longer requires an `else` prong unconditionally
- lazy values are properly resolved before any comparisons with prong items
- evaluation order between all kinds of switch statements is now the same,
  with or without label
2026-01-11 11:37:17 +00:00
Ali Cheraghi dec1163fbb all: replace all @Type usages
Co-authored-by: Matthew Lugg <mlugg@mlugg.co.uk>
2025-11-22 22:42:38 +00:00
Jacob Young 402c14f86a aarch64: implement optional comparisons 2025-10-30 09:31:30 +00:00
Justus Klausecker 0ecbd5a0e1 address comments 2025-08-07 13:58:49 +02:00
Justus Klausecker ba549a7d67 Add support for both '_' and 'else' prongs at the same time in switch statements
If both are used, 'else' handles named members and '_' handles
unnamed members. In this case the 'else' prong will be unrolled
to an explicit case containing all remaining named values.
2025-08-07 13:58:47 +02:00
Justus Klausecker 1d9b1c0212 Permit explicit tags with '_' switch prong
Mainly affects ZIR representation of switch_block[_ref]
and special prong (detection) logic for switch.
Adds a new SpecialProng tag 'absorbing_under' that allows
specifying additional explicit tags in a '_' prong which
are respected when checking that every value is handled
during semantic analysis but are not transformed into AIR
and instead 'absorbed' by the '_' branch.
2025-08-07 13:57:57 +02:00
Jacob Young c334956a54 aarch64: workaround some optional/union issues 2025-07-28 09:03:17 -07:00
Andrew Kelley da408bd6fc Merge pull request #24585 from jacobly0/aarch64
aarch64: more progress
2025-07-27 00:17:19 -07:00
Jacob Young 7894703ee7 aarch64: implement more optional/error union/union support 2025-07-26 21:39:50 -04:00
Jacob Young 7c349da49c aarch64: implement complex switch prongs 2025-07-26 16:08:40 -04:00
Jacob Young 68cfa736df x86_64: fix switch on mod result
Closes #24541
2025-07-26 06:24:03 -04:00
Jacob Young 5060ab99c9 aarch64: add new from scratch self-hosted backend 2025-07-22 19:43:47 -07:00
Ali Cheraghi 872f68c9cb rename spirv backend name
`stage2_spirv64` -> `stage2_spirv`
2025-06-16 13:22:19 +03:30
Jacob Young 37f763560b x86_64: fix switch dispatch bug
Also closes #23902
2025-06-06 23:42:15 -07:00
Jacob Young 1eb5d70d12 x86_64: fix switch on big ints 2025-04-09 20:14:12 -04:00
Ali Cheraghi aec0f9b3e7 test: skip failing tests with spirv-vulkan 2025-02-24 19:39:42 +01:00
Pavel Verigo b25d93e7d9 stage2-wasm: implement switch_dispatch + handle > 32 bit integers in switches
Updated solution is future proof for arbitary size integer handling for both strategies .br_table lowering if switch case is dense, .br_if base jump table if values are too sparse.
2025-02-22 18:34:00 -05:00
Robin Voetter 86b88ea7da spirv: skip range switch tests
This is not yet implemented
2024-10-13 01:58:11 +02:00
mlugg 03c363300f AstGen: do not allow unlabeled break to exit a labeled switch
`break`ing from something which isn't a loop should always be opt-in.
This was a bug in #21257.
2024-09-12 22:52:23 +01:00
mlugg b7a55cd6c3 AstGen: allow breaking from labeled switch
Also, don't use the special switch lowering for errors if the switch
is labeled; this isn't currently supported. Related: #20627.
2024-09-01 18:31:01 +01:00
David Rubin 8da212c11b riscv: update tests and fix reuse bug 2024-07-26 04:19:58 -07:00
David Rubin 1a7d89a84d riscv: clean up and unify encoding logic 2024-07-26 04:19:13 -07:00
David Rubin 8d30fc45c4 riscv: implement more operators
we can run `std.debug.print` now, with both run-time strings and integers!
2024-07-26 04:05:39 -07:00
David Rubin 7a02878f4e riscv: truncate airStructFieldVal result 2024-07-14 23:02:33 -07:00
David Rubin 4fd8900337 riscv: rewrite "binOp"
Reorganize how the binOp and genBinOp functions work.

I've spent quite a while here reading exactly through the spec and so many
tests are enabled because of several critical issues the old design had.

There are some regressions that will take a long time to figure out individually
so I will ignore them for now, and pray they get fixed by themselves. When
we're closer to 100% passing is when I will start diving into them one-by-one.
2024-06-13 02:24:39 -07:00
David Rubin 7ed2f2156f riscv: fix register clobber in certain edge cases 2024-06-13 02:21:38 -07:00
David Rubin 381a1043eb ZigObject: enforce min function alignement on riscv 2024-06-13 02:21:38 -07:00
David Rubin 05de6c279b riscv: std.fmt.format running
- implements `airSlice`, `airBitAnd`, `airBitOr`, `airShr`.

- got a basic design going for the `airErrorName` but for some reason it simply returns
empty bytes. will investigate further.

- only generating `.got.zig` entries when not compiling an object or shared library

- reduced the total amount of ops a mnemonic can have to 3, simplifying the logic
2024-06-13 02:20:47 -07:00
David Rubin 004d0c8978 riscv: switch progress + by-ref return progress 2024-06-13 02:19:38 -07:00
David Rubin d9e0cafe64 riscv: add stage2_riscv to test matrix and bypass failing tests 2024-05-11 02:17:24 -07:00
Robin Voetter ac16545895 spirv: enable passing tests 2024-04-06 13:52:48 +02:00
Ali Chraghi 0f75143c62 spirv: implement @divFloor, @floor and @mod 2024-04-06 08:50:02 +03:30
mlugg f3227598eb Sema: reset block error return trace index between cases
Resolves: #19210
2024-03-08 07:30:32 -08:00
Jacob Young aa688567f5 Air: replace .dbg_inline_* with .dbg_inline_block
This prevents the possibility of not emitting a `.dbg_inline_end`
instruction and reduces the allocation requirements of the backends.

Closes #19093
2024-03-02 21:19:34 -08:00
John Schmidt 7cb227ab67 Polish a few tests in switch.zig
- Return `error.TestFailed` instead of panicing
- Use `comptime assert` for type checks so that errors surface at
  compile time
2024-02-08 23:49:03 +01:00
John Schmidt 0d1baf0c61 Improvements after code review 2024-02-08 23:49:03 +01:00
John Schmidt dbcd53def0 Preserve field alignment in union pointer captures 2024-02-08 23:49:03 +01:00