Commit Graph

5396 Commits

Author SHA1 Message Date
joachimschmidt557 4ff5a3cd94 stage2 regalloc: Add unit test for getReg 2021-04-07 15:15:14 +02:00
joachimschmidt557 ac2211118f stage2 regalloc: Add getReg and getRegWithoutTracking 2021-04-06 21:14:00 +02:00
Andrew Kelley 545830c0ff LLVM sub-arch triple: remove TODO comment
See #6542 for more details. Upon investigation, this change is not
needed.
2021-04-04 16:10:54 -07:00
xackus e4563860fe translate-c: fix calls with no args in macros 2021-04-04 20:43:13 +03:00
Andrew Kelley 2f07d76eee stage2: implement Type.onePossibleValue for structs 2021-04-02 21:17:23 -07:00
Andrew Kelley d47f0abd5b stage2: Sema: implement validate_struct_init_ptr 2021-04-02 21:06:09 -07:00
Andrew Kelley 97d7fddfb7 stage2: progress towards basic structs
Introduce `ResultLoc.none_or_ref` which is used by field access
expressions to avoid unnecessary loads when the field access itself
will do the load. This turns:

```zig
p.y - p.x - p.x
```

from

```zir
  %14 = load(%4) node_offset:8:12
  %15 = field_val(%14, "y") node_offset:8:13
  %16 = load(%4) node_offset:8:18
  %17 = field_val(%16, "x") node_offset:8:19
  %18 = sub(%15, %17) node_offset:8:16
  %19 = load(%4) node_offset:8:24
  %20 = field_val(%19, "x") node_offset:8:25
```

to

```zir
  %14 = field_val(%4, "y") node_offset:8:13
  %15 = field_val(%4, "x") node_offset:8:19
  %16 = sub(%14, %15) node_offset:8:16
  %17 = field_val(%4, "x") node_offset:8:25
```

Much more compact. This requires `Sema.zirFieldVal` to support both
pointers and non-pointers.

C backend: Implement typedefs for struct types, as well as the following
TZIR instructions:
 * mul
 * mulwrap
 * addwrap
 * subwrap
 * ref
 * struct_field_ptr

Note that add, addwrap, sub, subwrap, mul, mulwrap instructions are all
incorrect currently and need to be updated to properly handle wrapping
and non wrapping for signed and unsigned.

C backend: change indentation delta to 1, to make the output smaller and
to process fewer bytes.

I promise I will add a test case as soon as I fix those warnings that
are being printed for my test case.
2021-04-02 19:11:51 -07:00
joachimschmidt557 43d364afef stage2 AArch64: Add ldrh and ldrb instructions 2021-04-02 14:46:30 -07:00
joachimschmidt557 228a1ce3e8 stage2 register_manager: Add unit tests for tryAllocReg and allocReg 2021-04-02 12:01:52 -07:00
joachimschmidt557 4efbcad26d stage2 codegen: Extract register management code into separate file 2021-04-02 12:01:52 -07:00
Andrew Kelley fc9c1b4e4a Merge pull request #8028 from mguaypaq/nosuspend-allow
stage1: allow async and resume inside nosuspend blocks
2021-04-02 11:59:34 -07:00
Woze Parrot 833f258297 put async frame in correct addrspace 2021-04-02 10:39:56 -07:00
Andrew Kelley 8ebfdc14f6 stage2: implement structs in the frontend
New ZIR instructions:
 * struct_decl_packed
 * struct_decl_extern

New TZIR instruction: struct_field_ptr

Introduce `Module.Struct`. It uses `Value` to store default values and
abi alignments.

Implemented Sema.analyzeStructFieldPtr and zirStructDecl.

Some stuff I changed from `@panic("TODO")` to `log.warn("TODO")`.
It's becoming more clear that we need the lazy value mechanism soon;
Type is becoming unruly, and some of these functions have too much logic
given that they don't have any context for memory management or error
reporting.
2021-04-01 22:39:09 -07:00
Andrew Kelley c66b48194f stage2: AstGen and ZIR printing for struct decls 2021-04-01 19:27:17 -07:00
Andrew Kelley 09000c3f77 zig cc: copy .pdb files from zig-cache/ when appropriate
closes #8407
2021-04-01 16:33:29 -07:00
Andrew Kelley 50bcfb8c90 stage2: implement struct init syntax with ptr result loc 2021-04-01 11:58:55 -07:00
Andrew Kelley 070a28e493 Merge pull request #8266 from ziglang/zir-memory-layout
rework ZIR memory layout; overhaul source locations
2021-03-31 23:11:15 -07:00
Andrew Kelley c9e31febf8 stage2: finish implementation of LazySrcLoc 2021-03-31 23:00:00 -07:00
Andrew Kelley b27d052676 stage2: finish source location reworkings in the branch
* remove the LazySrcLoc.todo tag
 * finish updating Sema and AstGen, remove the last of the
   `@panic("TODO")`.
2021-03-31 21:36:32 -07:00
Andrew Kelley e8143f6cbe stage2: compile error for duplicate switch value on sparse 2021-03-31 18:39:34 -07:00
Andrew Kelley cec766f73c stage2: compile error for duplicate switch value on boolean 2021-03-31 18:30:23 -07:00
jacob gw fedc9ebd26 stage2: cbe: restore all previously passing tests! 2021-03-31 18:09:45 -07:00
Andrew Kelley 3cebaaad1c astgen: improved handling of coercion
GenZir struct now has rl_ty_inst field which tracks the result location
type (if any) a block expects all of its results to be coerced to.

Remove a redundant coercion on const local initialization with a
specified type.

Switch expressions, during elision of store_to_block_ptr instructions,
now re-purpose them to be type coercion when the block has a type in the
result location.
2021-03-31 18:05:37 -07:00
Andrew Kelley 08eedc962d Sema: fix else case code generation for switch 2021-03-31 16:17:47 -07:00
Andrew Kelley abd06d8eab stage2: clean up RangeSet and fix swapped Sema switch logic for lhs/rhs 2021-03-31 15:39:04 -07:00
Andrew Kelley e272c29c16 Sema: implement switch validation for ranges 2021-03-31 15:06:03 -07:00
joachimschmidt557 1b657e6e41 stage2 codegen: Make sure function return value is in a callee
preserved register
2021-03-31 23:27:50 +02:00
joachimschmidt557 e088a17f56 stage2 AArch64: implement strb and strh 2021-03-31 23:26:49 +02:00
Andrew Kelley c7b09be8de AstGen: improve switch expressions
* use the proper result location strategy even when there are noreturn
   prongs in the switch expression
 * when using break_operand strategy, actually omit the
   store_to_block_ptr instructions rather than eliding them.
 * for both strategies, properly handle noreturn prongs.
2021-03-31 12:37:20 -07:00
Andrew Kelley 549af582e7 AstGen: switch expressions properly handle result locations 2021-03-30 23:57:22 -07:00
Andrew Kelley 2a1dd174cd stage2: rework AstGen for switch expressions
The switch_br ZIR instructions are now switch_block instructions. This
avoids a pointless block always surrounding a switchbr in emitted ZIR
code.

Introduce typeof_elem ZIR instruction for getting the type of the
element of a pointer value in 1 instruction.

Change typeof to be un_node, not un_tok.

Introduce switch_capture ZIR instructions for obtaining the capture
value of switch prongs.

Introduce Sema.resolveBody for when you want to extract a *Inst out of a
block and you know that there is only going to be 1 break from it.

What's not working yet: AstGen does not correctly elide
store instructions when it turns out that the result location does not
need to be used as a pointer.

Also Sema validation code for duplicate switch items is not yet
implemented.
2021-03-30 21:28:36 -07:00
Andrew Kelley 195ddab2be Sema: implement switch expressions
The logic for putting ranges into the else prong is moved from AstGen to
Sema. However, logic to emit multi-items the same as single-items cannot
be done until TZIR supports mapping multiple items to the same block of
code. This will be simple to represent when we do the upcoming TZIR memory
layout changes.

Not yet implemented in this commit is the validation of duplicate
values. The trick is going to be emitting error messages with accurate
source locations, without adding extra source nodes to the ZIR
switch instruction.

This will be done by computing the respective AST node based on the
switch node (which we do have available), only when a compile error
occurs and we need to know the source location to attach the message to.
2021-03-29 21:59:08 -07:00
Andrew Kelley 623d5f442c stage2: guidance on how to implement switch expressions
Here's what I think the ZIR should be. AstGen is not yet implemented to
match this, and the main implementation of analyzeSwitch in Sema is not
yet implemented to match it either.

Here are some example byte size reductions from master branch, with the
ZIR memory layout from this commit:

```
switch (foo) {
  a => 1,
  b => 2,
  c => 3,
  d => 4,
}
```

184 bytes (master) => 40 bytes (this branch)

```
switch (foo) {
  a, b => 1,
  c..d, e, f => 2,
  g => 3,
  else => 4,
}
```

240 bytes (master) => 80 bytes (this branch)
2021-03-28 23:12:26 -07:00
Andrew Kelley 281a7baaea Merge remote-tracking branch 'origin/master' into zir-memory-layout
Wanted to make sure those new test cases still pass.

Also grab that CI fix so we can get those green check marks.
2021-03-28 19:42:43 -07:00
Andrew Kelley 8f469c1127 stage2: fix error sets 2021-03-28 19:40:21 -07:00
jacob gw 0005b34637 stage2: implement sema for @errorToInt and @intToError 2021-03-28 18:22:01 -07:00
Isaac Freund f80f8a7a78 AstGen: pass *GenZir as the first arg, not *Module
This avoids the unnecessary scope.getGenZir() virtual call for both
convenience and performance.
2021-03-28 22:42:17 +02:00
Isaac Freund d5d88087dd translate-c: fix typo made in prior commit 2021-03-28 22:29:37 +02:00
Isaac Freund d123a5ec67 AstGen: scope result location related functions 2021-03-28 19:53:38 +02:00
Isaac Freund 402f87a213 stage2: rename WipZirCode => AstGen, astgen.zig => AstGen.zig 2021-03-28 19:10:10 +02:00
Evan Haas ab9324e604 translate-c: intcast compound assignment operand if different-sized integer
Use transCCast to cast the RHS of compound assignment if necessary.
2021-03-28 15:21:12 +03:00
Andrew Kelley 68f4eb0f67 stage2: fully implement Type.eql for pointers
Also fixed abiAlignment - for pointers it was returning the abi
alignment inside the type, rather than of the pointer itself. There is
now `ptrAlignment` for getting the alignment inside the type of
pointers.
2021-03-27 23:55:19 -07:00
Andrew Kelley 1f5617ac07 stage2: implement bitwise expr and error literals 2021-03-26 23:46:37 -07:00
Andrew Kelley da731e18c9 stage2: implement source location: .node_offset_var_decl_ty 2021-03-26 18:35:15 -07:00
Andrew Kelley a72bfd00cf astgen: fix continue expressions 2021-03-26 18:26:39 -07:00
Isaac Freund a217ad59c7 astgen: fix result location for sliced objects 2021-03-26 23:39:29 +01:00
Isaac Freund 22338d7816 astgen: implement float literals 2021-03-26 15:46:50 +01:00
Isaac Freund d8ee8794e1 astgen: implement more builtin functions 2021-03-26 15:20:11 +01:00
Isaac Freund 5eea13f5cc astgen: implement slicing 2021-03-26 11:46:42 +01:00
Andrew Kelley b2deaf8027 stage2: improve source locations of Decl access
* zir.Code: introduce a decls array. This is so that `decl_val` and
   `decl_ref` instructions can refer to a Decl with a u32 and therefore
   they can also store a source location. This is needed for proper
   compile error reporting.
 * astgen uses a hash map to avoid redundantly adding a Decl to the
   decls array.
 * fixed reporting "instruction illegal outside function body" instead
   of the desired message "unable to resolve comptime value".
 * astgen skips emitting dbg_stmt instructions in comptime scopes.
 * astgen has some logic to avoid adding unnecessary type coercion
   instructions for common values.
2021-03-25 23:45:17 -07:00