Commit Graph

7892 Commits

Author SHA1 Message Date
Jakub Konka 331cc810de Merge pull request #11012 from ziglang/x64-union-tag
stage2,x64: basic (un)tagged unions
2022-02-28 17:42:59 +01:00
Jakub Konka 16f9774d2d x64: fix switch condition mir; pass more union tests 2022-02-28 15:25:40 +01:00
Jakub Konka a61ac9ecbf x64: fix store with ABI size > 8 on stack; pass union tests 2022-02-28 12:14:41 +01:00
Jakub Konka 57a823582c x64: impl airGetUnionTag 2022-02-28 11:40:25 +01:00
Jakub Konka 4d0c48738b x64: make lowerUnnamedConst a fallthrough condition 2022-02-28 11:40:25 +01:00
Jakub Konka 06f58a0b3b codegen: impl lowering of union type to memory 2022-02-28 11:40:25 +01:00
Jakub Konka 1dc05e9e77 x64: impl airSetUnionTag 2022-02-28 11:40:21 +01:00
Jakub Konka 90059a12e0 Merge pull request #11008 from joachimschmidt557/stage2-arm
stage2 ARM: pass more behavior tests
2022-02-28 09:59:44 +01:00
Veikka Tuominen 87dc60e8de stage2: implement builtin_call 2022-02-27 18:59:44 -05:00
Andrew Kelley 9d4cfd9048 Sema: resolve necessary information ahead of time
Do the fallible logic in Sema where we have access to error reporting
mechanisms, rather than in Type/Value.

We can't just do the best guess when resolving queries of "is this type
comptime only?" or "what is the ABI alignment of this field?". The
result needs to be accurate. So we need to keep the assertions that the
data is available active, and instead compute the necessary information
before such functions get called.

Unfortunately we are stuck with two versions of such functions because
the various backends need to be able to ask such queries of Types and
Values while assuming the result has already been computed and validated
by Sema.
2022-02-27 16:51:33 -07:00
Cody Tapscott 71aa5084ed stage2: Resolve alignment for union field in @TypeInfo
This also includes two other small fixes:
 - Instantiate void TypeInfo fields as void
 - Return error in `type.comptimeOnly` on unresolved comptime requirements
2022-02-27 14:24:47 -07:00
joachimschmidt557 1bf8da19e1 stage2 ARM: implement slice and array_to_slice 2022-02-27 21:38:56 +01:00
joachimschmidt557 91fbcf7093 stage2 ARM: enable more behavior tests 2022-02-27 21:38:56 +01:00
joachimschmidt557 528008a981 stage2 ARM: reduce Mir.Inst.Data to 8 bytes 2022-02-27 21:38:55 +01:00
Andrew Kelley 104a8840db Merge pull request #11002 from topolarity/comptime-int-comparison
stage2: Add comptime result for certain unsigned/comptime comparisons
2022-02-27 15:32:46 -05:00
Cody Tapscott 0bdc3d8f4e stage2: Implement @Type for Array, Optional, Float, and ErrorUnion 2022-02-27 15:29:38 -05:00
Veikka Tuominen 9f59189c95 stage2: do not memoize calls that can mutate comptime state 2022-02-27 16:43:53 +02:00
Veikka Tuominen 7a92b89a9d stage2: forward discard result loc to more expressions 2022-02-27 13:32:55 +02:00
Veikka Tuominen 1bbca4f935 stage2: fix bitcast to optional ptr in llvm backend; omit safety check for intToPtr on optional ptr 2022-02-27 12:15:49 +02:00
Veikka Tuominen 950d840be6 stage2: use stage1 test runner for stage2 2022-02-27 11:57:12 +02:00
Cody Tapscott a7a508fcd9 stage2 sema: Implement comptime result for comparison of uint to comptime value
This adds a comptime result when comparing a comptime value to an
unsigned integer. For example:
   ( 0 <= (unsigned runtime value)) => true
   (-1 <  (unsigned runtime value)) => true
   ((unsigned runtime value) < -15) => false
2022-02-27 02:24:28 -07:00
Cody Tapscott b52948444f stage2: Resolve union layout before getting tag type in zirTagname
This bug only causes a failure on my machine when running
test/behavior/eval.zig directly. If running the full behavior test
suite, std.builtin.TypeInfo will have already resolved its layout,
causing the test to pass.

I'd love to add a test that can reliably reproduce this problem,
but I'm afraid I'm not sure how to reliably create a union with
un-resolved layout.
2022-02-27 01:58:37 -07:00
Veikka Tuominen 593d23c0d7 stage2: get formatted printing (somewhat) working 2022-02-27 10:05:29 +02:00
Andrew Kelley 4d658f83ed Sema: handle error.GenericPoison in fieldVal
Brings us 1 crash closer to formatted printing test cases.
2022-02-26 21:47:22 -07:00
Andrew Kelley 2687b8f7f4 stage2: implement @unionInit
The ZIR instruction `union_init_ptr` is renamed to `union_init`.
I made it always use by-value semantics for now, not taking the time to
invest in result location semantics, in case we decide to change the
rules for unions. This way is much simpler.

There is a new AIR instruction: union_init. This is for a comptime known
tag, runtime-known field value.
vector_init is renamed to aggregate_init, which solves a TODO comment.
2022-02-26 20:59:36 -07:00
Andrew Kelley 32e89a98d8 Sema: implement union value equality at comptime
Still TODO is extern unions.
2022-02-26 20:59:23 -07:00
Mitchell Hashimoto e999a925fa stage2: @TypeInfo for error sets (#10998) 2022-02-26 22:59:06 -05:00
Andrew Kelley aefe4046de Sema: implement @enumToInt for unions 2022-02-26 16:53:23 -07:00
Andrew Kelley d62229e3ad Sema: Module.Union.abiAlignment can return 0
When the union is a 0-bit type.
2022-02-26 16:53:23 -07:00
Andrew Kelley 822d29286b Sema: make align(a) T same as align(a:0:N) T
where `@sizeOf(T) == N`.
2022-02-26 16:50:35 -07:00
Andrew Kelley e81b21a0ea Merge pull request #10992 from mitchellh/peer-slices
stage2: peer resolve *[N]T to []T and E![]T and [*]T, handle in-memory coercion
2022-02-26 18:49:44 -05:00
Veikka Tuominen bf3c88b68d stage2: various fixes to get one test passing
* resolve error sets before merging them
* implement tupleFieldPtr
* make ret_ptr behave like alloc with zero sized types in llvm backend
2022-02-26 18:44:23 -05:00
Joachim Schmidt 058e482247 Merge pull request #10996 from joachimschmidt557/stage2-arm
stage2 ARM: implement truncate to integers with <= 32 bits
2022-02-26 22:50:31 +01:00
Veikka Tuominen bf5c055562 stage2: unify runtime and comptime coerce_result_ptr 2022-02-26 12:52:07 -07:00
Veikka Tuominen bff7714a7c stage2: fix toAllocatedBytes on slices 2022-02-26 12:52:06 -07:00
Veikka Tuominen ee149aaa03 stage2: actually coerce in coerce_result_ptr at comptime 2022-02-26 12:51:23 -07:00
Mitchell Hashimoto a5c9e8a494 typo in comment 2022-02-26 09:33:03 -08:00
Veikka Tuominen 315d4e8442 stage2: do not require function when evaluating typeOf
We only care about the instructions type; it will never actually be codegen'd.
2022-02-26 18:08:31 +02:00
Veikka Tuominen ff72b8a819 stage2: evaluate TypeOf arguments in a separate scope 2022-02-26 18:08:11 +02:00
joachimschmidt557 f48f4baf67 stage2 ARM: generate correct variants of ldr instruction
When loading an i16 for example, generate ldrsh instead of ldrh
2022-02-26 13:00:01 +01:00
joachimschmidt557 8ef80cfaab stage2 ARM: implement truncate to ints with bits <= 32 2022-02-26 12:59:57 +01:00
Mitchell Hashimoto 91af552f87 stage2: resolve peer types that trivially coerce 2022-02-25 18:47:10 -08:00
Mitchell Hashimoto 943ee59bb1 stage2: *[N]T to [*]T (and vice versa) 2022-02-25 17:29:50 -08:00
Mitchell Hashimoto 4a6f918029 stage2: remove extranneous debug 2022-02-25 13:37:07 -08:00
Mitchell Hashimoto 1019181982 stage2: *[N]T and E![]T 2022-02-25 13:33:11 -08:00
Mitchell Hashimoto 117ef22d3c stage2: peer resolve *[N]T to []T (and vice versa) 2022-02-25 13:21:07 -08:00
Jakub Konka e0f5627d4a x64+aarch64: check for pointer to zero-bit type when lowering decl
Unless the pointer is a pointer to a function, if the pointee type
has zero-bits, we need to return `MCValue.none` as the `Decl` has
not been lowered to memory, and therefore, any GOT reference will be
wrong.
2022-02-25 21:59:19 +01:00
Jakub Konka 4b14384989 aarch64: check if type has runtime bits before allocating mem ptr 2022-02-25 21:59:19 +01:00
Jakub Konka 1b8ed7842c macho: redo selection of segment/section for decls and consts
* fix alignment issues for consts with natural ABI alignment not
  matching that of the `ldr` instruction in `aarch64` - solved by
  preceeding the `ldr` with an additional `add` instruction to form
  the full address before dereferencing the pointer.
* redo selection of segment/section for decls and consts based on
  combined type and value
2022-02-25 21:59:19 +01:00
Veikka Tuominen bf6540ce50 Revert "stage2: make array len field type usize to match stage1"
This reverts commit 73bf418eb1.
2022-02-25 11:33:53 +02:00