ca16f1e8a7
std.Target adjustments
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* move `ptrBitWidth` from Arch to Target since it needs to know about the abi
* double isn't always 8 bits
* AVR uses 1-byte alignment for everything in GCC
2023-05-26 21:42:19 -07:00
60e69fdaa1
codegen: emit global vector padding
2023-05-18 20:42:38 -04:00
57c38f6433
x86_64: implement global payload pointers
2023-05-15 03:07:51 -04:00
81664f17d5
codegen: implement global enum_numbered
2023-05-15 03:07:51 -04:00
31429a4e86
codegen: handle variable and decl_ref_mut consistently
2023-05-03 04:25:14 -04:00
f894ec264b
codegen: fix global nested field_ptr
2023-05-03 04:25:14 -04:00
f56f5af403
x86_64: fix global slices
2023-05-03 04:25:14 -04:00
47a34d038d
x86_64: implement tagName
2023-05-01 19:22:52 -04:00
f37ca3fa73
link: cleanup lazy alignment
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This gets the alignment from the code that creates a lazy symbol instead
of guessing it at every use.
2023-05-01 19:22:52 -04:00
db76ae8260
x86_64: fix emitting f80 globals
2023-05-01 19:22:52 -04:00
4ec49da5f6
x86_64: implement a bunch of floating point stuff
2023-05-01 19:22:52 -04:00
42973d73e6
compiler: use @memcpy instead of std.mem.copy
2023-04-28 13:24:43 -07:00
8a3ad3f620
elf: do not reserve a GOT slot for every Atom
2023-04-21 22:44:25 +02:00
b82130709d
x86_64: cleanup different memory load types
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Split `MCValue.linker_load` into `.load_got`, `.load_direct`, and
`.lea_direct`.
2023-04-15 11:10:24 +02:00
179117c114
x86_64: split MCValue.tlv_reloc into .load_tlv and .lea_tlv
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`.load_tlv` signifies we want to load the value of a TLV
`.lea_tlv` signifies we want to load effective address of a TLV
2023-04-15 00:57:23 +02:00
3f35d6984f
x86_64: make TLV a separate MCValue
2023-04-13 16:35:45 +02:00
fd52d4537a
x86_64: emit pointer to TLV for macho
2023-04-13 11:47:51 +02:00
382de7bf1d
codegen: use non-debug Type/Value formatting
2023-04-13 11:47:51 +02:00
caa3d6a4f4
x86_64: fix constant pointers to zero-bit types
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These non-dereferencable pointers still need to have the correct
alignment and non-null-ness.
2023-04-13 04:17:47 -04:00
821eb595f4
x86_64: implement cmp_lt_errors_len
2023-04-03 15:19:07 -04:00
677427bc3a
x86_64: implement error name
2023-04-02 04:49:53 -04:00
d9ce69dc39
codegen: fix ptr-like optional constants
2023-03-25 16:23:55 -04:00
f95faac5ae
x86_64: (re)implement optional ops
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Note that this commit also changes the layout of optional for all
other backends using `src/codegen.zig` without updating them!
2023-03-21 08:49:54 +01:00
dc709fbf48
codegen: rename GenerateSymbolError to CodeGenError
2023-03-03 18:56:57 +01:00
c413ac100f
codegen: refactor generating Int as immediate where appropriate
2023-03-03 18:40:16 +01:00
c746cbc686
codegen: move gen logic for typed values, consts and decl ref to common codegen
2023-03-03 18:06:25 +01:00
f10950526e
implement writeToMemory/readFromMemory for pointers
2023-02-19 13:54:52 -05:00
aeaef8c0ff
update std lib and compiler sources to new for loop syntax
2023-02-18 19:17:21 -07:00
a95d58caf2
self-hosted: rename codegen Result.appended to Result.ok
2023-01-25 10:28:18 +01:00
4983da40d0
self-hosted: remove unused externally_managed prong for Decls code
2023-01-25 10:10:50 +01:00
1ebb761244
codegen - lower str_lit to vector
2022-12-16 06:08:10 -05:00
db06eed7a3
codegen: implement generating vector values
2022-12-12 17:41:59 +01:00
50eb7983cd
remove most conditional compilation based on stage1
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There are still a few occurrences of "stage1" in the standard library
and self-hosted compiler source, however, these instances need a bit
more careful inspection to ensure no breakage.
2022-12-06 20:38:54 -07:00
fdbb0fb7b9
Merge pull request #13744 from Vexu/stage2-fixes
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Improve error messages, fix dependency loops
2022-12-03 00:42:11 -05:00
0e38cc16d5
Sema: fix comparisons between lazy and runtime values
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Closes #12498
2022-12-03 00:09:23 +02:00
5bffc17c42
codegen: make LinkerLoad a common struct shared by backends
2022-12-01 16:32:09 +01:00
090deae41d
wasm: enable behavior tests for packed structs
2022-11-30 21:01:09 +01:00
3933a4bac5
codegen: support generating packed structs
2022-11-30 17:56:02 +01:00
f5f1f8c666
all: rename i386 to x86
2022-11-04 00:09:27 +03:30
3295fee911
stage2: Use mem.readPackedInt etc. for packed bitcasts
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Packed memory has a well-defined layout that doesn't require
conversion from an integer to read from. Let's use it :-)
This change means that for bitcasting to/from a packed value that
is N layers deep, we no longer have to create N temporary big-ints
and perform N copies.
Other miscellaneous improvements:
- Adds support for casting to packed enums and vectors
- Fixes bitcasting to/from vectors outside of a packed struct
- Adds a fast path for bitcasting <= u/i64
- Fixes bug when bitcasting f80 which would clear following fields
This also changes the bitcast memory layout of exotic integers on
big-endian systems to match what's empirically observed on our targets.
Technically, this layout is not guaranteed by LLVM so we should probably
ban bitcasts that reveal these padding bits, but for now this is an
improvement.
2022-10-28 08:41:04 -07:00
d03c47bf85
Sema: use runtime_value instead of creating allocs
2022-10-27 21:08:25 -04:00
562ac8be48
codegen: add support for lowering .field_ptr on a slice
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Closes #13068
2022-10-12 12:40:59 +03:00
d48af541c7
Sema: handle union and enum field order being different
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Closes #12543
2022-08-21 12:51:40 +03:00
0333ff4476
stage2: make error{} the same size as anyerror
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Having `error{}` be a zero bit type causes issues when it interracts
with empty inferred error sets which are the same size as `anyerror`.
2022-06-11 23:49:33 +03:00
0e6285c8fc
math: make cast return optional instead of an error
2022-05-27 16:43:33 -04:00
c711c788f0
stage2: fixes for error unions, optionals, errors
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* `?E` where E is an error set with only one field now lowers the same
as `bool`.
* Fix implementation of errUnionErrOffset and errUnionPayloadOffset to
properly compute the offset of each field. Also name them the same
as the corresponding LLVM functions and have the same function
signature, to avoid confusion. This fixes a bug where wasm was
passing the error union type instead of the payload type.
* Fix C backend handling of optionals with zero-bit payload types.
* C backend: separate out airOptionalPayload and airOptionalPayloadPtr
which reduces branching and cleans up control flow.
* Make Type.isNoReturn return true for error sets with no fields.
* Make `?error{}` have only one possible value (null).
2022-05-24 15:34:52 -07:00
8c49420928
aarch64: update for new error union layout
2022-05-24 15:34:52 -07:00
41f517e5f5
x64: update for new error union layout
2022-05-24 15:34:52 -07:00
02e9d9b43b
stage2: make ?anyerror represented the same as anyerror
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I was able to get the backend implementation working on LLVM and the C
backend, but I'm going to ask for some help on the other backends.
2022-05-24 15:34:52 -07:00
3a059ebe4c
wasm: Fixes for error union semantics
2022-05-24 15:34:52 -07:00
Veikka Tuominen