Commit Graph

147 Commits

Author SHA1 Message Date
Alex Rønne Petersen d1d95294fd std.Target.Cpu.Arch: Remove the aarch64_32 tag.
This is a misfeature that we inherited from LLVM:

* https://reviews.llvm.org/D61259
* https://reviews.llvm.org/D61939

(`aarch64_32` and `arm64_32` are equivalent.)

I truly have no idea why this triple passed review in LLVM. It is, to date, the
*only* tag in the architecture component that is not, in fact, an architecture.
In reality, it is just an ILP32 ABI for AArch64 (*not* AArch32).

The triples that use `aarch64_32` look like `aarch64_32-apple-watchos`. Yes,
that triple is exactly what you think; it has no ABI component. They really,
seriously did this.

Since only Apple could come up with silliness like this, it should come as no
surprise that no one else uses `aarch64_32`. Later on, a GNU ILP32 ABI for
AArch64 was developed, and support was added to LLVM:

* https://reviews.llvm.org/D94143
* https://reviews.llvm.org/D104931

Here, sanity seems to have prevailed, and a triple using this ABI looks like
`aarch64-linux-gnu_ilp32` as you would expect.

As can be seen from the diffs in this commit, there was plenty of confusion
throughout the Zig codebase about what exactly `aarch64_32` was. So let's just
remove it. In its place, we'll use `aarch64-watchos-ilp32`,
`aarch64-linux-gnuilp32`, and so on. We'll then translate these appropriately
when talking to LLVM. Hence, this commit adds the `ilp32` ABI tag (we already
have `gnuilp32`).
2024-07-28 19:44:52 -07:00
David Rubin 81ca3a1d59 riscv: fix logic bug in ptr_elem_ptr
I was doing duplicate work with `elemOffset` multiplying by the abi size and then the `ptr_add` `genBinOp` also multiplying.

This led to having writes happening in the wrong place.
2024-07-26 04:05:41 -07:00
David Rubin cde6956b21 riscv: remove redundant assert in genBinOp 2024-07-26 04:05:41 -07:00
David Rubin 9766b68c47 riscv: un-cache the avl and vtype when returning from a function call
the csrs `avl` and `vtype` are considered caller-saved so it could have changed while inside of the function.
the easiest way to handle this is to just set the cached `vtype` and `avl` to null, so that the next time something
needs to set it, it'll emit an instruction instead of relying on a potentially invalid setting.
2024-07-26 04:05:38 -07:00
Julian Vesper 3344ed8b8f aarch64: reenable tests that are no longer regressed
Closes #12012
2024-07-25 20:23:23 +03:00
Jacob Young 40bab4df69 behavior: disable test that triggers an llvm assertion
Tracked by #20680
2024-07-19 04:35:11 -04:00
David Rubin 5a4fe39fbb riscv: disable failing tests 2024-07-14 23:04:06 -07:00
David Rubin 5a2c547fc1 riscv: vectors part 3 2024-07-14 23:02:35 -07:00
David Rubin 7a02878f4e riscv: truncate airStructFieldVal result 2024-07-14 23:02:33 -07:00
David Rubin 4fd8900337 riscv: rewrite "binOp"
Reorganize how the binOp and genBinOp functions work.

I've spent quite a while here reading exactly through the spec and so many
tests are enabled because of several critical issues the old design had.

There are some regressions that will take a long time to figure out individually
so I will ignore them for now, and pray they get fixed by themselves. When
we're closer to 100% passing is when I will start diving into them one-by-one.
2024-06-13 02:24:39 -07:00
David Rubin 031d8248e0 riscv: first sign of floats! 2024-06-13 02:21:38 -07:00
Robin Voetter a3b1ba82f5 spirv: new vectorization helper
The old vectorization helper (WipElementWise) was clunky and a bit
annoying to use, and it wasn't really flexible enough.

This introduces a new vectorization helper, which uses Temporary and
Operation types to deduce a Vectorization to perform the operation
in a reasonably efficient manner. It removes the outer loop
required by WipElementWise so that implementations of AIR instructions
are cleaner. This helps with sanity when we start to introduce support
for composite integers.

airShift, convertToDirect, convertToIndirect, and normalize are initially
implemented using this new method.
2024-06-10 20:32:49 +02:00
Robin Voetter b9d738a5cf spirv: disable tests that fail on pocl
Besides the Intel OpenCL CPU runtime, we can now run the
behavior tests using the Portable Computing Language. This
implementation is open-source, so it will be easier for us
to patch in updated versions of spirv-llvm-translator that
have bug fixes etc.
2024-06-10 20:32:34 +02:00
David Rubin a30af172e8 riscv: math progress 2024-05-11 02:17:24 -07:00
David Rubin d9e0cafe64 riscv: add stage2_riscv to test matrix and bypass failing tests 2024-05-11 02:17:24 -07:00
Jacob Young f1c0f42cdd cbe: fix optional codegen
Also reduce ctype pool string memory usage, remove self assignments, and
enable more warnings.
2024-04-13 01:35:20 -04:00
Robin Voetter ac16545895 spirv: enable passing tests 2024-04-06 13:52:48 +02:00
Ali Chraghi 436f53f55d spirv: implement @mulWithOverflow 2024-04-06 09:01:46 +03:30
Jacob Young 5a41704f7e cbe: rewrite CType
Closes #14904
2024-03-30 20:50:48 -04:00
Robin Voetter 2f9e37ade0 spirv: enable passing tests 2024-03-18 19:13:51 +01:00
Meghan Denny 4b1edad6e2 test: reenable some behavior vector tests 2024-03-15 16:42:10 +02:00
Jacob Young 2fdc9e6ae8 x86_64: implement @shuffle 2024-02-25 11:22:10 +01:00
Jacob Young a9f738e56b x86_64: implement c abi for bool vectors 2024-02-12 05:25:07 +01:00
Ali Chraghi 37b0aa600a spirv: make rusticl the primary testing implementation 2024-02-09 09:27:08 +03:30
Jakub Konka 52066bf8e4 x86_64+macho: pass more behavior tests 2024-02-06 19:01:17 +01:00
Robin Voetter 2511106150 spirv: air vector_store_element 2024-02-04 19:09:34 +01:00
Robin Voetter 9fbba0e01a spirv: update tests 2024-02-04 19:09:33 +01:00
Robin Voetter 1d548aa2aa spirv: air splat 2024-02-04 19:09:33 +01:00
Robin Voetter 631d1b63a8 spirv: fix shuffle properly 2024-02-04 19:09:32 +01:00
Robin Voetter b67d983abd spirv: vectorize add/sub overflow 2024-02-04 19:09:27 +01:00
Robin Voetter 761594e226 spirv: reduce, reduce_optimized 2024-02-04 19:09:27 +01:00
Robin Voetter 2f815853dc spirv: shlWithOverflow 2024-02-04 19:09:26 +01:00
Robin Voetter 15cf5f88c1 spirv: vectors for air not 2024-02-04 19:09:25 +01:00
Veikka Tuominen 78e982f7c3 llvm: fix alignment of array ptr when bitcasting vector
Closes #17996
2024-01-29 13:51:57 +02:00
dweiller 8108c9f4d2 test/behavior: replace all 'comptime expect' with 'comptime assert' 2024-01-15 20:55:01 +11:00
Veikka Tuominen 804cee3b93 categorize behavior/bugs/<issueno>.zig tests 2024-01-06 16:49:41 -08:00
Meghan Denny cbf2b1fea4 test: add coverage for index into comptime-known vector is comptime-known 2023-12-22 04:44:15 +02:00
Jacob Young bdb6546a8f x86_64: fix vector comparisions 2023-12-04 13:09:13 -05:00
Jacob Young 7c85ea65ba x86_64: "implement" aggregate_init for vectors 2023-12-03 13:55:31 -05:00
Jacob Young 014833b61f x86_64: implement more compliant vectors 2023-12-03 10:22:06 -05:00
Andrew Kelley d5e21a4f1a std: remove meta.trait
In general, I don't like the idea of std.meta.trait, and so I am
providing some guidance by deleting the entire namespace from the
standard library and compiler codebase.

My main criticism is that it's overcomplicated machinery that bloats
compile times and is ultimately unnecessary given the existence of Zig's
strong type system and reference traces.

Users who want this can create a third party package that provides this
functionality.

closes #18051
2023-11-22 13:24:27 -05:00
mlugg 9c16b2370d test: update behavior to silence 'var is never mutated' errors 2023-11-19 09:57:03 +00:00
Jacob Young 509be7cf1f x86_64: fix std test failures 2023-11-03 23:18:21 -04:00
Jacob Young 27fe945a00 Revert "Revert "Merge pull request #17637 from jacobly0/x86_64-test-std""
This reverts commit 6f0198cadb.
2023-10-22 15:46:43 -04:00
Andrew Kelley 6f0198cadb Revert "Merge pull request #17637 from jacobly0/x86_64-test-std"
This reverts commit 0c99ba1eab, reversing
changes made to 5f92b070bf.

This caused a CI failure when it landed in master branch due to a
128-bit `@byteSwap` in std.mem.
2023-10-22 12:16:35 -07:00
Jacob Young 2e6e39a700 x86_64: fix bugs and disable erroring tests 2023-10-21 10:55:41 -04:00
Robin Voetter faad97edff spirv: update failing / passing tests
Some tests are now failing due to debug info changes, some tests
now pass due to improved compiler functionality.
2023-10-15 20:08:18 +02:00
Ali Chraghi 45a1945dc4 spirv: simple binary and comparison vector operations 2023-10-15 14:00:33 +02:00
Ali Chraghi 2fe16e072a spirv: emit vectors as arrays 2023-10-15 14:00:32 +02:00
Jacob Young 1eb023908d x86_64: implement float round builtins 2023-10-01 15:09:52 -04:00