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libtsan: update to LLVM 22
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@@ -646,6 +646,7 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
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case 0xC033: // 33 C0 : xor eax, eax
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case 0xC933: // 33 C9 : xor ecx, ecx
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case 0xD233: // 33 D2 : xor edx, edx
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case 0xFF33: // 33 FF : xor edi, edi
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case 0x9066: // 66 90 : xchg %ax,%ax (Two-byte NOP)
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case 0xDB84: // 84 DB : test bl,bl
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case 0xC084: // 84 C0 : test al,al
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@@ -764,6 +765,7 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
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switch (0x00FFFFFF & *(u32 *)address) {
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case 0x10b70f: // 0f b7 10 : movzx edx, WORD PTR [rax]
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case 0x02b70f: // 0f b7 02 : movzx eax, WORD PTR [rdx]
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case 0xc00b4d: // 4d 0b c0 : or r8, r8
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case 0xc03345: // 45 33 c0 : xor r8d, r8d
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case 0xc08548: // 48 85 c0 : test rax, rax
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@@ -799,6 +801,7 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
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case 0xc9854d: // 4d 85 c9 : test r9, r9
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case 0xc98b4c: // 4c 8b c9 : mov r9, rcx
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case 0xd12948: // 48 29 d1 : sub rcx, rdx
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case 0xc22b4c: // 4c 2b c2 : sub r8, rdx
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case 0xca2b48: // 48 2b ca : sub rcx, rdx
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case 0xca3b48: // 48 3b ca : cmp rcx, rdx
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case 0xd12b48: // 48 2b d1 : sub rdx, rcx
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@@ -813,6 +816,7 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
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case 0xd9f748: // 48 f7 d9 : neg rcx
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case 0xc03145: // 45 31 c0 : xor r8d,r8d
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case 0xc93145: // 45 31 c9 : xor r9d,r9d
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case 0xd23345: // 45 33 d2 : xor r10d, r10d
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case 0xdb3345: // 45 33 db : xor r11d, r11d
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case 0xc08445: // 45 84 c0 : test r8b,r8b
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case 0xd28445: // 45 84 d2 : test r10b,r10b
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