diff --git a/lib/compiler_rt.zig b/lib/compiler_rt.zig index 501d35f0a2..9e62f047bb 100644 --- a/lib/compiler_rt.zig +++ b/lib/compiler_rt.zig @@ -447,29 +447,8 @@ pub const gnu_f16_abi = switch (builtin.cpu.arch) { pub const want_sparc_abi = builtin.cpu.arch.isSPARC(); -/// This seems to mostly correspond to `clang::TargetInfo::HasFloat16`. pub fn F16T(comptime OtherType: type) type { return switch (builtin.cpu.arch) { - .amdgcn, - .arm, - .armeb, - .thumb, - .thumbeb, - .aarch64, - .aarch64_be, - .hexagon, - .loongarch32, - .loongarch64, - .nvptx, - .nvptx64, - .riscv32, - .riscv32be, - .riscv64, - .riscv64be, - .s390x, - .spirv32, - .spirv64, - => f16, .x86, .x86_64 => if (builtin.target.os.tag.isDarwin()) switch (OtherType) { // Starting with LLVM 16, Darwin uses different abi for f16 // depending on the type of the other return/argument..??? @@ -477,7 +456,7 @@ pub fn F16T(comptime OtherType: type) type { f80, f128 => f16, else => unreachable, } else f16, - else => u16, + else => f16, }; } diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index f1fc2a8719..4f1da37e9f 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -4646,20 +4646,6 @@ fn toLlvmGlobalAddressSpace(wanted_address_space: std.builtin.AddressSpace, targ /// or if it produces miscompilations. pub fn backendSupportsF16(target: *const std.Target) bool { return switch (target.cpu.arch) { - // https://github.com/llvm/llvm-project/issues/97981 - .csky, - // https://github.com/llvm/llvm-project/issues/97981 - .powerpc, - .powerpcle, - .powerpc64, - .powerpc64le, - // https://github.com/llvm/llvm-project/issues/97981 - .wasm32, - .wasm64, - // https://github.com/llvm/llvm-project/issues/97981 - .sparc, - .sparc64, - => false, .arm, .armeb, .thumb, @@ -4686,11 +4672,6 @@ pub fn backendSupportsF128(target: *const std.Target) bool { return switch (target.cpu.arch) { // https://github.com/llvm/llvm-project/issues/121122 .amdgcn, - // Test failures all over the place. - .mips64, - .mips64el, - // https://github.com/llvm/llvm-project/issues/41838 - .sparc, => false, .arm, .armeb,