test: Disable store vector with memset on soft float arm.

https://github.com/ziglang/zig/issues/16177
2026-04-27 19:09:47 +03:00 · 2024-08-28 10:00:04 +02:00
parent 4fcd3e00fa
commit 5285f41267
1 changed files with 8 additions and 5 deletions
@@ -1442,7 +1442,14 @@ test "store vector with memset" {
    if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;

    if (builtin.zig_backend == .stage2_llvm) {
+        // LLVM 16 ERROR: "Converting bits to bytes lost precision"
+        // https://github.com/ziglang/zig/issues/16177
        switch (builtin.target.cpu.arch) {
+            .arm,
+            .armeb,
+            .thumb,
+            .thumbeb,
+            => if (builtin.target.floatAbi() == .soft) return error.SkipZigTest,
            .wasm32,
            .mips,
            .mipsel,
@@ -1451,11 +1458,7 @@ test "store vector with memset" {
            .riscv64,
            .powerpc,
            .powerpc64,
-            => {
-                // LLVM 16 ERROR: "Converting bits to bytes lost precision"
-                // https://github.com/ziglang/zig/issues/16177
-                return error.SkipZigTest;
-            },
+            => return error.SkipZigTest,
            else => {},
        }
    }