mirror of
https://github.com/rust-lang/rust.git
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Zalathar
72abf370bb
Long ago, UI tests were divided into "compile" and "run" tests. Later, the compile tests were further subdivided into "check" and "build" tests, to speed up tests that don't need a full build. The same split was never applied to incremental test revisions, so the only way to perform a check build in incremental tests is (confusingly) to use a `cfail` revision and then specify `//@ check-fail` or `//@ check-pass`. This PR makes room for dedicated check-fail and check-pass revisions by renaming the existing `cfail` and `cpass` revisions to `bfail` and `bpass`, since they currently perform a full build.
221 lines
5.4 KiB
Rust
221 lines
5.4 KiB
Rust
// This test case tests the incremental compilation hash (ICH) implementation
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// for inline asm.
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// The general pattern followed here is: Change one thing between rev1 and rev2
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// and make sure that the hash has changed, then change nothing between rev2 and
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// rev3 and make sure that the hash has not changed.
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//@ build-pass (FIXME(62277): could be check-pass?)
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//@ revisions: bfail1 bfail2 bfail3 bfail4 bfail5 bfail6
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//@ compile-flags: -Z query-dep-graph -O
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//@ needs-asm-support
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//@ [bfail1]compile-flags: -Zincremental-ignore-spans
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//@ [bfail2]compile-flags: -Zincremental-ignore-spans
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//@ [bfail3]compile-flags: -Zincremental-ignore-spans
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//@ ignore-backends: gcc
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#![allow(warnings)]
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#![feature(rustc_attrs)]
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#![crate_type="rlib"]
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use std::arch::asm;
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// Change template
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#[cfg(any(bfail1,bfail4))]
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub fn change_template(_a: i32) -> i32 {
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let c: i32;
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unsafe {
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asm!("mov {0}, 1",
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out(reg) c
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);
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}
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c
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}
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#[cfg(not(any(bfail1,bfail4)))]
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#[rustc_clean(cfg="bfail2", except="opt_hir_owner_nodes, optimized_mir")]
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#[rustc_clean(cfg="bfail3")]
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#[rustc_clean(cfg="bfail5", except="opt_hir_owner_nodes, optimized_mir")]
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#[rustc_clean(cfg="bfail6")]
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub fn change_template(_a: i32) -> i32 {
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let c: i32;
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unsafe {
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asm!("mov {0}, 2",
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out(reg) c
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);
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}
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c
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}
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// Change output
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#[cfg(any(bfail1,bfail4))]
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub fn change_output(a: i32) -> i32 {
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let mut _out1: i32 = 0;
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let mut _out2: i32 = 0;
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unsafe {
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asm!("mov {0}, {1}",
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out(reg) _out1,
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in(reg) a
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);
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}
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_out1
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}
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#[cfg(not(any(bfail1,bfail4)))]
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#[rustc_clean(cfg="bfail2", except="opt_hir_owner_nodes, optimized_mir")]
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#[rustc_clean(cfg="bfail3")]
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#[rustc_clean(cfg="bfail5", except="opt_hir_owner_nodes, optimized_mir")]
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#[rustc_clean(cfg="bfail6")]
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub fn change_output(a: i32) -> i32 {
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let mut _out1: i32 = 0;
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let mut _out2: i32 = 0;
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unsafe {
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asm!("mov {0}, {1}",
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out(reg) _out2,
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in(reg) a
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);
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}
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_out1
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}
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// Change input
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#[cfg(any(bfail1,bfail4))]
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub fn change_input(_a: i32, _b: i32) -> i32 {
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let _out;
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unsafe {
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asm!("mov {0}, {1}",
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out(reg) _out,
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in(reg) _a
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);
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}
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_out
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}
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#[cfg(not(any(bfail1,bfail4)))]
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#[rustc_clean(cfg="bfail2", except="opt_hir_owner_nodes, optimized_mir")]
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#[rustc_clean(cfg="bfail3")]
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#[rustc_clean(cfg="bfail5", except="opt_hir_owner_nodes, optimized_mir")]
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#[rustc_clean(cfg="bfail6")]
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub fn change_input(_a: i32, _b: i32) -> i32 {
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let _out;
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unsafe {
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asm!("mov {0}, {1}",
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out(reg) _out,
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in(reg) _b
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);
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}
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_out
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}
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// Change input constraint
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#[cfg(any(bfail1,bfail4))]
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub fn change_input_constraint(_a: i32, _b: i32) -> i32 {
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let _out;
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unsafe {
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asm!("mov {0}, {1}",
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out(reg) _out,
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in(reg) _a,
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in("eax") _b);
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}
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_out
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}
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#[cfg(not(any(bfail1,bfail4)))]
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#[rustc_clean(cfg="bfail2", except="opt_hir_owner_nodes, optimized_mir")]
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#[rustc_clean(cfg="bfail3")]
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#[rustc_clean(cfg="bfail5", except="opt_hir_owner_nodes, optimized_mir")]
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#[rustc_clean(cfg="bfail6")]
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub fn change_input_constraint(_a: i32, _b: i32) -> i32 {
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let _out;
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unsafe {
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asm!("mov {0}, {1}",
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out(reg) _out,
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in(reg) _a,
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in("ecx") _b);
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}
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_out
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}
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// Change clobber
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#[cfg(any(bfail1,bfail4))]
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub fn change_clobber(_a: i32) -> i32 {
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let _out;
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unsafe {
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asm!("mov {0}, {1}",
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out(reg) _out,
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in(reg) _a,
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lateout("ecx") _
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);
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}
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_out
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}
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#[cfg(not(any(bfail1,bfail4)))]
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#[rustc_clean(cfg="bfail2", except="opt_hir_owner_nodes, optimized_mir")]
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#[rustc_clean(cfg="bfail3")]
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#[rustc_clean(cfg="bfail5", except="opt_hir_owner_nodes, optimized_mir")]
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#[rustc_clean(cfg="bfail6")]
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub fn change_clobber(_a: i32) -> i32 {
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let _out;
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unsafe {
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asm!("mov {0}, {1}",
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out(reg) _out,
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in(reg) _a,
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lateout("edx") _
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);
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}
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_out
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}
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// Change options
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#[cfg(any(bfail1,bfail4))]
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub fn change_options(_a: i32) -> i32 {
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let _out;
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unsafe {
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asm!("mov {0}, {1}",
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out(reg) _out,
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in(reg) _a,
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options(readonly),
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);
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}
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_out
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}
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#[cfg(not(any(bfail1,bfail4)))]
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#[rustc_clean(cfg="bfail2", except="opt_hir_owner_nodes, optimized_mir")]
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#[rustc_clean(cfg="bfail3")]
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#[rustc_clean(cfg="bfail5", except="opt_hir_owner_nodes, optimized_mir")]
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#[rustc_clean(cfg="bfail6")]
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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pub fn change_options(_a: i32) -> i32 {
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let _out;
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unsafe {
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asm!("mov {0}, {1}",
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out(reg) _out,
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in(reg) _a,
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options(nomem ),
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);
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}
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_out
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}
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