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c727a400b5
Update Xtensa target data layouts to match upstream LLVM Born from https://github.com/rust-lang/rust/pull/156568#issuecomment-4563228595. We've been using a fork to distribute compiler builds that support the Xtensa arch whilst we're upstreaming. At a certain point we received some changes on our fork, which haven't been upstreamed, which I now to believe to be a mistake - therefore I'm reverting to the upstream LLVM datalayout. r? @folkertdev