Files
rust/compiler/rustc_codegen_llvm/src
Tsukasa OI 5ebdec5ac2 rustc_codegen_llvm: Adjust RISC-V inline assembly's clobber list
Despite that the `fflags` register (representing floating point
exception flags) is stated as a flag register in the reference, it's not
in the default clobber list of the RISC-V inline assembly and it would
be better to fix it.
2025-09-15 02:16:34 +00:00
..
2025-07-31 14:19:27 +02:00
2025-07-18 16:23:54 -07:00