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8addb6f3be3cd166bf40919c766cde2efc19fbaa
rust/compiler/rustc_target/src/callconv
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Ralf Jung 321db85fb4 x86 (32/64): go back to passing SIMD vectors by-ptr
2025-06-04 08:38:49 +02:00
..
aarch64.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
amdgpu.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
arm.rs
compiler: change Conv to CanonAbi
2025-06-03 10:03:44 -07:00
avr.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
bpf.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
csky.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
hexagon.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
loongarch.rs
remove compiler support for extern "rust-intrinsic" blocks
2025-04-06 21:32:58 +02:00
m68k.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
mips64.rs
…
mips.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
mod.rs
x86 (32/64): go back to passing SIMD vectors by-ptr
2025-06-04 08:38:49 +02:00
msp430.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
nvptx64.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
powerpc64.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
powerpc.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
riscv.rs
remove compiler support for extern "rust-intrinsic" blocks
2025-04-06 21:32:58 +02:00
s390x.rs
rename BackendRepr::Vector → SimdVector
2025-02-28 17:17:45 +01:00
sparc64.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
sparc.rs
compiler: remove rustc_target::abi entirely
2025-02-07 11:23:12 -08:00
wasm.rs
add FCW to warn about wasm ABI transition
2025-03-25 08:22:35 +01:00
x86_64.rs
rename BackendRepr::Vector → SimdVector
2025-02-28 17:17:45 +01:00
x86_win32.rs
compiler: factor Windows x86-32 ABI impl into its own file
2025-03-05 15:11:20 -08:00
x86_win64.rs
rename BackendRepr::Vector → SimdVector
2025-02-28 17:17:45 +01:00
x86.rs
remove compiler support for extern "rust-intrinsic" blocks
2025-04-06 21:32:58 +02:00
xtensa.rs
rename BackendRepr::Vector → SimdVector
2025-02-28 17:17:45 +01:00