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rust/library/stdarch
Jonathan Brouwer dc103c4cd9 Rollup merge of #146798 - a4lg:riscv-intrinsics-zkne_or_zknd, r=Amanieu
RISC-V: Implement (Zkne or Zknd) intrinsics correctly

On rust-lang/stdarch#1765, it has been pointed out that two RISC-V (64-bit only) intrinsics to perform AES key scheduling have wrong target feature.
`aes64ks1i` and `aes64ks2` instructions require *either* Zkne (scalar cryptography: AES encryption) or Zknd (scalar cryptography: AES decryption) extension (or both) but corresponding Rust intrinsics (in `core::arch::riscv64`) required *both* Zkne and Zknd extensions.

An excerpt from the original intrinsics:

```rust
#[target_feature(enable = "zkne", enable = "zknd")]
```

To fix that, we need to:

1.  Represent a condition where *either* Zkne or Zknd is available and
2.  Workaround an issue: `llvm.riscv.aes64ks1i` / `llvm.riscv.aes64ks2` LLVM intrinsics require either Zkne or Zknd extension.

This PR attempts to resolve them by:

1.  Adding a perma-unstable RISC-V target feature: `zkne_or_zknd` (implied from both `zkne` and `zknd`) and
2.  Using inline assembly to construct machine code directly (because `zkne_or_zknd` alone cannot imply neither Zkne nor Zknd, we cannot use LLVM intrinsics).

The author confirmed that we can construct an AES key scheduling function with decent performance using fixed `aes64ks1i` and `aes64ks2` intrinsics (with optimization enabled).
2025-12-31 17:32:04 +01:00
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stdarch - Rust's standard library SIMD components

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This repository contains the core_arch crate, which implements core::arch - Rust's core library architecture-specific intrinsics.

The std::simd component now lives in the packed_simd_2 crate.

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