Nikita Popov c3ab409b4f Use captures(address) instead of captures(none) for indirect args ...

While provenance cannot be captured through these arguments, the
address / object identity can.

2025-08-26 16:16:23 +02:00

..

aarch64.rs

compiler: remove rustc_target::abi entirely

2025-02-07 11:23:12 -08:00

amdgpu.rs

compiler: remove rustc_target::abi entirely

2025-02-07 11:23:12 -08:00

arm.rs

compiler: change Conv to CanonAbi

2025-06-03 10:03:44 -07:00

avr.rs

compiler: remove rustc_target::abi entirely

2025-02-07 11:23:12 -08:00

bpf.rs

compiler: remove rustc_target::abi entirely

2025-02-07 11:23:12 -08:00

csky.rs

compiler: remove rustc_target::abi entirely

2025-02-07 11:23:12 -08:00

hexagon.rs

compiler: remove rustc_target::abi entirely

2025-02-07 11:23:12 -08:00

loongarch.rs

use let chains in mir, resolve, target

2025-07-28 06:10:36 +05:00

m68k.rs

compiler: remove rustc_target::abi entirely

2025-02-07 11:23:12 -08:00

mips64.rs

use let chains in mir, resolve, target

2025-07-28 06:10:36 +05:00

mips.rs

compiler: Parse p- specs in datalayout string, allow definition of custom default data address space

2025-07-07 09:04:53 +02:00

mod.rs

Use captures(address) instead of captures(none) for indirect args

2025-08-26 16:16:23 +02:00

msp430.rs

compiler: remove rustc_target::abi entirely

2025-02-07 11:23:12 -08:00

nvptx64.rs

Fix RISC-V C function ABI when passing/returning structs containing floats

2025-06-16 10:14:07 +01:00

powerpc64.rs

compiler: remove rustc_target::abi entirely

2025-02-07 11:23:12 -08:00

powerpc.rs

compiler: remove rustc_target::abi entirely

2025-02-07 11:23:12 -08:00

riscv.rs

use let chains in mir, resolve, target

2025-07-28 06:10:36 +05:00

s390x.rs

setup CI and tidy to use typos for spellchecking and fix few typos

2025-07-03 10:51:06 +03:00

sparc64.rs

use is_multiple_of instead of manual modulo

2025-07-05 10:55:35 +02:00

sparc.rs

compiler: Parse p- specs in datalayout string, allow definition of custom default data address space

2025-07-07 09:04:53 +02:00

wasm.rs

Remove all support for wasm's legacy ABI

2025-06-14 09:57:06 +00:00

x86_64.rs

use div_ceil instead of manual logic

2025-07-05 10:55:42 +02:00

x86_win32.rs

compiler: factor Windows x86-32 ABI impl into its own file

2025-03-05 15:11:20 -08:00

x86_win64.rs

rename BackendRepr::Vector → SimdVector

2025-02-28 17:17:45 +01:00

x86.rs

Auto merge of #143182 - xdoardo:more-addrspace, r=workingjubilee

2025-07-07 17:28:14 +00:00

xtensa.rs

use div_ceil instead of manual logic

2025-07-05 10:55:42 +02:00