rust/compiler/rustc_target at 2facd34bc8c9ccd45165c19efefd8fa5652d5793 - rust

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Jonathan Brouwer 3fb712c80a Rollup merge of #154719 - androm3da:hexagon-inline-asm-register-classes, r=JohnTitor

Hexagon inline asm: add reg_pair, vreg, vreg_pair, and qreg register classes

Add three new register classes for the Hexagon inline assembly backend:

* `reg_pair`: GPR double registers (r1:0 through r27:26)
* `vreg`: HVX vector registers (v0-v31)
* `qreg`: HVX predicate registers (q0-q3), clobber-only for now

2026-04-08 23:04:34 +02:00

src

Rollup merge of #154719 - androm3da:hexagon-inline-asm-register-classes, r=JohnTitor

2026-04-08 23:04:34 +02:00

Cargo.toml

Add --print target-spec-json-schema

2025-09-12 20:53:28 +02:00

README.md

Fix outdated crate names in compiler docs

2021-04-08 11:12:14 -05:00

README.md

rustc_target contains some very low-level details that are specific to different compilation targets and so forth.

For more information about how rustc works, see the rustc dev guide.