sayantn 229d480cdc Change implementation of vext

2026-05-09 09:41:22 +05:30

..

assert-instr-macro

assert-instr: support type generics

2026-04-14 00:54:55 +00:00

core_arch

Change implementation of vext

2026-05-09 09:41:22 +05:30

intrinsic-test

some changes in argument loading in intrinsic-test

2026-05-05 20:45:19 +05:30

simd-test-macro

Fix MIPS tests

2026-04-14 19:55:48 +02:00

stdarch-gen-arm

Change implementation of vext

2026-05-09 09:41:22 +05:30

stdarch-gen-hexagon

Remove #[inline(always)] from hexagon intrinsic generator & re-generate intrinsics

2026-05-06 16:28:26 +01:00

stdarch-gen-hexagon-scalar

hexagon: Add scalar DSP intrinsics

2026-04-16 12:41:27 -07:00

stdarch-gen-loongarch

loongarch: Use intrinsics::simd for vbit{clr,rev,set}

2026-05-07 22:34:29 +08:00

stdarch-test

stdarch-test: [us]shll[tb] have no aliases

2026-04-14 01:47:11 +00:00

stdarch-verify

core_arch: remove redundant tests

2026-05-07 11:15:14 +01:00