Commit Graph

2296 Commits

Author SHA1 Message Date
Jonathan Brouwer 7ab3168371 Rollup merge of #152821 - wesleywiser:add_forbidden_ctarget_feature_hard_error_option, r=dingxiangfei2009
Allow forbidden target features to be hard errors

Sometimes when adding a new target features to the list of known target features, we want to completely forbid them from being used because they are ABI affecting and should be target modifiers instead. As such, we want to issue an error rather than a warning since there are no future compatibility concerns .

r? @workingjubilee since you're familiar with the motivating case in rust-lang/rust#136597

If I rebase that PR on top of this locally, then we get the following error messages when trying to activate the SLS target feature (note that they are *errors* not *warnings* and we've omitted the usual note about future compatibility):

```
error: target feature `harden-sls-ijmp` cannot be enabled with `-Ctarget-feature`: use `harden-sls` compiler flag instead

error: target feature `harden-sls-ret` cannot be enabled with `-Ctarget-feature`: use `harden-sls` compiler flag instead

error: aborting due to 2 previous errors
```
2026-05-22 16:21:26 +02:00
Jonathan Brouwer 93e516b3e9 Rollup merge of #148666 - odlot:master, r=wesleywiser
Add support for xray in aarch64 unknown none targets

I am currently working on an embedded project and use the target `aarch64-unknown-none`, which I want to profile.
I found the following compiler flag `-Z instrument-xray` (https://doc.rust-lang.org/unstable-book/compiler-flags/instrument-xray.html) available and I locally built a toolchain that sets the `supports_xray: true` option in `TargetOptions` for `compiler/rustc_target/src/spec/targets/aarch64_unknown_none.rs`.
Using this toolchain in `rustup` I am able to use the instrumentation pass and I verified that the disassembly looks as what I want.
I understand that it isn't available upstream while being supported due to the separate runtime library which has to be linked (e.g., https://www.llvm.org/docs/XRay.html#xray-runtime-library), which is not available for `aarch64-unknown-none`.
I argue that someone who cross-compiles for `aarch64-unknown-none` would be okay with writing a separate runtime library themselves, which I intend to do.
As far as I understood it is not necessarily required to have a runtime library at this point, i.e., the user of this API should link it, e.g., from their `build.rs` file using `cargo::rustc-link-lib=LIB` if there is an XRay LIB available for the respective target, e.g., `clang+llvm-19.1.1-aarch64-linux-gnu/lib/clang/19/lib/aarch64-unknown-linux-gnu/libclang_rt.xray-fdr.a` (which afaik there isn't for `aarch64-unknown-none`) and do "configuration as code" of XRay's options.
It should not be part of the compiler, because the instrumentation and the runtime library are completely decoupled. One can modify the instrumented code by the compiler pass however one wants to, this again pushes me into the direction of telling the developer to bring his own runtime library.

I would like to bring my change that enables this instrumentation back into upstream to facilitate my developer experience.
2026-05-19 15:04:43 +02:00
daxpedda 1b7609cf1c Disable main_needs_argc_argv for Wasm 2026-05-14 19:06:32 +02:00
Dirkjan Ochtman f49e45101c Add Swift function call ABI
Adds an unstable `extern "Swift"` ABI behind the `abi_swift` feature
gate, mapping to LLVM's `swiftcc` calling convention. Cranelift and
GCC backends fall back to the platform default since they have no
equivalent.
2026-05-12 17:09:19 +02:00
odlot 689279eb04 Add support for xray in aarch64 unknown none softfloat target 2026-05-11 21:41:50 +02:00
odlot c45fc2b842 Add support for xray in aarch64 unknown none target 2026-05-11 21:40:00 +02:00
Ralf Jung f0ab0ce824 remove allows_weak_linkage target spec flag 2026-05-09 21:20:11 +02:00
Jonathan Brouwer 71597bc71c Rollup merge of #156061 - alexcrichton:unwinding-onw-asi, r=bjorn3
Support `-Cpanic=unwind` on WASI targets

This commit is some minor updates/restructuring in a few locations with the end result being supporting `-Cpanic=unwind` on WASI targets. This continues to be off-by-default insofar as WASI targets default to `-Cpanic=abort`, meaning that actually using anything in this commit requires `-Zbuild-std`. Specifically the changes made here are:

* The self-contained sysroot for WASI targets now contains a copy of `libunwind.a` from wasi-sdk, first shipped with wasi-sdk-33 (also updated here).
* The `unwind` crate here in this repository uses the `libunwind` module instead of the custom bare-metal wasm implementation of exceptions. This means that Rust uses the `_Unwind_*` symbols which allows it to interoperate with C/C++/etc.
* Wasm targets are all updated to pass the LLVM argument `-wasm-use-legacy-eh=false` to differ from LLVM's/clang's default of using the legacy exception handling proposal for WebAssembly. This has no effect by default because `panic=abort` is used on most targets. Emscripten is exempted from this as the Emscripten target is explicitly intended to follow LLVM's/clang's defaults.
* There's a single test in the test suite that links to the `panic_unwind` crate which ended up requiring `-Wexceptions` from Wasmtime, so the test parts were updated and Wasmtime was updated in CI, too.

The net result of all of this is that this should not actually affect any WebAssembly target's default behavior. Optionally, though, WASI programs can be built with exception handling via:

    RUSTFLAGS='-Cpanic=unwind' cargo +nightly run -Z build-std --target wasm32-wasip2

Effectively `-Zbuild-std` and `-Cpanic=unwind` is all that's necessary to enable this support on wasm targets.

Finally, this ends up closing rust-lang/rust#154593 as well. The WASI targets are now defined to use `-lunwind` to implement unwinding. This means that the in-tree definition of `__cpp_exception` is no longer of concern and the definition is always sourced externally. If Rust is linked with other C/C++ code using WASI then these idioms are compatible with wasi-sdk, for example, to use that as a linker. The main caveat is that when using an external linker the `-fwasm-exceptions` argument needs to be passed to `clang` for it to be able to find the `libunwind.a` library to link against.

Closes rust-lang/rust#154593
2026-05-07 22:44:02 +02:00
Alex Crichton 506693e7d6 Support -Cpanic=unwind on WASI targets
This commit is some minor updates/restructuring in a few locations with
the end result being supporting `-Cpanic=unwind` on WASI targets. This
continues to be off-by-default insofar as WASI targets default to
`-Cpanic=abort`, meaning that actually using anything in this commit
requires `-Zbuild-std`. Specifically the changes made here are:

* The self-contained sysroot for WASI targets now contains a copy of
  `libunwind.a` from wasi-sdk, first shipped with wasi-sdk-33 (also
  updated here).
* The `unwind` crate here in this repository uses the `libunwind` module
  instead of the custom bare-metal wasm implementation of exceptions.
  This means that Rust uses the `_Unwind_*` symbols which allows it to
  interoperate with C/C++/etc.
* Wasm targets are all updated to pass the LLVM argument
  `-wasm-use-legacy-eh=false` to differ from LLVM's/clang's default of
  using the legacy exception handling proposal for WebAssembly. This has
  no effect by default because `panic=abort` is used on most targets.
  Emscripten is exempted from this as the Emscripten target is
  explicitly intended to follow LLVM's/clang's defaults.
* There's a single test in the test suite that links to the
  `panic_unwind` crate which ended up requiring `-Wexceptions` from
  Wasmtime, so the test parts were updated and Wasmtime was updated in
  CI, too.

The net result of all of this is that this should not actually affect
any WebAssembly target's default behavior. Optionally, though, WASI
programs can be built with exception handling via:

    RUSTFLAGS='-Cpanic=unwind' cargo +nightly run -Z build-std --target wasm32-wasip2

Effectively `-Zbuild-std` and `-Cpanic=unwind` is all that's necessary
to enable this support on wasm targets.

Finally, this ends up closing 154593 as well. The WASI targets are now
defined to use `-lunwind` to implement unwinding. This means that the
in-tree definition of `__cpp_exception` is no longer of concern and the
definition is always sourced externally. If Rust is linked with other
C/C++ code using WASI then these idioms are compatible with wasi-sdk,
for example, to use that as a linker. The main caveat is that when using
an external linker the `-fwasm-exceptions` argument needs to be passed
to `clang` for it to be able to find the `libunwind.a` library to link
against.

Closes 154593
2026-05-07 12:51:29 -07:00
Wesley Wiser 63d1985d38 Allow forbidden target features to be hard errors 2026-05-06 21:10:15 -05:00
Jacob Pratt 42b7c36a33 Rollup merge of #156159 - daltenty:daltenty/namesects, r=workingjubilee
[AIX] add -bdbg:namedsects:ss link arg

On AIX, the PGO runtime and ifunc runtime support requires the named section linker feature which collects the name sections together and generates start/stop symbols for them.

This change adds the option to the default linker args for the target.
2026-05-05 22:50:20 -04:00
Guillaume Gomez 8bf58ee5d4 Rollup merge of #155962 - romancardenas:cfg-only-stable-target-feature, r=RalfJung
`rustc`: `target_features`: allow for `cfg`-only stable `target_features`

This PR introduces a new stabilization level for `target_features`: `CfgOnlyStable`. The motivation is allowing the Rust compiler to expose `target_features` of targets so users can use `cfg(target_feature = "feature")` for conditional blocks depending on target features. However, `CfgOnlyStable` cannot be used for `#[target_feature(enable = "feature")]`, as this is still considered unstable. Accordingly, the compiler will still raise an error if these expressions are used on stable.

This PR relates partially to rust-lang/rust#150257. As discussed, for RISC-V targets, having the `"d"`, `"e"`, and `"f"` target features exposed will allow baremetal developers to adapt the code depending on the target's properties.

r? @RalfJung
2026-05-05 02:50:08 +02:00
David Tenty ad582a5865 [AIX] add -bdbg:namedsects:ss link arg
On AIX, PGO runtimes and ifunc support requires the named section linker feature which collects the name sections together and generates start/stop symbols for them.

This change adds the option to the default linker args for the target.
2026-05-04 17:13:10 -04:00
Román Cárdenas Rodríguez ee9a01aecf rustc: target_features: adapt compile errors and warnings for cfg-only stable features 2026-05-04 17:28:35 +02:00
Román Cárdenas Rodríguez df8d029014 rustc: target_features: allow for cfg-only stable target_features 2026-05-04 10:12:27 +02:00
Nicholas Nethercote e7d28d3e9b Rename the HashStable* trait/derives as StableHash*.
Specifically:
- `HashStable` -> `StableHash` (trait)
- `HashStable` -> `StableHash` (derive)
- `HashStable_NoContext` -> `StableHash_NoContext` (derive)

Note: there are some names in `compiler/rustc_macros/src/hash_stable.rs`
that are still to be renamed, e.g. `HashStableMode`.

Part of MCP 983.
2026-05-02 10:16:40 +02:00
Jacob Pratt fae8c6edd1 Rollup merge of #155974 - folkertdev:c-variadic-experimental-arch, r=joshtriplett
add `c_variadic_experimental_arch` feature

tracking issue: https://github.com/rust-lang/rust/issues/155973

Based on https://hackmd.io/pIbUgMQuQcGaibJcinOcEw#Stabilize-c-variadic-function-definitions-rust155697, we'll gate niche targets where we don't control the implementation of `va_arg`, the ABI is unclear, or in general where we're not confident stabilizing the implementation.
2026-04-30 22:28:28 -04:00
Jacob Pratt 6e290dec8a Rollup merge of #155853 - lapla-cogito:rv_mcount, r=mati865
Use `_mcount` as the mcount symbol name on RISC-V Linux GNU targets

Fixes rust-lang/rust#155830

glibc on RISC-V exports `_mcount`, not `mcount`. https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/riscv/machine-gmon.h;hb=HEAD

r? mati865 (I think you're well-suited to review this area, but feel free to reroll)
2026-04-30 22:28:25 -04:00
bors f53b654a88 Auto merge of #155018 - nnethercote:simplify-HashStable, r=fee1-dead
Simplify `HashStable`



This PR:
- Simplifies the `HashStable` trait, by moving its generic parameter from the trait to its single method.
- Eliminates the need for the non-obvious `derive(HashStable)`/`derive(HashStable_Generic)` distinction.
- Reduces the need for, and clarifies, the non-obvious `derive(HashStable)`/`derive(HashStable_NoContext)` distinction.

r? @fee1-dead
2026-04-30 07:30:46 +00:00
Folkert de Vries 41796ecf1c add c_variadic_experimental_arch feature 2026-04-30 00:47:30 +02:00
Nicholas Nethercote 087b422ec7 Remove derive(HashStable_Generic).
It's now just a synonym for `derive(HashStable)`.
2026-04-30 08:26:22 +10:00
Jonathan Brouwer 93948e1a92 Rollup merge of #155916 - arjunr2:llvm-22-update, r=JohnTitor
Update with new LLVM 22 target for `wasm32-wali-linux-musl` target

This is a reopening of rust-lang/rust#155654, which was closed abruptly due to changed commit SHAs on my end during merge.
2026-04-29 23:51:36 +02:00
Shoyu Vanilla (Flint) 5d26634476 Rollup merge of #152443 - kjetilkjeka:nvptx_drop_support_old_hw_and_isa, r=ZuseZ4
NVPTX: Drop support for old architectures and old ISAs

This is the implementation of [this MCP](https://github.com/rust-lang/compiler-team/issues/965#issuecomment-3837320262)

I believe it was said that no FCP was needed, but if that is incorrect then the FCP is anyway scheduled to finish in 2 days so it can in any case be merged then.
2026-04-29 10:40:46 +09:00
Arjun Ramesh 8b3f6dbd9f Update with new LLVM 22 target for wasm32-wali-linux-target 2026-04-28 07:29:57 -04:00
Jacob Pratt 0611bfcf16 Rollup merge of #155247 - daltenty:daltenty/bcdtors, r=davidtwco
[AIX] update linker default to bcdtors

The bcdtor mode affects how the AIX linker choose to pull in static constructors and destructors (https://www.ibm.com/docs/en/aix/7.2.0?topic=l-ld-command) to the link.

The current setting of all makes static init in archive members live regardless of if the archive member would be otherwise referenced, causing that whole archive member to become part of the link.

This default was initially retained for compatibility purposes with historical compilers on the platform which defaulted to this setting. Unfortunately this greedy pulling in of static init can have unintended consequences for applications, for example for programs linked against parts of compiler-rt which contain optional instrumentation (containing static initializers) which may be unused as these now become live in all programs regardless of use.

For that reason and similar reasons, this PR switches the default to mbr, which only extracts static init from archive members which would otherwise be referenced. This gives a behaviour very consistent with linkers on other platforms (e.g. Linux).

Users requiring the old default behaviour can manually pass `-bcdtors:all` on the link step which will override any default we pass here.

(Note: this mirrors LLVM change: https://github.com/llvm/llvm-project/pull/191265)
2026-04-28 05:37:25 -04:00
Kjetil Kjeka a2d23cec5f NVPTX: Drop support for old hw and old ISAs 2026-04-28 08:48:22 +02:00
Jonathan Brouwer e8243d2979 Rollup merge of #154510 - heiher:stabilize-loongarch-target-features, r=Amanieu
Partially stabilize LoongArch target features

This PR stabilizes the following target features:

- div32
- lam-bh
- lamcas
- ld-seq-sa
- scq

Docs PR: https://github.com/rust-lang/reference/pull/2217

r? @Amanieu
2026-04-27 19:54:43 +02:00
lapla 1a681b0316 Use _mcount as the mcount symbol name on RISC-V Linux GNU targets 2026-04-27 11:06:54 +09:00
bjorn3 effe8b5235 Remove unnecessary requires_lto: false for eBPF
requires_lto is already false by default.
2026-04-26 21:07:25 +02:00
Jonathan Brouwer 75234e5d66 Rollup merge of #155723 - cezarbbb:fix-thumb-target-tier-spec, r=wesleywiser
Fix tier level for 5 thumb bare-metal ARM targets

The spec files for 5 Thumb-mode bare-metal ARM targets incorrectly set tier: Some(2), while the documentation correctly lists them as Tier 3. This mismatch was introduced in PR #150556 — the intent was Tier 2 eventually, but these targets should sit at Tier 3 until a proper Tier 3 → Tier 2 promotion MCP is submitted and approved.

This PR changes tier: Some(2) → Some(3) in the following spec files, making them consistent with the docs:

thumbv7a-none-eabi
thumbv7a-none-eabihf
thumbv7r-none-eabi
thumbv7r-none-eabihf
thumbv8r-none-eabihf

PS: No doc changes needed — they already correctly state Tier 3.

r?
2026-04-24 18:19:20 +02:00
Jonathan Brouwer 396f99fcee Rollup merge of #155571 - chrisburel:asan-armv7, r=wesleywiser
Enable AddressSanitizer on arm-unknown-linux-gnueabihf and armv7-unknown-linux-gnueabihf

Add SanitizerSet::ADDRESS to the supported_sanitizers for the arm-unknown-linux-gnueabihf and armv7-unknown-linux-gnueabihf targets.

The AddressSanitizer is already enabled on the armv7-linux-androideabi platform, which shares the same ARM architecture. There is no reason these Linux GNU targets should not also support it, as the underlying LLVM support for ASan on 32-bit ARM is already in place.
2026-04-24 18:19:19 +02:00
cezarbbb 27e12b89b7 Fix tier level for 5 thumb bare-metal ARM targets 2026-04-24 15:52:21 +08:00
teor 34c0fe8778 Fix some typos 2026-04-23 17:07:21 +10:00
Chris Burel e981edde2b Enable AddressSanitizer on arm-unknown-linux-gnueabihf and armv7-unknown-linux-gnueabihf
Add SanitizerSet::ADDRESS to the supported_sanitizers for the
arm-unknown-linux-gnueabihf and armv7-unknown-linux-gnueabihf targets.

The AddressSanitizer is already enabled on the armv7-linux-androideabi
platform, which shares the same ARM architecture. There is no reason
these Linux GNU targets should not also support it, as the underlying
LLVM support for ASan on 32-bit ARM is already in place.
2026-04-21 09:58:49 -04:00
Dominik Schwaiger da2bbfbbec add llvm writable attribute conditionally 2026-04-16 12:29:39 +00:00
Jonathan Brouwer 2d27fe6a5e Rollup merge of #155281 - folkertdev:revert-154840, r=folkertdev
Revert "allow `windows-gnu` targets to embed gdb visualizer scripts"

Fixes https://github.com/rust-lang/rust/issues/155277

This reverts commit 472b966548.

This was merged as https://github.com/rust-lang/rust/pull/154840, but causes linker errors in the wild.

cc @Walnut356 @mati865
r? @ghost
2026-04-14 16:29:37 +02:00
Jonathan Brouwer b7286260c8 Rollup merge of #155235 - folkertdev:fma4-target-feature, r=sayantn
add the `fma4` x86 target feature

tracking issue: https://github.com/rust-lang/rust/issues/155233

Implications are based on LLVM

https://github.com/llvm/llvm-project/blob/df6c82053c5e1f9814d130d423f34871bc6423c5/llvm/lib/Target/X86/X86.td#L201-L206

This feature adds a slightly better instruction encoding for fma. We might want to expose the intrinsics in `stdarch` with that target feature, but just adding the target feature in user code should already take advantage of this improved encoding.

This target feature is used in `libm`.

r? sayantn
2026-04-14 16:29:33 +02:00
Folkert de Vries 17f5fa0dd4 Revert "allow windows-gnu targets to embed gdb visualizer scripts"
This reverts commit 472b966548.
2026-04-14 13:27:46 +02:00
Jacob Pratt 803a7227fb Rollup merge of #155005 - folkertdev:simd-element-type-llvm, r=nnethercote
preserve SIMD element type information

Preserve the SIMD element type and provide it to LLVM for better optimization.

This is relevant for AArch64 types like `int16x4x2_t`, see also https://github.com/llvm/llvm-project/issues/181514. Such types are defined like so:

```rust
#[repr(simd)]
struct int16x4_t([i16; 4]);

#[repr(C)]
struct int16x4x2_t(pub int16x4_t, pub int16x4_t);
```

Previously this would be translated to the opaque `[2 x <8 x i8>]`, with this PR it is instead `[2 x <4 x i16>]`. That change is not relevant for the ABI, but using the correct type prevents bitcasts that can (indeed, do) confuse the LLVM pattern matcher.

This change will make it possible to implement the deinterleaving loads on AArch64 in a portable way (without neon-specific intrinsics), which means that e.g. Miri or the cranelift backend can run them without additional support.

discussion at [#t-compiler > loss of vector element type information](https://rust-lang.zulipchat.com/#narrow/channel/131828-t-compiler/topic/loss.20of.20vector.20element.20type.20information/with/584483611)
2026-04-14 00:37:24 -04:00
Jacob Pratt 7d1b042d45 Rollup merge of #149357 - arielb1:enforce-partial-mitigations, r=rcvalle
Implement `-Z allow-partial-mitigations` (RFC 3855)

This implements `-Z allow-partial-mitigations` as an unstable option, currently with support for control-flow-guard and stack-protector.

As a difference from the RFC, we have `-Z allow-partial-mitigations=!foo` rather than `-Z deny-partial-mitigations=foo`, since I couldn't find an easy way to have an allow/deny pair of flags where the latter flag wins.

To allow for stabilization, this is only enabled starting from the next edition. Maybe a better policy is possible (bikeshed).

r? @rcvalle
2026-04-13 20:12:05 -04:00
David Tenty 824cc42ec9 [AIX] update linker default to bcdtors
The bcdtor mode affects how the AIX linker choose to pull in static constructors and destructors (https://www.ibm.com/docs/en/aix/7.2.0?topic=l-ld-command) to the link.

The current setting of all makes static init in archive members live regardless of if the archive member would be otherwise referenced, causing that whole archive member to become part of the link.

This default was initially retained for compatibility purposes with historical compilers on the platform which defaulted to this setting. Unfortunately this greedy pulling in of static init can have unintended consequences for applications, for example for programs linked against parts of compiler-rt which contain optional instrumentation (containing static initializers) which may be unused as these now become live in all programs regardless of use.

For that reason and similar reasons, this PR switches the default to mbr, which only extracts static init from archive members which would otherwise be referenced. This gives a behaviour very consistent with linkers on other platforms (e.g. Linux).

Users requiring the old default behaviour can manually pass -bcdtors:all on the link step which will override any default we pass here.
2026-04-13 13:17:03 -04:00
Folkert de Vries c766242209 add the fma4 x86 target feature 2026-04-13 14:12:08 +02:00
Folkert de Vries 6f428df8df preseve SIMD element type information
and provide it to LLVM for better optimization
2026-04-13 13:26:50 +02:00
bors 14196dbfa3 Auto merge of #154840 - Walnut356:windows_gdb_embed, r=mati865
allow `windows-gnu` targets to embed gdb visualizer scripts

Pretty straigthforward, works exactly the same as any other `*-gnu` target so i'm not sure why it wasn't enabled already.
2026-04-12 17:09:00 +00:00
Jonathan Brouwer 5daeaa9b3a Rollup merge of #155014 - androm3da:hexagon-scalar-target-features, r=mati865
Hexagon: add scalar arch-version target features (v60-v79, audio)

Add target features corresponding to Hexagon LLVM CPU generations to complement the existing HVX vector features. These are needed for gating scalar intrinsics by architecture version.

New features: audio, v60, v62, v65, v66, v67, v68, v69, v71, v73, v75, v79

Each version implies the previous (e.g. v68 implies v67 which implies v66, etc.), matching LLVM's ArchV60-ArchV79 subtarget features.

Also adds hexagon revisions to the feature-hierarchy test to verify the implied feature chains work correctly.
2026-04-12 15:44:19 +02:00
Folkert de Vries 6bcd172f5a add cfg(target_object_format = "...") 2026-04-11 14:12:39 +02:00
Jonathan Brouwer 197fb1b0d7 Rollup merge of #154449 - nnethercote:rustc_errors-dep-rustc_abi, r=davidtwco
Invert dependency between `rustc_errors` and `rustc_abi`.

Currently, `rustc_errors` depends on `rustc_abi`, which depends on `rustc_error_messages`. This is a bit odd.

`rustc_errors` depends on `rustc_abi` for a single reason: `rustc_abi` defines a type `TargetDataLayoutErrors` and `rustc_errors` impls `Diagnostic` for that type.

We can get a more natural relationship by inverting the dependency, moving the `Diagnostic` trait upstream. Then `rustc_abi` defines `TargetDataLayoutErrors` and also impls `Diagnostic` for it. `rustc_errors` is already pretty far upstream in the crate graph, it doesn't hurt to push it a little further because errors are a very low-level concept.

r? @davidtwco
2026-04-10 18:38:13 +02:00
Paul Kirth a2255aa017 Set the Fuchsia ABI to the documented minimum
Fuchsia only supports the RVA22 + vector as its minimum ABI for RISC-V.
https://fuchsia.dev/fuchsia-src/contribute/governance/rfcs/0234_riscv_abi_rva22+vector
2026-04-09 16:01:10 -07:00
Brian Cain d11e39623b Hexagon: add scalar arch-version target features (v60-v79, audio)
Add target features corresponding to Hexagon LLVM CPU generations to
complement the existing HVX vector features. These are needed for
gating scalar intrinsics by architecture version.

New features: audio, v60, v62, v65, v66, v67, v68, v69, v71, v73, v75, v79

Each version implies the previous (e.g. v68 implies v67 which implies
v66, etc.), matching LLVM's ArchV60-ArchV79 subtarget features.

Also adds hexagon revisions to the feature-hierarchy test to verify
the implied feature chains work correctly.
2026-04-08 14:22:30 -07:00
Jonathan Brouwer 3fb712c80a Rollup merge of #154719 - androm3da:hexagon-inline-asm-register-classes, r=JohnTitor
Hexagon inline asm: add reg_pair, vreg, vreg_pair, and qreg register classes

Add three new register classes for the Hexagon inline assembly backend:

* `reg_pair`: GPR double registers (r1:0 through r27:26)
* `vreg`: HVX vector registers (v0-v31)
* `qreg`: HVX predicate registers (q0-q3), clobber-only for now
2026-04-08 23:04:34 +02:00