diff --git a/src/lib.rs b/src/lib.rs
index d8b3397c8e9b..bedacf705ac4 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -63,7 +63,9 @@
 pub use crate::stacked_borrows::{
     EvalContextExt as StackedBorEvalContextExt, Item, Permission, PtrId, Stack, Stacks, Tag,
 };
-pub use crate::threads::EvalContextExt as ThreadsEvalContextExt;
+pub use crate::threads::{
+    EvalContextExt as ThreadsEvalContextExt, ThreadId, ThreadManager, ThreadState,
+};
 
 /// Insert rustc arguments at the beginning of the argument list that Miri wants to be
 /// set per default, for maximal validation power.
diff --git a/src/machine.rs b/src/machine.rs
index d79e0255f025..23d4e37c66d1 100644
--- a/src/machine.rs
+++ b/src/machine.rs
@@ -28,8 +28,6 @@
 
 use crate::*;
 
-pub use crate::threads::{ThreadId, ThreadManager, ThreadState};
-
 // Some global facts about the emulated machine.
 pub const PAGE_SIZE: u64 = 4 * 1024; // FIXME: adjust to target architecture
 pub const STACK_ADDR: u64 = 32 * PAGE_SIZE; // not really about the "stack", but where we start assigning integer addresses to allocations
diff --git a/src/shims/tls.rs b/src/shims/tls.rs
index 5cef3871c033..da0c585958a3 100644
--- a/src/shims/tls.rs
+++ b/src/shims/tls.rs
@@ -8,8 +8,10 @@
 use rustc_middle::ty;
 use rustc_target::abi::{Size, HasDataLayout};
 
-use crate::{HelpersEvalContextExt, ThreadsEvalContextExt, InterpResult, MPlaceTy, Scalar, StackPopCleanup, Tag};
-use crate::machine::{ThreadId, ThreadState};
+use crate::{
+    HelpersEvalContextExt, InterpResult, MPlaceTy, Scalar, StackPopCleanup, Tag, ThreadId,
+    ThreadState, ThreadsEvalContextExt,
+};
 
 pub type TlsKey = u128;