From a2255aa017f0900efc2aa8c96110aa16d8a56cab Mon Sep 17 00:00:00 2001 From: Paul Kirth Date: Thu, 9 Apr 2026 16:01:10 -0700 Subject: [PATCH] Set the Fuchsia ABI to the documented minimum Fuchsia only supports the RVA22 + vector as its minimum ABI for RISC-V. https://fuchsia.dev/fuchsia-src/contribute/governance/rfcs/0234_riscv_abi_rva22+vector --- .../rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs index 3944c4cd59c7..c15b23b9192c 100644 --- a/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs +++ b/compiler/rustc_target/src/spec/targets/riscv64gc_unknown_fuchsia.rs @@ -6,7 +6,7 @@ pub(crate) fn target() -> Target { let mut base = base::fuchsia::opts(); base.code_model = Some(CodeModel::Medium); base.cpu = "generic-rv64".into(); - base.features = "+m,+a,+f,+d,+c,+zicsr,+zifencei".into(); + base.features = "+m,+a,+f,+d,+c,+v,+zicsr,+zifencei".into(); base.llvm_abiname = LlvmAbi::Lp64d; base.max_atomic_width = Some(64); base.stack_probes = StackProbeType::Inline;