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Stabilize 29 RISC-V target features (riscv_ratified_v2)
This commit stabilizes RISC-V target features with following constraints:
* Describes a ratified extension.
* Implemented on Rust 1.88.0 or before.
Waiting for four+ version cycles seems sufficient.
* Does not disrupt current rustc's target feature + ABI handling.
It excludes "E" and all floating point-arithmetic extensions.
"Zfinx" family does not involve floating point registers but
not stabilizing for now to avoid possible confusion between
the "F" extension family.
* Not vector-related (floating point and integer).
While integer vector subsets should not cause any ABI issues
(as they don't use ABI-dependent floating point registers),
we need to discuss before stabilizing them.
* Supported by the lowest LLVM version supported by rustc (LLVM 20).
List of target features to be stabilized:
1. "b"
2. "za64rs" (no-RT)
3. "za128rs" (no-RT)
4. "zaamo"
5. "zabha"
6. "zacas"
7. "zalrsc"
8. "zama16b" (no-RT)
9. "zawrs"
10. "zca"
11. "zcb"
12. "zcmop"
13. "zic64b" (no-RT)
14. "zicbom"
15. "zicbop" (no-RT)
16. "zicboz"
17. "ziccamoa" (no-RT)
18. "ziccif" (no-RT)
19. "zicclsm" (no-RT)
20. "ziccrse" (no-RT)
21. "zicntr"
22. "zicond"
23. "zicsr"
24. "zifencei"
25. "zihintntl"
26. "zihintpause"
27. "zihpm"
28. "zimop"
29. "ztso"
Of which, 20 of them (29 minus 9 "no-RT" target features) support
runtime detection through `std::arch::is_riscv_feature_detected!()`.
This commit is contained in:
@@ -194,26 +194,26 @@
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] unaligned_vector_mem: "unaligned-vector-mem";
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/// Has reasonably performant unaligned vector
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicsr: "zicsr";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zicsr: "zicsr";
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/// "Zicsr" Extension for Control and Status Register (CSR) Instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicntr: "zicntr";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zicntr: "zicntr";
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/// "Zicntr" Extension for Base Counters and Timers
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihpm: "zihpm";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zihpm: "zihpm";
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/// "Zihpm" Extension for Hardware Performance Counters
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zifencei: "zifencei";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zifencei: "zifencei";
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/// "Zifencei" Extension for Instruction-Fetch Fence
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihintntl: "zihintntl";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zihintntl: "zihintntl";
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/// "Zihintntl" Extension for Non-Temporal Locality Hints
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihintpause: "zihintpause";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zihintpause: "zihintpause";
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/// "Zihintpause" Extension for Pause Hint
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zimop: "zimop";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zimop: "zimop";
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/// "Zimop" Extension for May-Be-Operations
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicbom: "zicbom";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zicbom: "zicbom";
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/// "Zicbom" Extension for Cache-Block Management Instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicboz: "zicboz";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zicboz: "zicboz";
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/// "Zicboz" Extension for Cache-Block Zero Instruction
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicond: "zicond";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zicond: "zicond";
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/// "Zicond" Extension for Integer Conditional Operations
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@FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] m: "m";
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@@ -221,20 +221,20 @@
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@FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] a: "a";
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/// "A" Extension for Atomic Instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zalrsc: "zalrsc";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zalrsc: "zalrsc";
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/// "Zalrsc" Extension for Load-Reserved/Store-Conditional Instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zaamo: "zaamo";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zaamo: "zaamo";
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/// "Zaamo" Extension for Atomic Memory Operations
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zawrs: "zawrs";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zawrs: "zawrs";
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/// "Zawrs" Extension for Wait-on-Reservation-Set Instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zabha: "zabha";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zabha: "zabha";
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/// "Zabha" Extension for Byte and Halfword Atomic Memory Operations
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zacas: "zacas";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zacas: "zacas";
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/// "Zacas" Extension for Atomic Compare-and-Swap (CAS) Instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zam: "zam";
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without cfg check: true;
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/// "Zam" Extension for Misaligned Atomics
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] ztso: "ztso";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] ztso: "ztso";
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/// "Ztso" Extension for Total Store Ordering
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] f: "f";
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@@ -264,7 +264,7 @@
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@FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] c: "c";
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/// "C" Extension for Compressed Instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zca: "zca";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zca: "zca";
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/// "Zca" Compressed Instructions excluding Floating-Point Loads/Stores
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zcf: "zcf";
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without cfg check: true;
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@@ -272,12 +272,12 @@
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zcd: "zcd";
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without cfg check: true;
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/// "Zcd" Compressed Instructions for Double-Precision Floating-Point Loads/Stores
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zcb: "zcb";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zcb: "zcb";
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/// "Zcb" Simple Code-size Saving Compressed Instructions
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zcmop: "zcmop";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zcmop: "zcmop";
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/// "Zcmop" Extension for Compressed May-Be-Operations
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@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] b: "b";
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@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] b: "b";
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/// "B" Extension for Bit Manipulation
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@FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zba: "zba";
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/// "Zba" Extension for Address Generation
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