From 0169aaea3152cc4c906aa2a4f7cfdf346c68b33a Mon Sep 17 00:00:00 2001
From: Folkert de Vries <folkert@folkertdev.nl>
Date: Fri, 13 Feb 2026 14:09:26 +0100
Subject: [PATCH] va_arg: fix potential misaligned load

---
 compiler/rustc_codegen_llvm/src/va_arg.rs | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/compiler/rustc_codegen_llvm/src/va_arg.rs b/compiler/rustc_codegen_llvm/src/va_arg.rs
index 19735a29dfb2..6f05872ac93e 100644
--- a/compiler/rustc_codegen_llvm/src/va_arg.rs
+++ b/compiler/rustc_codegen_llvm/src/va_arg.rs
@@ -69,7 +69,8 @@ fn emit_direct_ptr_va_arg<'ll, 'tcx>(
     {
         let adjusted_size = bx.cx().const_i32((slot_size.bytes() - size.bytes()) as i32);
         let adjusted = bx.inbounds_ptradd(addr, adjusted_size);
-        (adjusted, addr_align)
+        // We're in the middle of a slot now, so use the type's alignment, not the slot's.
+        (adjusted, align)
     } else {
         (addr, addr_align)
     }